1 /**
2   ******************************************************************************
3   * @file    bl808_clock.h
4   * @version V1.0
5   * @date
6   * @brief   This file is the standard driver header file
7   ******************************************************************************
8   * @attention
9   *
10   * <h2><center>&copy; COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
11   *
12   * Redistribution and use in source and binary forms, with or without modification,
13   * are permitted provided that the following conditions are met:
14   *   1. Redistributions of source code must retain the above copyright notice,
15   *      this list of conditions and the following disclaimer.
16   *   2. Redistributions in binary form must reproduce the above copyright notice,
17   *      this list of conditions and the following disclaimer in the documentation
18   *      and/or other materials provided with the distribution.
19   *   3. Neither the name of Bouffalo Lab nor the names of its contributors
20   *      may be used to endorse or promote products derived from this software
21   *      without specific prior written permission.
22   *
23   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
27   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33   *
34   ******************************************************************************
35   */
36 #ifndef __BL808_CLOCK_H__
37 #define __BL808_CLOCK_H__
38 
39 #include "glb_reg.h"
40 #include "mcu_misc_reg.h"
41 #include "mm_misc_reg.h"
42 #include "pds_reg.h"
43 #include "bl808_glb.h"
44 #include "bl808_hbn.h"
45 #include "bl808_common.h"
46 
47 /** @addtogroup  BL808_Peripheral_Driver
48  *  @{
49  */
50 
51 /** @addtogroup  CLOCK
52  *  @{
53  */
54 
55 /** @defgroup  CLOCK_Public_Types
56  *  @{
57  */
58 
59 /**
60  *  @brief System clock type definition
61  */
62 typedef enum {
63     BL_SYSTEM_CLOCK_MCU_XCLK,     /*!< MCU xclk clock */
64     BL_SYSTEM_CLOCK_MCU_ROOT_CLK, /*!< MCU root clock */
65     BL_SYSTEM_CLOCK_MCU_CLK,      /*!< MCU Fast clock/CPU clock */
66     BL_SYSTEM_CLOCK_MCU_BCLK,     /*!< MCU BUS clock */
67     BL_SYSTEM_CLOCK_MCU_PBCLK,    /*!< MCU peri BUS clock */
68     BL_SYSTEM_CLOCK_DSP_XCLK,     /*!< DSP xclk clock */
69     BL_SYSTEM_CLOCK_DSP_ROOT_CLK, /*!< DSP root clock */
70     BL_SYSTEM_CLOCK_DSP_CLK,      /*!< DSP Fast clock/CPU clock */
71     BL_SYSTEM_CLOCK_DSP_BCLK,     /*!< DSP BUS clock */
72     BL_SYSTEM_CLOCK_DSP_PBCLK,    /*!< DSP peri BUS clock */
73     BL_SYSTEM_CLOCK_LP_CLK,       /*!< LP clock */
74     BL_SYSTEM_CLOCK_F32K,         /*!< F32K clock */
75     BL_SYSTEM_CLOCK_XTAL,         /*!< XTAL clock */
76     BL_SYSTEM_CLOCK_MAX,          /*!< MAX type of system clock */
77 } BL_System_Clock_Type;
78 
79 /**
80  *  @brief SOC clock config type
81  */
82 typedef struct
83 {
84     uint32_t magic;                              /*!< Clock config magic */
85     uint32_t systemClock[BL_SYSTEM_CLOCK_MAX];   /*!< System lock value */
86     uint32_t peripheralClock[BL_AHB_SLAVE1_MAX]; /*!< Pewripherals clock value */
87     uint32_t i2sClock;                           /*!< I2S clock */
88 } Clock_Cfg_Type;
89 
90 typedef enum {
91     CLOCK_AUPLL_DIV1,
92     CLOCK_AUPLL_DIV2,
93     CLOCK_AUPLL_DIV2P5,
94     CLOCK_AUPLL_DIV3,
95     CLOCK_AUPLL_DIV4,
96     CLOCK_AUPLL_DIV5,
97     CLOCK_AUPLL_DIV6,
98     CLOCK_AUPLL_DIV10,
99     CLOCK_AUPLL_DIV15,
100 } CLOCK_AUPLL_Type;
101 
102 /**
103  *  @brief Peripheral clock type definition
104  */
105 typedef enum {
106     BL_PERIPHERAL_CLOCK_UART0,       /*!< UART0 clock */
107     BL_PERIPHERAL_CLOCK_UART1,       /*!< UART1 clock */
108     BL_PERIPHERAL_CLOCK_UART2,       /*!< UART2 clock */
109     BL_PERIPHERAL_CLOCK_UART3,       /*!< UART3 clock */
110     BL_PERIPHERAL_CLOCK_SPI0,        /*!< SPI0 clock */
111     BL_PERIPHERAL_CLOCK_SPI1,        /*!< SPI1 clock */
112     BL_PERIPHERAL_CLOCK_I2C0,        /*!< I2C0 clock */
113     BL_PERIPHERAL_CLOCK_I2C1,        /*!< I2C1 clock */
114     BL_PERIPHERAL_CLOCK_I2C2,        /*!< I2C2 clock */
115     BL_PERIPHERAL_CLOCK_I2C3,        /*!< I2C3 clock */
116     BL_PERIPHERAL_CLOCK_TIMER0,      /*!< TIMER0 clock */
117     BL_PERIPHERAL_CLOCK_TIMER1,      /*!< TIMER1 clock */
118     BL_PERIPHERAL_CLOCK_PSRAMA,      /*!< PSRAMA clock */
119     BL_PERIPHERAL_CLOCK_PSRAMB,      /*!< PSRAMB clock */
120     BL_PERIPHERAL_CLOCK_FLASH,       /*!< FLASH clock */
121     BL_PERIPHERAL_CLOCK_I2S,         /*!< I2S clock */
122     BL_PERIPHERAL_CLOCK_BLAI,        /*!< BLAI clock */
123     BL_PERIPHERAL_CLOCK_DISPLAY,     /*!< DISPLAY clock */
124     BL_PERIPHERAL_CLOCK_IR,          /*!< IR clock */
125     BL_PERIPHERAL_CLOCK_PDM,         /*!< PDM clock */
126     BL_PERIPHERAL_CLOCK_ADC,         /*!< ADC clock */
127     BL_PERIPHERAL_CLOCK_DAC,         /*!< DAC clock */
128     BL_PERIPHERAL_CLOCK_GPADC,       /*!< GPADC clock */
129     BL_PERIPHERAL_CLOCK_GPDAC,       /*!< GPDAC clock */
130     BL_PERIPHERAL_CLOCK_CAM,         /*!< CAM clock */
131     BL_PERIPHERAL_CLOCK_SDH,         /*!< SDH clock */
132     BL_PERIPHERAL_CLOCK_PKA,         /*!< PKA clock */
133     BL_PERIPHERAL_CLOCK_EMI,         /*!< EMI clock */
134     BL_PERIPHERAL_CLOCK_H264,        /*!< H264 clock */
135     BL_PERIPHERAL_CLOCK_SUB,         /*!< SUB clock */
136     BL_PERIPHERAL_CLOCK_MAX,
137 } BL_Peripheral_Type;
138 
139 /*@} end of group CLOCK_Public_Types */
140 
141 /** @defgroup  CLOCK_Public_Constants
142  *  @{
143  */
144 
145 /** @defgroup  BL_SYSTEM_CLOCK_TYPE
146  *  @{
147  */
148 #define IS_BL_SYSTEM_CLOCK_TYPE(type) (((type) == BL_SYSTEM_CLOCK_MCU_XCLK) ||     \
149                                        ((type) == BL_SYSTEM_CLOCK_MCU_ROOT_CLK) || \
150                                        ((type) == BL_SYSTEM_CLOCK_MCU_CLK) ||      \
151                                        ((type) == BL_SYSTEM_CLOCK_MCU_BCLK) ||     \
152                                        ((type) == BL_SYSTEM_CLOCK_MCU_PBCLK) ||    \
153                                        ((type) == BL_SYSTEM_CLOCK_DSP_XCLK) ||     \
154                                        ((type) == BL_SYSTEM_CLOCK_DSP_ROOT_CLK) || \
155                                        ((type) == BL_SYSTEM_CLOCK_DSP_CLK) ||      \
156                                        ((type) == BL_SYSTEM_CLOCK_DSP_BCLK) ||     \
157                                        ((type) == BL_SYSTEM_CLOCK_DSP_PBCLK) ||    \
158                                        ((type) == BL_SYSTEM_CLOCK_LP_CLK) ||       \
159                                        ((type) == BL_SYSTEM_CLOCK_F32K) ||         \
160                                        ((type) == BL_SYSTEM_CLOCK_XTAL) ||         \
161                                        ((type) == BL_SYSTEM_CLOCK_MAX))
162 
163 /*@} end of group CLOCK_Public_Constants */
164 
165 /** @defgroup  CLOCK_Public_Macros
166  *  @{
167  */
168 #define SYS_CLOCK_CFG_MAGIC (0x12345678)
169 #define SYS_CLOCK_CFG_ADDR  (0x20010000 + 4 * 1024 - 512)
170 
171 /*@} end of group CLOCK_Public_Macros */
172 
173 /** @defgroup  CLOCK_Public_Functions
174  *  @{
175  */
176 /*----------*/
177 uint32_t Clock_System_Clock_Get(BL_System_Clock_Type type);
178 uint32_t Clock_Peripheral_Clock_Get(BL_Peripheral_Type type);
179 /*----------*/
180 uint32_t SystemCoreClockGet(void);
181 /*----------*/
182 BL_Err_Type CPU_Set_MTimer_RST(uint8_t rstEn);
183 BL_Err_Type CPU_Reset_MTimer(void);
184 BL_Err_Type CPU_Set_MTimer_CLK(uint8_t enable, uint16_t div);
185 uint32_t CPU_Get_MTimer_Source_Clock(void);
186 uint32_t CPU_Get_MTimer_Clock(void);
187 uint64_t CPU_Get_MTimer_Counter(void);
188 uint64_t CPU_Get_CPU_Cycle(void);
189 uint64_t CPU_Get_MTimer_US(void);
190 uint64_t CPU_Get_MTimer_MS(void);
191 BL_Err_Type CPU_MTimer_Delay_US(uint32_t cnt);
192 BL_Err_Type CPU_MTimer_Delay_MS(uint32_t cnt);
193 /*----------*/
194 
195 /*@} end of group CLOCK_Public_Functions */
196 
197 /*@} end of group CLOCK */
198 
199 /*@} end of group BL808_Peripheral_Driver */
200 
201 #endif /* __BL808_CLOCK_H__ */
202