1 /** 2 ****************************************************************************** 3 * @file cam_front_reg.h 4 * @version V1.0 5 * @date 2022-12-03 6 * @brief This file is the description of.IP register 7 ****************************************************************************** 8 * @attention 9 * 10 * <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2> 11 * 12 * Redistribution and use in source and binary forms, with or without modification, 13 * are permitted provided that the following conditions are met: 14 * 1. Redistributions of source code must retain the above copyright notice, 15 * this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright notice, 17 * this list of conditions and the following disclaimer in the documentation 18 * and/or other materials provided with the distribution. 19 * 3. Neither the name of Bouffalo Lab nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 ****************************************************************************** 35 */ 36 #ifndef __HARDWARE_CAM_FRONT_H__ 37 #define __HARDWARE_CAM_FRONT_H__ 38 39 /**************************************************************************** 40 * Pre-processor Definitions 41 ****************************************************************************/ 42 43 /* Register offsets *********************************************************/ 44 45 #define CAM_FRONT_CONFIG_OFFSET (0x0)/* config */ 46 #define CAM_FRONT_DVP2BUS_SRC_SEL_1_OFFSET (0x8)/* dvp2bus_src_sel_1 */ 47 #if defined(BL616) 48 #define CAM_FRONT_SNSR_CTRL_OFFSET (0xC)/* snsr_ctrl */ 49 #define CAM_FRONT_EMI_MISC_OFFSET (0x10)/* emi_misc */ 50 #define CAM_FRONT_ISP_ID_YUV_OFFSET (0x14)/* isp_id_yuv */ 51 #endif 52 #if defined(BL808) 53 #define CAM_FRONT_PIX_DATA_CTRL_OFFSET (0x4)/* pix_data_ctrl */ 54 #define CAM_FRONT_DVP2BUS_SRC_SEL_2_OFFSET (0x14)/* dvp2bus_src_sel_2 */ 55 #define CAM_FRONT_ISP_ID_YUV_OFFSET (0x28)/* isp_id_yuv */ 56 #define CAM_FRONT_ADJA_CTRL_2_OFFSET (0x108)/* adjA_ctrl_2 */ 57 #define CAM_FRONT_Y2RA_CONFIG_0_OFFSET (0x160)/* y2rA_config_0 */ 58 #define CAM_FRONT_Y2RA_CONFIG_1_OFFSET (0x164)/* y2rA_config_1 */ 59 #define CAM_FRONT_Y2RA_CONFIG_2_OFFSET (0x168)/* y2rA_config_2 */ 60 #define CAM_FRONT_Y2RA_CONFIG_3_OFFSET (0x16C)/* y2rA_config_3 */ 61 #define CAM_FRONT_Y2RA_CONFIG_4_OFFSET (0x170)/* y2rA_config_4 */ 62 #define CAM_FRONT_Y2RA_CONFIG_5_OFFSET (0x174)/* y2rA_config_5 */ 63 #define CAM_FRONT_Y2RA_CONFIG_6_OFFSET (0x178)/* y2rA_config_6 */ 64 #define CAM_FRONT_Y2RA_CONFIG_7_OFFSET (0x17C)/* y2rA_config_7 */ 65 #endif 66 67 /* Register Bitfield definitions *****************************************************/ 68 69 /* 0x0 : config */ 70 #define CAM_FRONT_RG_DVPAS_ENABLE (1<<0U) 71 #define CAM_FRONT_RG_DVPAS_HS_INV (1<<1U) 72 #define CAM_FRONT_RG_DVPAS_VS_INV (1<<2U) 73 #define CAM_FRONT_RG_DVPAS_DA_ORDER (1<<3U) 74 #define CAM_FRONT_RG_DVPAS_FIFO_TH_SHIFT (16U) 75 #define CAM_FRONT_RG_DVPAS_FIFO_TH_MASK (0x7ff<<CAM_FRONT_RG_DVPAS_FIFO_TH_SHIFT) 76 77 #if defined(BL808) 78 /* 0x4 : pix_data_ctrl */ 79 #define CAM_FRONT_REG_PIX_DATA_CTRL_SHIFT (0U) 80 #define CAM_FRONT_REG_PIX_DATA_CTRL_MASK (0xfff<<CAM_FRONT_REG_PIX_DATA_CTRL_SHIFT) 81 #define CAM_FRONT_REG_PIX_DATA_SHT_BIT_SHIFT (16U) 82 #define CAM_FRONT_REG_PIX_DATA_SHT_BIT_MASK (0xf<<CAM_FRONT_REG_PIX_DATA_SHT_BIT_SHIFT) 83 #define CAM_FRONT_REG_PIX_DATA_SHT_DIR (1<<20U) 84 #define CAM_FRONT_REG_ISP_DTSRC_SRC (1<<31U) 85 86 /* 0x8 : dvp2bus_src_sel_1 */ 87 #define CAM_FRONT_RG_D2B_DVP_SEL_A_SHIFT (0U) 88 #define CAM_FRONT_RG_D2B_DVP_SEL_A_MASK (0x3f<<CAM_FRONT_RG_D2B_DVP_SEL_A_SHIFT) 89 #define CAM_FRONT_RG_D2X_ID_SEL_A (1<<7U) 90 #define CAM_FRONT_RG_D2B_DVP_SEL_B_SHIFT (8U) 91 #define CAM_FRONT_RG_D2B_DVP_SEL_B_MASK (0x3f<<CAM_FRONT_RG_D2B_DVP_SEL_B_SHIFT) 92 #define CAM_FRONT_RG_D2X_ID_SEL_B (1<<15U) 93 #define CAM_FRONT_RG_D2B_DVP_SEL_C_SHIFT (16U) 94 #define CAM_FRONT_RG_D2B_DVP_SEL_C_MASK (0x3f<<CAM_FRONT_RG_D2B_DVP_SEL_C_SHIFT) 95 #define CAM_FRONT_RG_D2X_ID_SEL_C (1<<23U) 96 #define CAM_FRONT_RG_D2B_DVP_SEL_D_SHIFT (24U) 97 #define CAM_FRONT_RG_D2B_DVP_SEL_D_MASK (0x3f<<CAM_FRONT_RG_D2B_DVP_SEL_D_SHIFT) 98 #define CAM_FRONT_RG_D2X_ID_SEL_D (1<<31U) 99 100 /* 0x14 : dvp2bus_src_sel_2 */ 101 #define CAM_FRONT_RG_D2B_DVP_SEL_E_SHIFT (0U) 102 #define CAM_FRONT_RG_D2B_DVP_SEL_E_MASK (0x3f<<CAM_FRONT_RG_D2B_DVP_SEL_E_SHIFT) 103 #define CAM_FRONT_RG_D2X_ID_SEL_E (1<<7U) 104 #define CAM_FRONT_RG_D2B_DVP_SEL_F_SHIFT (8U) 105 #define CAM_FRONT_RG_D2B_DVP_SEL_F_MASK (0x3f<<CAM_FRONT_RG_D2B_DVP_SEL_F_SHIFT) 106 #define CAM_FRONT_RG_D2X_ID_SEL_F (1<<15U) 107 #define CAM_FRONT_RG_D2B_DVP_SEL_G_SHIFT (16U) 108 #define CAM_FRONT_RG_D2B_DVP_SEL_G_MASK (0x3f<<CAM_FRONT_RG_D2B_DVP_SEL_G_SHIFT) 109 #define CAM_FRONT_RG_D2X_ID_SEL_G (1<<23U) 110 #define CAM_FRONT_RG_D2B_DVP_SEL_H_SHIFT (24U) 111 #define CAM_FRONT_RG_D2B_DVP_SEL_H_MASK (0x3f<<CAM_FRONT_RG_D2B_DVP_SEL_H_SHIFT) 112 #define CAM_FRONT_RG_D2X_ID_SEL_H (1<<31U) 113 114 /* 0x160 : y2rA_config_0 */ 115 #define CAM_FRONT_RG_Y2RA_PRE_0_SHIFT (0U) 116 #define CAM_FRONT_RG_Y2RA_PRE_0_MASK (0x1ff<<CAM_FRONT_RG_Y2RA_PRE_0_SHIFT) 117 #define CAM_FRONT_RG_Y2RA_POS_0_SHIFT (16U) 118 #define CAM_FRONT_RG_Y2RA_POS_0_MASK (0x1ff<<CAM_FRONT_RG_Y2RA_POS_0_SHIFT) 119 #define CAM_FRONT_RG_Y2RA_EN (1<<27U) 120 #define CAM_FRONT_RG_Y2RA_SEL_SHIFT (28U) 121 #define CAM_FRONT_RG_Y2RA_SEL_MASK (0xf<<CAM_FRONT_RG_Y2RA_SEL_SHIFT) 122 123 /* 0x164 : y2rA_config_1 */ 124 #define CAM_FRONT_RG_Y2RA_PRE_1_SHIFT (0U) 125 #define CAM_FRONT_RG_Y2RA_PRE_1_MASK (0x1ff<<CAM_FRONT_RG_Y2RA_PRE_1_SHIFT) 126 #define CAM_FRONT_RG_Y2RA_POS_1_SHIFT (16U) 127 #define CAM_FRONT_RG_Y2RA_POS_1_MASK (0x1ff<<CAM_FRONT_RG_Y2RA_POS_1_SHIFT) 128 129 /* 0x168 : y2rA_config_2 */ 130 #define CAM_FRONT_RG_Y2RA_PRE_2_SHIFT (0U) 131 #define CAM_FRONT_RG_Y2RA_PRE_2_MASK (0x1ff<<CAM_FRONT_RG_Y2RA_PRE_2_SHIFT) 132 #define CAM_FRONT_RG_Y2RA_POS_2_SHIFT (16U) 133 #define CAM_FRONT_RG_Y2RA_POS_2_MASK (0x1ff<<CAM_FRONT_RG_Y2RA_POS_2_SHIFT) 134 135 /* 0x16C : y2rA_config_3 */ 136 #define CAM_FRONT_RG_Y2RA_MTX_00_SHIFT (0U) 137 #define CAM_FRONT_RG_Y2RA_MTX_00_MASK (0xfff<<CAM_FRONT_RG_Y2RA_MTX_00_SHIFT) 138 #define CAM_FRONT_RG_Y2RA_MTX_01_SHIFT (16U) 139 #define CAM_FRONT_RG_Y2RA_MTX_01_MASK (0xfff<<CAM_FRONT_RG_Y2RA_MTX_01_SHIFT) 140 141 /* 0x170 : y2rA_config_4 */ 142 #define CAM_FRONT_RG_Y2RA_MTX_02_SHIFT (0U) 143 #define CAM_FRONT_RG_Y2RA_MTX_02_MASK (0xfff<<CAM_FRONT_RG_Y2RA_MTX_02_SHIFT) 144 #define CAM_FRONT_RG_Y2RA_MTX_10_SHIFT (16U) 145 #define CAM_FRONT_RG_Y2RA_MTX_10_MASK (0xfff<<CAM_FRONT_RG_Y2RA_MTX_10_SHIFT) 146 147 /* 0x174 : y2rA_config_5 */ 148 #define CAM_FRONT_RG_Y2RA_MTX_11_SHIFT (0U) 149 #define CAM_FRONT_RG_Y2RA_MTX_11_MASK (0xfff<<CAM_FRONT_RG_Y2RA_MTX_11_SHIFT) 150 #define CAM_FRONT_RG_Y2RA_MTX_12_SHIFT (16U) 151 #define CAM_FRONT_RG_Y2RA_MTX_12_MASK (0xfff<<CAM_FRONT_RG_Y2RA_MTX_12_SHIFT) 152 153 /* 0x178 : y2rA_config_6 */ 154 #define CAM_FRONT_RG_Y2RA_MTX_20_SHIFT (0U) 155 #define CAM_FRONT_RG_Y2RA_MTX_20_MASK (0xfff<<CAM_FRONT_RG_Y2RA_MTX_20_SHIFT) 156 #define CAM_FRONT_RG_Y2RA_MTX_21_SHIFT (16U) 157 #define CAM_FRONT_RG_Y2RA_MTX_21_MASK (0xfff<<CAM_FRONT_RG_Y2RA_MTX_21_SHIFT) 158 159 /* 0x17C : y2rA_config_7 */ 160 #define CAM_FRONT_RG_Y2RA_MTX_22_SHIFT (0U) 161 #define CAM_FRONT_RG_Y2RA_MTX_22_MASK (0xfff<<CAM_FRONT_RG_Y2RA_MTX_22_SHIFT) 162 #endif 163 164 #if defined(BL616) 165 /* 0x8 : dvp2bus_src_sel_1 */ 166 #define CAM_FRONT_RG_D2X_DVP_SEL (1<<0U) 167 168 /* 0xC : snsr_ctrl */ 169 #define CAM_FRONT_RG_SNSR_RST (1<<0U) 170 #define CAM_FRONT_RG_SNSR_PWDN (1<<1U) 171 172 /* 0x10 : emi_misc */ 173 #define CAM_FRONT_REG_X_WTHRE_PB_SHIFT (0U) 174 #define CAM_FRONT_REG_X_WTHRE_PB_MASK (0x3<<CAM_FRONT_REG_X_WTHRE_PB_SHIFT) 175 #define CAM_FRONT_REG_SF_HARB_MODE (1<<4U) 176 #endif 177 178 /* 0x14 : isp_id_yuv */ 179 #define CAM_FRONT_REG_YUV_IDGEN_RST (1<<0U) 180 #define CAM_FRONT_REG_YUV_IDGEN_EDGE (1<<1U) 181 #define CAM_FRONT_REG_YUV_IDGEN_CNT_INCR_SHIFT (16U) 182 #define CAM_FRONT_REG_YUV_IDGEN_CNT_INCR_MASK (0xffff<<CAM_FRONT_REG_YUV_IDGEN_CNT_INCR_SHIFT) 183 184 185 #endif /* __CAM_FRONT_REG_H__ */ 186