1 /***************COPYRIGHT(C) 2019 WCH. A11 rights reserved********************* 2 * File Name : ch32f10x_spi.h 3 * Author : WCH 4 * Version : V1.0.0 5 * Date : 2019/10/15 6 * Description : This file contains all the functions prototypes for the 7 * SPI firmware library. 8 *******************************************************************************/ 9 #ifndef __CH32F10x_SPI_H 10 #define __CH32F10x_SPI_H 11 12 #ifdef __cplusplus 13 extern "C" { 14 #endif 15 16 #include "ch32f10x.h" 17 18 /* SPI Init structure definition */ 19 typedef struct 20 { 21 uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode. 22 This parameter can be a value of @ref SPI_data_direction */ 23 24 uint16_t SPI_Mode; /*!< Specifies the SPI operating mode. 25 This parameter can be a value of @ref SPI_mode */ 26 27 uint16_t SPI_DataSize; /*!< Specifies the SPI data size. 28 This parameter can be a value of @ref SPI_data_size */ 29 30 uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state. 31 This parameter can be a value of @ref SPI_Clock_Polarity */ 32 33 uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture. 34 This parameter can be a value of @ref SPI_Clock_Phase */ 35 36 uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by 37 hardware (NSS pin) or by software using the SSI bit. 38 This parameter can be a value of @ref SPI_Slave_Select_management */ 39 40 uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be 41 used to configure the transmit and receive SCK clock. 42 This parameter can be a value of @ref SPI_BaudRate_Prescaler. 43 @note The communication clock is derived from the master 44 clock. The slave clock does not need to be set. */ 45 46 uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 47 This parameter can be a value of @ref SPI_MSB_LSB_transmission */ 48 49 uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */ 50 }SPI_InitTypeDef; 51 52 /* I2S Init structure definition */ 53 typedef struct 54 { 55 56 uint16_t I2S_Mode; /*!< Specifies the I2S operating mode. 57 This parameter can be a value of @ref I2S_Mode */ 58 59 uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication. 60 This parameter can be a value of @ref I2S_Standard */ 61 62 uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication. 63 This parameter can be a value of @ref I2S_Data_Format */ 64 65 uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. 66 This parameter can be a value of @ref I2S_MCLK_Output */ 67 68 uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication. 69 This parameter can be a value of @ref I2S_Audio_Frequency */ 70 71 uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock. 72 This parameter can be a value of @ref I2S_Clock_Polarity */ 73 }I2S_InitTypeDef; 74 75 /* SPI_data_direction */ 76 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000) 77 #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400) 78 #define SPI_Direction_1Line_Rx ((uint16_t)0x8000) 79 #define SPI_Direction_1Line_Tx ((uint16_t)0xC000) 80 81 /* SPI_mode */ 82 #define SPI_Mode_Master ((uint16_t)0x0104) 83 #define SPI_Mode_Slave ((uint16_t)0x0000) 84 85 /* SPI_data_size */ 86 #define SPI_DataSize_16b ((uint16_t)0x0800) 87 #define SPI_DataSize_8b ((uint16_t)0x0000) 88 89 /* SPI_Clock_Polarity */ 90 #define SPI_CPOL_Low ((uint16_t)0x0000) 91 #define SPI_CPOL_High ((uint16_t)0x0002) 92 93 /* SPI_Clock_Phase */ 94 #define SPI_CPHA_1Edge ((uint16_t)0x0000) 95 #define SPI_CPHA_2Edge ((uint16_t)0x0001) 96 97 /* SPI_Slave_Select_management */ 98 #define SPI_NSS_Soft ((uint16_t)0x0200) 99 #define SPI_NSS_Hard ((uint16_t)0x0000) 100 101 /* SPI_BaudRate_Prescaler */ 102 #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000) 103 #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008) 104 #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010) 105 #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018) 106 #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020) 107 #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028) 108 #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030) 109 #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038) 110 111 /* SPI_MSB_LSB_transmission */ 112 #define SPI_FirstBit_MSB ((uint16_t)0x0000) 113 #define SPI_FirstBit_LSB ((uint16_t)0x0080) 114 115 /* I2S_Mode */ 116 #define I2S_Mode_SlaveTx ((uint16_t)0x0000) 117 #define I2S_Mode_SlaveRx ((uint16_t)0x0100) 118 #define I2S_Mode_MasterTx ((uint16_t)0x0200) 119 #define I2S_Mode_MasterRx ((uint16_t)0x0300) 120 121 /* I2S_Standard */ 122 #define I2S_Standard_Phillips ((uint16_t)0x0000) 123 #define I2S_Standard_MSB ((uint16_t)0x0010) 124 #define I2S_Standard_LSB ((uint16_t)0x0020) 125 #define I2S_Standard_PCMShort ((uint16_t)0x0030) 126 #define I2S_Standard_PCMLong ((uint16_t)0x00B0) 127 128 /* I2S_Data_Format */ 129 #define I2S_DataFormat_16b ((uint16_t)0x0000) 130 #define I2S_DataFormat_16bextended ((uint16_t)0x0001) 131 #define I2S_DataFormat_24b ((uint16_t)0x0003) 132 #define I2S_DataFormat_32b ((uint16_t)0x0005) 133 134 /* I2S_MCLK_Output */ 135 #define I2S_MCLKOutput_Enable ((uint16_t)0x0200) 136 #define I2S_MCLKOutput_Disable ((uint16_t)0x0000) 137 138 /* I2S_Audio_Frequency */ 139 #define I2S_AudioFreq_192k ((uint32_t)192000) 140 #define I2S_AudioFreq_96k ((uint32_t)96000) 141 #define I2S_AudioFreq_48k ((uint32_t)48000) 142 #define I2S_AudioFreq_44k ((uint32_t)44100) 143 #define I2S_AudioFreq_32k ((uint32_t)32000) 144 #define I2S_AudioFreq_22k ((uint32_t)22050) 145 #define I2S_AudioFreq_16k ((uint32_t)16000) 146 #define I2S_AudioFreq_11k ((uint32_t)11025) 147 #define I2S_AudioFreq_8k ((uint32_t)8000) 148 #define I2S_AudioFreq_Default ((uint32_t)2) 149 150 /* I2S_Clock_Polarity */ 151 #define I2S_CPOL_Low ((uint16_t)0x0000) 152 #define I2S_CPOL_High ((uint16_t)0x0008) 153 154 /* SPI_I2S_DMA_transfer_requests */ 155 #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002) 156 #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001) 157 158 /* SPI_NSS_internal_software_management */ 159 #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100) 160 #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF) 161 162 /* SPI_CRC_Transmit_Receive */ 163 #define SPI_CRC_Tx ((uint8_t)0x00) 164 #define SPI_CRC_Rx ((uint8_t)0x01) 165 166 /* SPI_direction_transmit_receive */ 167 #define SPI_Direction_Rx ((uint16_t)0xBFFF) 168 #define SPI_Direction_Tx ((uint16_t)0x4000) 169 170 /* SPI_I2S_interrupts_definition */ 171 #define SPI_I2S_IT_TXE ((uint8_t)0x71) 172 #define SPI_I2S_IT_RXNE ((uint8_t)0x60) 173 #define SPI_I2S_IT_ERR ((uint8_t)0x50) 174 #define SPI_I2S_IT_OVR ((uint8_t)0x56) 175 #define SPI_IT_MODF ((uint8_t)0x55) 176 #define SPI_IT_CRCERR ((uint8_t)0x54) 177 #define I2S_IT_UDR ((uint8_t)0x53) 178 179 /* SPI_I2S_flags_definition */ 180 #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001) 181 #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002) 182 #define I2S_FLAG_CHSIDE ((uint16_t)0x0004) 183 #define I2S_FLAG_UDR ((uint16_t)0x0008) 184 #define SPI_FLAG_CRCERR ((uint16_t)0x0010) 185 #define SPI_FLAG_MODF ((uint16_t)0x0020) 186 #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040) 187 #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080) 188 189 190 void SPI_I2S_DeInit(SPI_TypeDef* SPIx); 191 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct); 192 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct); 193 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct); 194 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct); 195 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); 196 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); 197 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState); 198 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState); 199 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data); 200 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx); 201 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft); 202 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState); 203 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize); 204 void SPI_TransmitCRC(SPI_TypeDef* SPIx); 205 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState); 206 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC); 207 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx); 208 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction); 209 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); 210 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); 211 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); 212 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); 213 214 #ifdef __cplusplus 215 } 216 #endif 217 218 #endif /*__CH32F10x_SPI_H */ 219 220 221 222 223 224 225 226 227 228