1 /** 2 ***************************************************************************** 3 * @file cmem7_i2c.h 4 * 5 * @brief CMEM7 I2C header file 6 * 7 * 8 * @version V1.0 9 * @date 3. September 2013 10 * 11 * @note 12 * 13 ***************************************************************************** 14 * @attention 15 * 16 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 17 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 18 * TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 19 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 20 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 21 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 22 * 23 * <h2><center>© COPYRIGHT 2013 Capital-micro </center></h2> 24 ***************************************************************************** 25 */ 26 27 #ifndef __CMEM7_I2C_H 28 #define __CMEM7_I2C_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 #include "cmem7.h" 35 #include "cmem7_conf.h" 36 37 38 #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C0) || \ 39 ((PERIPH) == I2C1)) 40 41 /** @defgroup I2C_Mode 42 * @{ 43 */ 44 #define I2C_Mode_Slave 0 45 #define I2C_Mode_Master 1 46 #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_Slave) || \ 47 ((MODE) == I2C_Mode_Master)) 48 /** 49 * @} 50 */ 51 52 /** @defgroup I2C_ADDR_WIDTH 53 * @{ 54 */ 55 #define I2C_ADDR_WIDTH_7BIT 0 56 #define I2C_ADDR_WIDTH_10BIT 1 57 #define IS_I2C_ADDR_WIDTH(WIDTH) (((WIDTH) == I2C_ADDR_WIDTH_7BIT) || \ 58 ((WIDTH) == I2C_ADDR_WIDTH_10BIT)) 59 /** 60 * @} 61 */ 62 63 /** @defgroup I2C_INT 64 * @{ 65 */ 66 #define I2C_INT_RX_FIFO_NOT_EMPTY 0x00000004 /*!< Can't be clear but read FIFO */ 67 #define I2C_INT_RD_REQUEST 0x00000020 /*!< Slave was requested to send data */ 68 #define I2C_INT_TX_ABORT 0x00000040 /*!< Error while sending data */ 69 #define I2C_INT_RX_DONE 0x00000080 /*!< Slave sent all requested data */ 70 #define I2C_INT_TX_DONE 0x00000100 /*!< Master accomplish to send all data */ 71 72 #define I2C_INT_ALL (I2C_INT_RX_FIFO_NOT_EMPTY | \ 73 I2C_INT_RD_REQUEST | \ 74 I2C_INT_TX_ABORT | \ 75 I2C_INT_RX_DONE | \ 76 I2C_INT_TX_DONE) 77 78 #define IS_I2C_INT(INT) (((INT) != 0) && (((INT) & ~I2C_INT_ALL) == 0)) 79 /** 80 * @} 81 */ 82 83 /** @defgroup I2C_STATUS 84 * @{ 85 */ 86 #define I2C_STATUS_RX_FIFO_NOT_EMPTY 0x00200000 /*!< Can't be clear but read FIFO */ 87 #define I2C_STATUS_RD_REQUEST 0x01000000 /*!< Slave was requested to send data */ 88 #define I2C_STATUS_TX_ABORT 0x02000000 /*!< Error while sending data */ 89 #define I2C_STATUS_RX_DONE 0x04000000 /*!< Slave sent all requested data */ 90 #define I2C_STATUS_TX_DONE 0x08000000 /*!< Master accomplish to send all data */ 91 92 #define I2C_STATUS_ALL (I2C_STATUS_RX_FIFO_NOT_EMPTY | \ 93 I2C_STATUS_RD_REQUEST | \ 94 I2C_STATUS_TX_ABORT | \ 95 I2C_STATUS_RX_DONE | \ 96 I2C_STATUS_TX_DONE) 97 98 #define IS_I2C_STATUS(STATUS) (((STATUS) != 0) && (((STATUS) & ~I2C_STATUS_ALL) == 0)) 99 /** 100 * @} 101 */ 102 103 /** 104 * @brief I2C timing structure 105 */ 106 typedef struct 107 { 108 uint32_t I2C_Freq; /*!< I2C frquency */ 109 110 uint16_t I2C_TsuDat; /*!< nano second of TSU:DAT */ 111 uint16_t I2C_Tsetup; /*!< nano second of THD:STA and TSU:STO */ 112 uint16_t I2C_Tbuf; /*!< nano second of TBUF */ 113 uint16_t I2C_TsuSta; /*!< nano second of TSU:STA */ 114 115 BOOL I2C_SdaFilterEn; /*!< enabled flag of SDA filter */ 116 uint8_t I2C_SdaFilterSpike; /*!< spikes of SDA filter */ 117 BOOL I2C_SclFilterEn; /*!< enabled flag of SCL filter */ 118 uint8_t I2C_SclFilterSpike; /*!< spikes of SCL filter */ 119 120 } I2C_InitTimingDef; 121 122 /** 123 * @brief I2C initialization structure 124 */ 125 typedef struct 126 { 127 uint8_t I2C_Mode; /*!< Specifies the I2C mode. 128 This parameter can be a value of @ref I2C_mode */ 129 uint8_t I2C_AddressWidth; /*!< 7- or 10-bits width address, ref as @ref I2C_ADDR_WIDTH */ 130 uint8_t I2C_Address; /*!< 7- or 10-bits address */ 131 I2C_InitTimingDef* timing; /*!< timing structure, null if don't set */ 132 } I2C_InitTypeDef; 133 134 /** 135 * @brief I2C initialization 136 * @note This function should be called at first before any other interfaces. 137 * @param[in] I2Cx I2C peripheral, which is I2C0 or I2C1 138 * @param[in] init A pointer to structure I2C_InitTypeDef 139 * @retval None 140 */ 141 void I2C_Init(I2C0_Type* I2Cx, I2C_InitTypeDef* I2C_Init); 142 143 /** 144 * @brief Enable or disable I2C. 145 * @param[in] I2Cx I2C peripheral, which is I2C0 or I2C1 146 * @param[in] Enable The bit indicates if the specific I2C is enable or not 147 * @retval None 148 */ 149 void I2C_Enable(I2C0_Type* I2Cx, BOOL enable); 150 151 /** 152 * @brief Enable or disable I2C interrupt. 153 * @param[in] I2Cx I2C peripheral, which is I2C0 or I2C1 154 * @param[in] Int interrupt mask bits, which can be the combination of @ref I2C_Int 155 * @param[in] Enable The bit indicates if specific interrupts are enable or not 156 * @retval None 157 */ 158 void I2C_EnableInt(I2C0_Type* I2Cx, uint32_t Int, BOOL enable); 159 160 /** 161 * @brief Check specific interrupts are set or not 162 * @param[in] I2Cx I2C peripheral, which is I2C0 or I2C1 163 * @param[in] Int interrupt mask bits, which can be the combination of @ref I2C_Int 164 * @retval BOOL The bit indicates if specific interrupts are enable or not 165 */ 166 BOOL I2C_GetIntStatus(I2C0_Type* I2Cx, uint32_t Int); 167 168 /** 169 * @brief Clear specific interrupts 170 * @note Specific interrupt clear will clear correspective status as well 171 * @param[in] I2Cx I2C peripheral, which is I2C0 or I2C1 172 * @param[in] Int interrupt mask bits, which can be the combination of @ref I2C_Int 173 * @retval None 174 */ 175 void I2C_ClearInt(I2C0_Type* I2Cx, uint32_t Int); 176 177 /** 178 * @brief Check specific status are set or not 179 * @param[in] I2Cx I2C peripheral, which is I2C0 or I2C1 180 * @param[in] Status Status mask bits, which can be the combination of @ref I2C_STATUS 181 * @retval BOOL The bit indicates if specific status are set or not 182 */ 183 BOOL I2C_GetStatus(I2C0_Type* I2Cx, uint32_t Status); 184 185 /** 186 * @brief Clear specific status 187 * @note Specific status clear will clear correspective interrupt as well 188 * @param[in] I2Cx I2C peripheral, which is I2C0 or I2C1 189 * @param[in] Status Status mask bits, which can be the combination of @ref I2C_STATUS 190 * @retval None 191 */ 192 void I2C_ClearStatus(I2C0_Type* I2Cx, uint32_t Status); 193 194 /** 195 * @brief I2C send read request in master mode 196 * @note Users must call I2C_StopReq between 2 requests 197 * @param[in] I2Cx I2C peripheral, which is I2C0 or I2C1 198 * @param[in] size Expected data size to be read 199 * @retval BOOL The bit indicates if read request to be sent is valid 200 * @see I2C_StopReq 201 */ 202 BOOL I2C_MasterReadReq(I2C0_Type* I2Cx, uint8_t size); 203 204 /** 205 * @brief Read data from I2C 206 * @param[in] I2Cx I2C peripheral, which is I2C0 or I2C1 207 * @param[in] size Expected data size to be read 208 * @param[out] Data A user-allocated buffer to fetch data to be read 209 * @retval uint8_t Actual read data size 210 */ 211 uint8_t I2C_ReadFifo(I2C0_Type* I2Cx, uint8_t size, uint8_t* data); 212 213 /** 214 * @brief I2C send write request in master or slave mode 215 * @note Users must call I2C_StopReq between 2 requests 216 * @param[in] I2Cx I2C peripheral, which is I2C0 or I2C1 217 * @param[in] size Expected data size to be written, includes the first data 218 * @param[in] firstData The first data to be written 219 * @retval BOOL The bit indicates if write request to be sent is valid 220 * @see I2C_StopReq 221 */ 222 BOOL I2C_WriteReq(I2C0_Type* I2Cx, uint8_t size, uint8_t firstData); 223 224 /** 225 * @brief Write data to I2C 226 * @param[in] I2Cx I2C peripheral, which is I2C0 or I2C1 227 * @param[in] size Expected data size to be written 228 * @param[in] Data A pointer to the data to be written 229 * @retval uint8_t Actual written data size 230 */ 231 uint8_t I2C_WriteFifo(I2C0_Type* I2Cx, uint8_t size, uint8_t* data); 232 233 /** 234 * @brief I2C stop request 235 * @note Users must call I2C_StopReq between 2 requests 236 * @param[in] I2Cx I2C peripheral, which is I2C0 or I2C1 237 * @retval BOOL The bit indicates if request is stopped. 238 * @see I2C_MasterReadReq I2C_WriteReq 239 */ 240 BOOL I2C_StopReq(I2C0_Type* I2Cx); 241 242 #ifdef __cplusplus 243 } 244 #endif 245 246 #endif /*__CMEM7_I2C_H */ 247 248