1 /** 2 ***************************************************************************** 3 * @file cmem7_misc.h 4 * 5 * @brief CMEM7 miscellaneous header file 6 * 7 * 8 * @version V1.0 9 * @date 3. September 2013 10 * 11 * @note 12 * 13 ***************************************************************************** 14 * @attention 15 * 16 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 17 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 18 * TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 19 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 20 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 21 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 22 * 23 * <h2><center>© COPYRIGHT 2013 Capital-micro </center></h2> 24 ***************************************************************************** 25 */ 26 27 #ifndef __CMEM7_MISC_H 28 #define __CMEM7_MISC_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 #include "cmem7.h" 35 #include "cmem7_conf.h" 36 37 /** 38 * @brief NVIC initialization structure 39 */ 40 /** 41 @code 42 The table below gives the allowed values of the pre-emption priority and subpriority according 43 to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function 44 ============================================================================================================================ 45 NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description 46 ============================================================================================================================ 47 NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority 48 | | | 4 bits for subpriority 49 ---------------------------------------------------------------------------------------------------------------------------- 50 NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority 51 | | | 3 bits for subpriority 52 ---------------------------------------------------------------------------------------------------------------------------- 53 NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority 54 | | | 2 bits for subpriority 55 ---------------------------------------------------------------------------------------------------------------------------- 56 NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority 57 | | | 1 bits for subpriority 58 ---------------------------------------------------------------------------------------------------------------------------- 59 NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority 60 | | | 0 bits for subpriority 61 ============================================================================================================================ 62 @endcode 63 */ 64 65 typedef struct 66 { 67 uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled. 68 This parameter can be a value of @ref IRQn_Type 69 (For the complete Capital-micro Devices IRQ Channels list, please 70 refer to cmem7.h file) */ 71 72 uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel 73 specified in NVIC_IRQChannel. This parameter can be a value 74 between 0 and 15 as described in the table @ref NVIC_Priority_Table */ 75 76 uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified 77 in NVIC_IRQChannel. This parameter can be a value 78 between 0 and 15 as described in the table @ref NVIC_Priority_Table */ 79 80 BOOL NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel 81 will be enabled or disabled. 82 This parameter can be set either to ENABLE or DISABLE */ 83 } NVIC_InitTypeDef; 84 85 86 /** @defgroup NVIC_VectTab 87 * @{ 88 */ 89 90 #define NVIC_VectTab_CME_CODE ((uint32_t)0x00000000) 91 #define NVIC_VectTab_RAM ((uint32_t)0x20000000) 92 #define NVIC_VectTab_FLASH ((uint32_t)0x08000000) 93 #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_CME_CODE) || \ 94 ((VECTTAB) == NVIC_VectTab_RAM) || \ 95 ((VECTTAB) == NVIC_VectTab_FLASH)) 96 /** 97 * @} 98 */ 99 100 /** @defgroup NVIC_LP 101 * @{ 102 */ 103 #define NVIC_LP_SEVONPEND ((uint8_t)0x10) 104 #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04) 105 #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02) 106 #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \ 107 ((LP) == NVIC_LP_SLEEPDEEP) || \ 108 ((LP) == NVIC_LP_SLEEPONEXIT)) 109 /** 110 * @} 111 */ 112 113 /** @defgroup NVIC_PriorityGroup 114 * @{ 115 */ 116 #define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority 117 4 bits for subpriority */ 118 #define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority 119 3 bits for subpriority */ 120 #define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority 121 2 bits for subpriority */ 122 #define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority 123 1 bits for subpriority */ 124 #define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority 125 0 bits for subpriority */ 126 127 #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \ 128 ((GROUP) == NVIC_PriorityGroup_1) || \ 129 ((GROUP) == NVIC_PriorityGroup_2) || \ 130 ((GROUP) == NVIC_PriorityGroup_3) || \ 131 ((GROUP) == NVIC_PriorityGroup_4)) 132 /** 133 * @} 134 */ 135 136 #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 137 138 #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 139 140 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) 141 142 /** 143 * @brief Configures the priority grouping: pre-emption priority and subpriority. 144 * @param NVIC_PriorityGroup: specifies the priority grouping bits length. 145 * This parameter can be one of the following values, ref as @ref NVIC_PriorityGroup: 146 * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority 147 * 4 bits for subpriority 148 * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority 149 * 3 bits for subpriority 150 * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority 151 * 2 bits for subpriority 152 * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority 153 * 1 bits for subpriority 154 * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority 155 * 0 bits for subpriority 156 * @retval None 157 */ 158 void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup); 159 160 /** 161 * @brief Initializes the NVIC peripheral according to the specified 162 * parameters in the NVIC_InitStruct. 163 * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains 164 * the configuration information for the specified NVIC peripheral. 165 * @retval None 166 */ 167 void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct); 168 169 /** 170 * @brief Sets the vector table location and Offset. 171 * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory. 172 * This parameter can be one of the following values, ref as @ref NVIC_VectTab: 173 * @arg NVIC_VectTab_RAM 174 * @arg NVIC_VectTab_FLASH 175 * @param Offset: Vector Table base offset field. This value must be a multiple 176 * of 0x200. 177 * @retval None 178 */ 179 void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset); 180 181 /** 182 * @brief Selects the condition for the system to enter low power mode. 183 * @param LowPowerMode: Specifies the new mode for the system to enter low power mode. 184 * This parameter can be one of the following values, ref as @ref NVIC_LP: 185 * @arg NVIC_LP_SEVONPEND 186 * @arg NVIC_LP_SLEEPDEEP 187 * @arg NVIC_LP_SLEEPONEXIT 188 * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE. 189 * @retval None 190 */ 191 void NVIC_SystemLPConfig(uint8_t LowPowerMode, BOOL NewState); 192 193 /** 194 * @brief Memory map from address 'from' to 'address 'to' and open icache or not 195 * @param[in] from address to be mapped from 196 * @param[in] to address to be mapped to 197 * @param[in] isIcacheOn icache is on or off 198 * @retval None 199 */ 200 void GLB_MMAP(uint32_t from, uint32_t to, BOOL isIcacheOn); 201 202 /** 203 * @brief Convert the mapping destination address to source address 204 * @param[in] to address to be mapped to 205 * @retval uint32_t address to be mapped from 206 */ 207 uint32_t GLB_ConvertToMappingFromAddr(uint32_t to); 208 209 /** 210 * @brief Convert the mapping source address to destination address 211 * @param[in] from address to be mapped from 212 * @retval uint32_t address to be mapped to 213 */ 214 uint32_t GLB_ConvertToMappingToAddr(uint32_t from); 215 216 /** 217 * @brief Set NMI irq number, it should be one of @ref IRQn_Type. 218 * @Note You can assign any valid IRQn_Type to NMI. After that, you will enter NMI 219 * interrupt routine if the specific 'irq' occurs. By default, NMI irq number 220 * is 0, same as ETH_INT_IRQn 221 * @param[in] irq irq number 222 * @retval None 223 */ 224 void GLB_SetNmiIrqNum(uint32_t irq); 225 226 /** @defgroup SYS_CLK_SEL 227 * @{ 228 */ 229 #define SYS_CLK_SEL_OSC 0x0 230 #define SYS_CLK_SEL_DLL 0x1 231 #define SYS_CLK_SEL_CRYSTAL 0x2 232 #define SYS_CLK_SEL_EXTERNAL 0x3 233 /** 234 * @} 235 */ 236 237 /** 238 * @brief Select system clock source, it should be one of @ref SYS_CLK_SEL. 239 * @Note You MUST make sure externel clock has been stabled if clock 240 * source is external before call this function. 241 * Default value is SYS_CLK_SEL_OSC 242 * @param[in] irq irq number 243 * @retval None 244 */ 245 void GLB_SelectSysClkSource(uint8_t source); 246 247 /** 248 * @brief Simulate instruction 'STRB' or 'STRH' with 'BFI' 249 * @Note In M7, you have to write a register in 32-bit alignment, 250 * not in 8-bit or 16-bit. 251 * @param[in] addr register address to be written 252 * @param[in] value value to be written 253 * @param[in] lsb LSB in register to be written 254 * @param[in] len bit length to be written 255 * @retval None 256 */ 257 258 259 //#define aaaa(len) __asm("LDR len, 11") 260 261 #define CMEM7_BFI(addr, value, lsb, len) \ 262 do { \ 263 unsigned long tmp; \ 264 unsigned long tmp1 = (unsigned long)addr; \ 265 \ 266 __asm("LDR tmp, [tmp1]\n" \ 267 "BFI tmp, "#value", "#lsb", "#len" \n" \ 268 "STR tmp, [tmp1]\n"); \ 269 } while (0) 270 271 #ifdef __cplusplus 272 } 273 #endif 274 275 #endif /* __CMEM7_MISC_H */ 276 277