1 #include "bflb_core.h"
2 #include "bl616_memorymap.h"
3 #include "bl616_irq.h"
4 
5 #define DMA_CHANNEL_OFFSET 0x100
6 
7 struct bflb_device_s bl616_device_table[] = {
8     { .name = "adc",
9       .reg_base = AON_BASE,
10       .irq_num = BL616_IRQ_GPADC_DMA,
11       .idx = 0,
12       .sub_idx = 0,
13       .dev_type = BFLB_DEVICE_TYPE_ADC,
14       .user_data = NULL },
15     { .name = "dac",
16       .reg_base = GLB_BASE,
17       .irq_num = 0xff,
18       .idx = 0,
19       .sub_idx = 0,
20       .dev_type = BFLB_DEVICE_TYPE_DAC,
21       .user_data = NULL },
22     { .name = "ef_ctrl",
23       .reg_base = EF_CTRL_BASE,
24       .irq_num = 0xff,
25       .idx = 0,
26       .sub_idx = 0,
27       .dev_type = BFLB_DEVICE_TYPE_EF_CTRL,
28       .user_data = NULL },
29     { .name = "gpio",
30       .reg_base = GLB_BASE,
31       .irq_num = BL616_IRQ_GPIO_INT0,
32       .idx = 0,
33       .sub_idx = 0,
34       .dev_type = BFLB_DEVICE_TYPE_GPIO,
35       .user_data = NULL },
36     { .name = "uart0",
37       .reg_base = UART0_BASE,
38       .irq_num = BL616_IRQ_UART0,
39       .idx = 0,
40       .dev_type = BFLB_DEVICE_TYPE_UART,
41       .user_data = NULL },
42     { .name = "uart1",
43       .reg_base = UART1_BASE,
44       .irq_num = BL616_IRQ_UART1,
45       .idx = 1,
46       .dev_type = BFLB_DEVICE_TYPE_UART,
47       .user_data = NULL },
48     { .name = "spi0",
49       .reg_base = SPI_BASE,
50       .irq_num = BL616_IRQ_SPI0,
51       .idx = 0,
52       .dev_type = BFLB_DEVICE_TYPE_SPI,
53       .user_data = NULL },
54     { .name = "pwm_v2_0",
55       .reg_base = PWM_BASE,
56       .irq_num = BL616_IRQ_PWM,
57       .idx = 0,
58       .sub_idx = 0,
59       .dev_type = BFLB_DEVICE_TYPE_PWM,
60       .user_data = NULL },
61     { .name = "dma0_ch0",
62       .reg_base = DMA_BASE + 1 * DMA_CHANNEL_OFFSET,
63       .irq_num = BL616_IRQ_DMA0_ALL,
64       .idx = 0,
65       .sub_idx = 0,
66       .dev_type = BFLB_DEVICE_TYPE_DMA,
67       .user_data = NULL },
68     { .name = "dma0_ch1",
69       .reg_base = DMA_BASE + 2 * DMA_CHANNEL_OFFSET,
70       .irq_num = BL616_IRQ_DMA0_ALL,
71       .idx = 0,
72       .sub_idx = 1,
73       .dev_type = BFLB_DEVICE_TYPE_DMA,
74       .user_data = NULL },
75     { .name = "dma0_ch2",
76       .reg_base = DMA_BASE + 3 * DMA_CHANNEL_OFFSET,
77       .irq_num = BL616_IRQ_DMA0_ALL,
78       .idx = 0,
79       .sub_idx = 2,
80       .dev_type = BFLB_DEVICE_TYPE_DMA,
81       .user_data = NULL },
82     { .name = "dma0_ch3",
83       .reg_base = DMA_BASE + 4 * DMA_CHANNEL_OFFSET,
84       .irq_num = BL616_IRQ_DMA0_ALL,
85       .idx = 0,
86       .sub_idx = 3,
87       .dev_type = BFLB_DEVICE_TYPE_DMA,
88       .user_data = NULL },
89     { .name = "dma0_ch4",
90       .reg_base = DMA_BASE + 5 * DMA_CHANNEL_OFFSET,
91       .irq_num = BL616_IRQ_DMA0_ALL,
92       .idx = 0,
93       .sub_idx = 4,
94       .dev_type = BFLB_DEVICE_TYPE_DMA,
95       .user_data = NULL },
96     { .name = "dma0_ch5",
97       .reg_base = DMA_BASE + 6 * DMA_CHANNEL_OFFSET,
98       .irq_num = BL616_IRQ_DMA0_ALL,
99       .idx = 0,
100       .sub_idx = 5,
101       .dev_type = BFLB_DEVICE_TYPE_DMA,
102       .user_data = NULL },
103     { .name = "dma0_ch6",
104       .reg_base = DMA_BASE + 7 * DMA_CHANNEL_OFFSET,
105       .irq_num = BL616_IRQ_DMA0_ALL,
106       .idx = 0,
107       .sub_idx = 6,
108       .dev_type = BFLB_DEVICE_TYPE_DMA,
109       .user_data = NULL },
110     { .name = "dma0_ch7",
111       .reg_base = DMA_BASE + 8 * DMA_CHANNEL_OFFSET,
112       .irq_num = BL616_IRQ_DMA0_ALL,
113       .idx = 0,
114       .sub_idx = 7,
115       .dev_type = BFLB_DEVICE_TYPE_DMA,
116       .user_data = NULL },
117     { .name = "i2c0",
118       .reg_base = I2C0_BASE,
119       .irq_num = BL616_IRQ_I2C0,
120       .idx = 0,
121       .sub_idx = 0,
122       .dev_type = BFLB_DEVICE_TYPE_I2C,
123       .user_data = NULL },
124     { .name = "i2s0",
125       .reg_base = I2S_BASE,
126       .irq_num = BL616_IRQ_I2S,
127       .idx = 0,
128       .sub_idx = 0,
129       .dev_type = BFLB_DEVICE_TYPE_I2S,
130       .user_data = NULL },
131     { .name = "timer0",
132       .reg_base = TIMER_BASE,
133       .irq_num = BL616_IRQ_TIMER0,
134       .idx = 0,
135       .sub_idx = 0,
136       .dev_type = BFLB_DEVICE_TYPE_TIMER,
137       .user_data = NULL },
138     { .name = "timer1",
139       .reg_base = TIMER_BASE,
140       .irq_num = BL616_IRQ_TIMER1,
141       .idx = 1,
142       .sub_idx = 0,
143       .dev_type = BFLB_DEVICE_TYPE_TIMER,
144       .user_data = NULL },
145     { .name = "rtc",
146       .reg_base = HBN_BASE,
147       .irq_num = BL616_IRQ_HBN_OUT0,
148       .idx = 0,
149       .sub_idx = 0,
150       .dev_type = BFLB_DEVICE_TYPE_RTC,
151       .user_data = NULL },
152     { .name = "aes",
153       .reg_base = SEC_ENG_BASE,
154       .irq_num = 0xff,
155       .idx = 0,
156       .sub_idx = 0,
157       .dev_type = BFLB_DEVICE_TYPE_AES,
158       .user_data = NULL },
159     { .name = "sha",
160       .reg_base = SEC_ENG_BASE,
161       .irq_num = 0xff,
162       .idx = 0,
163       .sub_idx = 0,
164       .dev_type = BFLB_DEVICE_TYPE_SHA,
165       .user_data = NULL },
166     { .name = "trng",
167       .reg_base = SEC_ENG_BASE,
168       .irq_num = 0xff,
169       .idx = 0,
170       .sub_idx = 0,
171       .dev_type = BFLB_DEVICE_TYPE_TRNG,
172       .user_data = NULL },
173     { .name = "pka",
174       .reg_base = SEC_ENG_BASE,
175       .irq_num = 0xff,
176       .idx = 0,
177       .sub_idx = 0,
178       .dev_type = BFLB_DEVICE_TYPE_PKA,
179       .user_data = NULL },
180     { .name = "emac0",
181       .reg_base = EMAC_BASE,
182       .irq_num = BL616_IRQ_EMAC,
183       .idx = 0,
184       .sub_idx = 0,
185       .dev_type = BFLB_DEVICE_TYPE_ETH,
186       .user_data = NULL },
187     { .name = "watchdog",
188       .reg_base = TIMER_BASE,
189       .irq_num = BL616_IRQ_WDG,
190       .idx = 0,
191       .sub_idx = 0,
192       .dev_type = BFLB_DEVICE_TYPE_TIMER,
193       .user_data = NULL },
194     { .name = "cks",
195       .reg_base = CKS_BASE,
196       .irq_num = 0,
197       .idx = 0,
198       .sub_idx = 0,
199       .dev_type = BFLB_DEVICE_TYPE_CKS,
200       .user_data = NULL },
201     { .name = "mjpeg",
202       .reg_base = MJPEG_BASE,
203       .irq_num = BL616_IRQ_MJPEG,
204       .idx = 0,
205       .sub_idx = 0,
206       .dev_type = BFLB_DEVICE_TYPE_MJPEG,
207       .user_data = NULL },
208     { .name = "irrx",
209       .reg_base = IR_BASE,
210       .irq_num = BL616_IRQ_IRRX,
211       .idx = 0,
212       .sub_idx = 0,
213       .dev_type = BFLB_DEVICE_TYPE_IR,
214       .user_data = NULL },
215     { .name = "cam0",
216       .reg_base = DVP2AXI0_BASE,
217       .irq_num = BL616_IRQ_DVP2BUS_INT0,
218       .idx = 0,
219       .sub_idx = 0,
220       .dev_type = BFLB_DEVICE_TYPE_CAMERA,
221       .user_data = NULL },
222     { .name = "cam1",
223       .reg_base = DVP2AXI1_BASE,
224       .irq_num = BL616_IRQ_DVP2BUS_INT1,
225       .idx = 0,
226       .sub_idx = 0,
227       .dev_type = BFLB_DEVICE_TYPE_CAMERA,
228       .user_data = NULL },
229     { .name = "auadc",
230       .reg_base = AUADC_BASE,
231       .irq_num = BL616_IRQ_AUADC,
232       .idx = 0,
233       .sub_idx = 0,
234       .dev_type = BFLB_DEVICE_TYPE_AUDIOADC,
235       .user_data = NULL },
236     { .name = "audac",
237       .reg_base = AUDAC_BASE,
238       .irq_num = BL616_IRQ_AUDAC,
239       .idx = 0,
240       .sub_idx = 0,
241       .dev_type = BFLB_DEVICE_TYPE_AUDIODAC,
242       .user_data = NULL },
243     { .name = "sdio2",
244       .reg_base = SDU_BASE,
245       .irq_num = BL616_IRQ_SDIO,
246       .idx = 0,
247       .sub_idx = 0,
248       .dev_type = BFLB_DEVICE_TYPE_SDIO2,
249       .user_data = NULL },
250     { .name = "dbi",
251       .reg_base = DBI_BASE,
252       .irq_num = BL616_IRQ_DBI,
253       .idx = 0,
254       .sub_idx = 0,
255       .dev_type = BFLB_DEVICE_TYPE_DBI,
256       .user_data = NULL },
257     { .name = "plfm_dma_ch0",
258       .reg_base = PLFM_DMA_BASE,
259       .irq_num = 0,
260       .idx = 0,
261       .sub_idx = 0,
262       .dev_type = BFLB_DEVICE_TYPE_PLFMDMA,
263       .user_data = NULL },
264     { .name = "plfm_dma_ch1",
265       .reg_base = PLFM_DMA_BASE,
266       .irq_num = 0,
267       .idx = 1,
268       .sub_idx = 0,
269       .dev_type = BFLB_DEVICE_TYPE_PLFMDMA,
270       .user_data = NULL },
271     { .name = "plfm_dma_ch2",
272       .reg_base = PLFM_DMA_BASE,
273       .irq_num = 0,
274       .idx = 2,
275       .sub_idx = 0,
276       .dev_type = BFLB_DEVICE_TYPE_PLFMDMA,
277       .user_data = NULL },
278     { .name = "plfm_dma_ch3",
279       .reg_base = PLFM_DMA_BASE,
280       .irq_num = 0,
281       .idx = 3,
282       .sub_idx = 0,
283       .dev_type = BFLB_DEVICE_TYPE_PLFMDMA,
284       .user_data = NULL },
285     { .name = "plfm_dma_ch4",
286       .reg_base = PLFM_DMA_BASE,
287       .irq_num = 0,
288       .idx = 4,
289       .sub_idx = 0,
290       .dev_type = BFLB_DEVICE_TYPE_PLFMDMA,
291       .user_data = NULL },
292 };
293 
bflb_device_get_by_name(const char * name)294 struct bflb_device_s *bflb_device_get_by_name(const char *name)
295 {
296     for (uint8_t i = 0; i < sizeof(bl616_device_table) / sizeof(bl616_device_table[0]); i++) {
297         if (strcmp(bl616_device_table[i].name, name) == 0) {
298             return &bl616_device_table[i];
299         }
300     }
301     return NULL;
302 }
303 
bflb_device_get_by_id(uint8_t type,uint8_t idx)304 struct bflb_device_s *bflb_device_get_by_id(uint8_t type, uint8_t idx)
305 {
306     for (uint8_t i = 0; i < sizeof(bl616_device_table) / sizeof(bl616_device_table[0]); i++) {
307         if ((bl616_device_table[i].dev_type == type) && (bl616_device_table[i].idx = idx)) {
308             return &bl616_device_table[i];
309         }
310     }
311     return NULL;
312 }
313 
bflb_device_set_userdata(struct bflb_device_s * device,void * user_data)314 void bflb_device_set_userdata(struct bflb_device_s *device, void *user_data)
315 {
316     device->user_data = user_data;
317 }