1/*******************************************************************************
2 * (c) Copyright 2015 Microsemi SoC Products Group.  All rights reserved.
3 *
4 * file name : debug-in-microsemi-smartfusion2-envm.ld
5 * SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
6 * debug image executing in SmartFusion2 internal eNVM.
7 *
8 * Some current (April 2015) dev kit memory map possibilities are
9 * --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
10 * --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
11 * --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
12 * --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
13 * --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
14 * --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
15 * --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
16 * --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
17 * --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
18 * --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
19 * --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
20 * --Some older physical memory map possibilities are
21 * --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
22 * --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
23 * --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
24 *
25 * Example linker scripts use lowest practicl values so will work accross dev kits
26 * eNVM=256KB  eRAM=64KB  External memory = 64MB
27 *
28 * On reset, the eNVM region is mapped to 0x00000000
29 * This is changed below by setting the __smartfusion2_memory_remap variable as required.
30 * Options are detailed below.
31 *
32 * SVN $Revision: 7419 $
33 * SVN $Date: 2015-05-15 21:20:21 +0530 (Fri, 15 May 2015) $
34 */
35
36OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
37GROUP(-lc -lgcc -lm)
38OUTPUT_ARCH(arm)
39ENTRY(Reset_Handler)
40SEARCH_DIR(.)
41__DYNAMIC  =  0;
42
43/*******************************************************************************
44 * Start of board customization.
45 *******************************************************************************/
46MEMORY
47{
48	/*
49	*	In general, example LD scripts use lowest common memory footprint
50	*	so will work with all devices.
51	*/
52	/*
53	* WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
54	*          the name of the type of flash memory are all in a specific order.
55	*          Please do not modify that comment line, in order to ensure
56	*          debugging of your application will use the flash memory correctly.
57	*/
58
59	/* SOFTCONSOLE FLASH USE: microsemi-smartfusion2-envm */
60	rom (rx)  : ORIGIN = 0x60000000, LENGTH = 256k
61
62	/* SmartFusion2 internal eNVM mirrored to 0x00000000 */
63	romMirror (rx) : ORIGIN = 0x00000000, LENGTH = 256k
64
65	/* SmartFusion2 internal eSRAM */
66	ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
67}
68
69RAM_START_ADDRESS 	= 0x20000000;     	/* Must be the same value MEMORY region ram ORIGIN above. */
70RAM_SIZE 			= 64k;              /* Must be the same value MEMORY region ram LENGTH above. */
71MAIN_STACK_SIZE 	= 4k;               /* Cortex main stack size. */
72MIN_SIZE_HEAP 		= 4k;				/* needs to be calculated for your application */
73
74/*******************************************************************************
75 * End of board customization.
76 *******************************************************************************/
77
78PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
79PROVIDE (_estack = __main_stack_start);
80PROVIDE (__mirrored_nvm = 1);   /* Indicate to startup code that NVM is mirrored to VMA address and no text copy is required. */
81
82/*
83 * 	Remap instruction for startup code and debugger.
84 *  set __smartfusion2_memory_remap to one of the following:
85 *  0: remap eNVM to address 0x00000000       			Production mode or debugging from eNVM
86 *  1: remap eSRAM to address 0x00000000				Debugging from eSRAM
87 *  2: remap external DDR memory to address 0x00000000  Debugging from DDR memory
88 */
89PROVIDE (__smartfusion2_memory_remap = 0);
90
91SECTIONS
92{
93  .vector_table : ALIGN(0x10)
94  {
95    __vector_table_load = LOADADDR(.vector_table);
96    __vector_table_start = .;
97    __vector_table_vma_base_address = .;			/* required by debugger for start address */
98    KEEP(*(.isr_vector))
99    . = ALIGN(0x10);
100    _evector_table = .;
101  } >romMirror AT>rom
102
103   /* all data and code run/used before reloaction must be located here */
104   /* When all code in NVRAM, no requirement for this section- but adds clarity when looking at .lst file */
105  .boot_code : ALIGN(0x10)
106  {
107    *(.boot_code)				        /* reset handler */
108    *system_m2sxxx.o(.text*) 	        /* SystemInit() - called before relocation to RAM so keep in ROM */
109    *sys_config.o(.rodata*)
110    . = ALIGN(0x10);
111  } >romMirror AT>rom
112
113  .text : ALIGN(0x10)
114  {
115    CREATE_OBJECT_SYMBOLS
116    __text_load = LOADADDR(.text);									/* required when copying to RAM */
117    __text_start = .;												/* required when copying to RAM */
118    *(.text .text.* .gnu.linkonce.t.*)
119    *(.plt)
120    *(.gnu.warning)
121    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
122
123    . = ALIGN(4);
124    /* These are for running static constructors and destructors under ELF.  */
125    KEEP (*crtbegin.o(.ctors))
126    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
127    KEEP (*(SORT(.ctors.*)))
128    KEEP (*crtend.o(.ctors))
129    KEEP (*crtbegin.o(.dtors))
130    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
131    KEEP (*(SORT(.dtors.*)))
132    KEEP (*crtend.o(.dtors))
133
134    *(.rodata .rodata.* .gnu.linkonce.r.*)
135
136    *(.ARM.extab* .gnu.linkonce.armextab.*)
137    *(.gcc_except_table)
138    *(.eh_frame_hdr)
139    *(.eh_frame)
140
141    KEEP (*(.vector_table))
142    KEEP (*(.init))
143    KEEP (*(.fini))
144
145    PROVIDE_HIDDEN (__preinit_array_start = .);
146    KEEP (*(.preinit_array))
147    PROVIDE_HIDDEN (__preinit_array_end = .);
148    PROVIDE_HIDDEN (__init_array_start = .);
149    KEEP (*(SORT(.init_array.*)))
150    KEEP (*(.init_array))
151    PROVIDE_HIDDEN (__init_array_end = .);
152    PROVIDE_HIDDEN (__fini_array_start = .);
153    KEEP (*(.fini_array))
154    KEEP (*(SORT(.fini_array.*)))
155    PROVIDE_HIDDEN (__fini_array_end = .);
156    . = ALIGN(0x10);
157  } >romMirror AT>rom
158
159  /* .ARM.exidx is sorted, so has to go in its own output section.  */
160   __exidx_start = .;
161  .ARM.exidx :
162  {
163    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
164  } >ram AT>rom
165  __exidx_end = .;
166  _etext = .;													/* required when copying to RAM */
167
168  .data : ALIGN(0x10)
169  {
170    __data_load = LOADADDR(.data);								/* used when copying to RAM */
171    _sidata = LOADADDR (.data);
172    __data_start = .;											/* used when copying to RAM */
173    _sdata = .;
174    KEEP(*(.jcr))
175    *(.got.plt) *(.got)
176    *(.shdata)
177    *(.data .data.* .gnu.linkonce.d.*)
178    . = ALIGN (0x10);
179    _edata = .;													/* used when copying to RAM */
180  } >ram AT>rom
181
182  .bss : ALIGN(0x10)
183  {
184    __bss_start__ = . ;
185    _sbss = .;
186    *(.shbss)
187    *(.bss .bss.* .gnu.linkonce.b.*)
188    *(COMMON)
189    . = ALIGN(0x10);
190    __bss_end__ = .;
191    _end = .;
192    __end = _end;
193    _ebss = .;
194    PROVIDE(end = .);
195  } >ram AT>rom
196
197  .heap : ALIGN(0x10)
198  {
199    __heap_start__ = .;
200    . += MIN_SIZE_HEAP;			/* will generate error if this minimum size not available */
201    . += ((ABSOLUTE(RAM_START_ADDRESS) + RAM_SIZE - MAIN_STACK_SIZE) - .); /* assumes stack starts after heap */
202    _eheap = .;
203  } >ram
204
205  .stack : ALIGN(0x10)
206  {
207    __stack_start__ = .;
208    . += MAIN_STACK_SIZE;
209    _estack = .;
210  } >ram
211
212  .stab 0 (NOLOAD) :
213  {
214    *(.stab)
215  }
216
217  .stabstr 0 (NOLOAD) :
218  {
219    *(.stabstr)
220  }
221  /* DWARF debug sections.
222     Symbols in the DWARF debugging sections are relative to the beginning
223     of the section so we begin them at 0.  */
224  /* DWARF 1 */
225  .debug          0 : { *(.debug) }
226  .line           0 : { *(.line) }
227  /* GNU DWARF 1 extensions */
228  .debug_srcinfo  0 : { *(.debug_srcinfo) }
229  .debug_sfnames  0 : { *(.debug_sfnames) }
230  /* DWARF 1.1 and DWARF 2 */
231  .debug_aranges  0 : { *(.debug_aranges) }
232  .debug_pubnames 0 : { *(.debug_pubnames) }
233  /* DWARF 2 */
234  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
235  .debug_abbrev   0 : { *(.debug_abbrev) }
236  .debug_line     0 : { *(.debug_line) }
237  .debug_frame    0 : { *(.debug_frame) }
238  .debug_str      0 : { *(.debug_str) }
239  .debug_loc      0 : { *(.debug_loc) }
240  .debug_macinfo  0 : { *(.debug_macinfo) }
241  /* SGI/MIPS DWARF 2 extensions */
242  .debug_weaknames 0 : { *(.debug_weaknames) }
243  .debug_funcnames 0 : { *(.debug_funcnames) }
244  .debug_typenames 0 : { *(.debug_typenames) }
245  .debug_varnames  0 : { *(.debug_varnames) }
246  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
247  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
248  /DISCARD/ : { *(.note.GNU-stack)  }
249}
250