1 /*
2  * Copyright 2019-2021, 2023 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #ifndef _DISPLAY_SUPPORT_H_
9 #define _DISPLAY_SUPPORT_H_
10 
11 #include <rtthread.h>
12 
13 #include "fsl_dc_fb.h"
14 
15 #if defined(DISPLAY_USING_RK055AHD091)
16 #include "fsl_rm68200.h"
17 #elif defined(DISPLAY_USING_RK055IQH091)
18 #include "fsl_rm68191.h"
19 #elif defined(DISPLAY_USING_RK055MHD091)
20 #include "fsl_hx8394.h"
21 #else
22 #error "Please config lcd panel parameters."
23 #endif
24 #include "pin_mux.h"
25 #include "board.h"
26 
27 #if defined(BSP_USING_LCDIFV2)
28 #include "fsl_dc_fb_lcdifv2.h"
29 #elif defined(BSP_USING_ELCDIF)
30 #include "fsl_dc_fb_elcdif.h"
31 #endif
32 
33 /*******************************************************************************
34  * Definitions
35  ******************************************************************************/
36 
37 /* @TEST_ANCHOR */
38 #define DEMO_BUFFER_FIXED_ADDRESS 0
39 
40 #if DEMO_BUFFER_FIXED_ADDRESS
41 #define DEMO_BUFFER0_ADDR 0x80000000
42 #define DEMO_BUFFER1_ADDR 0x80200000
43 #endif
44 
45 /*
46  * Use the MIPI dumb panel
47  */
48 
49 /* Definitions for the frame buffer. */
50 #define DEMO_BUFFER_COUNT 2 /* 2 is enough for DPI interface display. */
51 
52 #ifndef DEMO_USE_XRGB8888
53 #define DEMO_USE_XRGB8888 0
54 #endif
55 
56 /* Use LCDIF LUT (or named color palette) which is 8-bit per-pixel */
57 #ifndef DEMO_USE_LUT8
58 #define DEMO_USE_LUT8 0
59 #endif
60 
61 #if DEMO_USE_XRGB8888
62 #define DEMO_BUFFER_PIXEL_FORMAT   kVIDEO_PixelFormatXRGB8888
63 #define DEMO_BUFFER_BYTE_PER_PIXEL 4
64 #elif DEMO_USE_LUT8
65 #define DEMO_BUFFER_PIXEL_FORMAT   kVIDEO_PixelFormatLUT8
66 #define DEMO_BUFFER_BYTE_PER_PIXEL 1
67 #else
68 #define DEMO_BUFFER_PIXEL_FORMAT   kVIDEO_PixelFormatRGB565
69 #define DEMO_BUFFER_BYTE_PER_PIXEL 2
70 #endif
71 
72 #if (defined(DISPLAY_USING_RK055AHD091) || defined(DISPLAY_USING_RK055MHD091))
73 
74 #define LCD_MIPI_WIDTH  (720)
75 #define LCD_MIPI_HEIGHT (1280)
76 
77 #elif defined(DISPLAY_USING_RK055IQH091)
78 
79 #define LCD_MIPI_WIDTH  (540)
80 #define LCD_MIPI_HEIGHT (960)
81 
82 #endif
83 
84 #define DEMO_BUFFER_WIDTH  LCD_MIPI_WIDTH
85 #define DEMO_BUFFER_HEIGHT LCD_MIPI_HEIGHT
86 
87 /* Where the frame buffer is shown in the screen. */
88 #define DEMO_BUFFER_START_X 0U
89 #define DEMO_BUFFER_START_Y 0U
90 
91 #define DEMO_BUFFER_STRIDE_BYTE (DEMO_BUFFER_WIDTH * DEMO_BUFFER_BYTE_PER_PIXEL)
92 /* There is not frame buffer aligned requirement, consider the 64-bit AXI data
93  * bus width and 32-byte cache line size, the frame buffer alignment is set to
94  * 32 byte.
95  */
96 #define FRAME_BUFFER_ALIGN 32
97 
98 /*
99  * MIPI panel pin
100  */
101 #define BOARD_MIPI_PANEL_RST_GPIO   GPIO9
102 #define BOARD_MIPI_PANEL_RST_PIN    1
103 #define BOARD_MIPI_PANEL_POWER_GPIO GPIO11
104 #define BOARD_MIPI_PANEL_POWER_PIN  16
105 /* Back light pin. */
106 #define BOARD_MIPI_PANEL_BL_GPIO    GPIO9
107 #define BOARD_MIPI_PANEL_BL_PIN     29
108 
109 /*
110  * MIPI panel pin for RT-Thread
111  */
112 #define GET_PIN(PORTx, PIN)  (32 * (PORTx - 1) + (PIN & 31))    /* PORTx:1,2,3,4,5 */
113 #define LCD_MIPI_RST_GPIO_PORT    (3U)
114 #define LCD_MIPI_RST_GPIO_PIN     (1U)
115 #define LCD_MIPI_RST_PIN          GET_PIN(LCD_MIPI_RST_GPIO_PORT, LCD_MIPI_RST_GPIO_PIN)
116 /* Back light pin. */
117 #define LCD_MIPI_BL_GPIO_PORT     (3U)
118 #define LCD_MIPI_BL_GPIO_PIN      (29U)
119 #define LCD_MIPI_BL_PIN           GET_PIN(LCD_MIPI_BL_GPIO_PORT, LCD_MIPI_BL_GPIO_PIN)
120 
121 /*
122  * RK055AHD091 panel
123  */
124 
125 #if defined(DISPLAY_USING_RK055AHD091)
126 #define LCD_MIPI_HSW 8
127 #define LCD_MIPI_HFP 32
128 #define LCD_MIPI_HBP 32
129 #define LCD_MIPI_VSW 2
130 #define LCD_MIPI_VFP 16
131 #define LCD_MIPI_VBP 14
132 
133 #elif defined(DISPLAY_USING_RK055IQH091)
134 
135 #define LCD_MIPI_HSW 2
136 #define LCD_MIPI_HFP 32
137 #define LCD_MIPI_HBP 30
138 #define LCD_MIPI_VSW 2
139 #define LCD_MIPI_VFP 16
140 #define LCD_MIPI_VBP 14
141 
142 #elif defined(DISPLAY_USING_RK055MHD091)
143 
144 #define LCD_MIPI_HSW 6
145 #define LCD_MIPI_HFP 12
146 #define LCD_MIPI_HBP 24
147 #define LCD_MIPI_VSW 2
148 #define LCD_MIPI_VFP 16
149 #define LCD_MIPI_VBP 14
150 
151 #endif
152 
153 #if defined(BSP_USING_LCDIFV2)
154 
155 #define DEMO_LCDIF_POL_FLAGS                                                             \
156     (kLCDIFV2_DataEnableActiveHigh | kLCDIFV2_VsyncActiveLow | kLCDIFV2_HsyncActiveLow | \
157      kLCDIFV2_DriveDataOnFallingClkEdge)
158 
159 #define DEMO_LCDIF LCDIFV2
160 
161 #elif defined(BSP_USING_ELCDIF)
162 
163 #define DEMO_LCDIF_POL_FLAGS \
164     (kELCDIF_DataEnableActiveHigh | kELCDIF_VsyncActiveLow | kELCDIF_HsyncActiveLow | kELCDIF_DriveDataOnFallingClkEdge)
165 
166 #define DEMO_LCDIF LCDIF
167 
168 #endif
169 
170 /* Definitions for MIPI. */
171 #define DEMO_LCD_MIPI          (&g_mipiDsi)
172 #define DEMO_LCD_MIPI_LANE_NUM 2
173 
174 extern const dc_fb_t g_dc;
175 
176 /*******************************************************************************
177  * API
178  ******************************************************************************/
179 #if defined(__cplusplus)
180 extern "C" {
181 #endif /* __cplusplus */
182 
183 status_t BOARD_PrepareDisplayController(void);
184 
185 #if defined(__cplusplus)
186 }
187 #endif /* __cplusplus */
188 
189 #endif /* _DISPLAY_SUPPORT_H_ */
190