1 /* 2 * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 /****************************************************************************** 17 * @file drv_dmac.h 18 * @brief header file for dmac driver 19 * @version V1.0 20 * @date 02. June 2017 21 ******************************************************************************/ 22 #ifndef _CSI_DMA_H_ 23 #define _CSI_DMA_H_ 24 25 #ifdef __cplusplus 26 extern "C" { 27 #endif 28 29 #include <stdint.h> 30 #include <drv_common.h> 31 32 /// definition for dmac handle. 33 typedef void *dmac_handle_t; 34 35 /** 36 \brief DMA Driver Capabilities. 37 */ 38 typedef struct { 39 uint32_t unalign_addr : 1; ///< support for unalign address transfer when memory is source 40 } dma_capabilities_t; 41 42 typedef enum { 43 DMA_STATE_FREE = 0, ///< DMA not yet initialized or disabled 44 DMA_STATE_READY, ///< DMA process success and ready for use, but not start yet 45 DMA_STATE_BUSY, ///< DMA process is ongoing 46 DMA_STATE_ERROR, ///< DMA transfer error 47 DMA_STATE_DONE, ///< DMA transfer done 48 } dma_status_e; 49 50 /****** DMA specific error codes *****/ 51 typedef enum { 52 EDRV_DMA_MODE = (EDRV_SPECIFIC + 1), ///< Specified Mode not supported 53 } dma_error_e; 54 55 /****** DMA Event *****/ 56 typedef enum { 57 DMA_EVENT_TRANSFER_DONE = 0, ///< transfer complete 58 DMA_EVENT_TRANSFER_ERROR = 1, ///< transfer error 59 } dma_event_e; 60 61 typedef enum { 62 DMA_ADDR_INC = 0, 63 DMA_ADDR_DEC, 64 DMA_ADDR_CONSTANT 65 } dma_addr_inc_e; 66 67 typedef enum { 68 DMA_MEM2MEM = 0, 69 DMA_MEM2PERH, 70 DMA_PERH2MEM, 71 DMA_PERH2PERH, 72 } dma_trans_type_e; 73 74 typedef struct { 75 dma_addr_inc_e src_inc; ///< source address increment 76 dma_addr_inc_e dst_inc; ///< destination address increment 77 uint8_t src_tw; ///< source transfer width in byte 78 uint8_t dst_tw; ///< destination transfer width in byte 79 uint8_t hs_if; ///< a hardware handshaking interface 80 dma_trans_type_e type; ///< transfer type 81 } dma_config_t; 82 83 typedef void (*dma_event_cb_t)(dma_event_e event, int32_t ch); ///< Pointer to \ref dma_event_cb_t : CRC Event call back. 84 85 /** 86 \brief get dma instance count. 87 \return dma instance count 88 */ 89 int32_t csi_dma_get_instance_count(void); 90 91 /** 92 \brief Initialize DMA Interface. 1. Initializes the resources needed for the DMA interface 2.registers event callback function 93 \param[in] idx must not exceed return value of csi_dma_get_instance_count() 94 \return pointer to dma instances 95 */ 96 dmac_handle_t csi_dma_initialize(int32_t idx); 97 98 /** 99 \brief De-initialize DMA Interface. stops operation and releases the software resources used by the interface 100 \param[in] handle damc handle to operate. 101 \return error code 102 */ 103 int32_t csi_dma_uninitialize(dmac_handle_t handle); 104 /** 105 \brief Get driver capabilities. 106 \param[in] handle damc handle to operate. 107 \return \ref dma_capabilities_t 108 */ 109 dma_capabilities_t csi_dma_get_capabilities(dmac_handle_t handle); 110 111 /** 112 \brief get one free dma channel 113 \param[in] handle damc handle to operate. 114 \param[in] ch channel num. if -1 then allocate a free channal in this dma 115 \return -1 - no channel can be used, other - channel index 116 */ 117 int32_t csi_dma_alloc_channel(dmac_handle_t handle, int32_t ch); 118 119 /** 120 \brief release dma channel and related resources 121 \param[in] handle damc handle to operate. 122 \param[in] ch channel num. 123 \return error code 124 */ 125 int32_t csi_dma_release_channel(dmac_handle_t handle, int32_t ch); 126 127 /** 128 \brief 129 \param[in] handle damc handle to operate. 130 \param[in] ch channel num. if -1 then allocate a free channal in this dma 131 \param[in] psrcaddr dma transfer source address 132 \param[in] pstdaddr dma transfer source address 133 \param[in] length dma transfer length 134 \param[in] config dma transfer configure 135 \param[in] cb_event Pointer to \ref dma_event_cb_t 136 \return error code 137 */ 138 int32_t csi_dma_config(dmac_handle_t handle, int32_t ch, 139 void *psrcaddr, void *pstdaddr, 140 uint32_t length, dma_config_t *config, dma_event_cb_t cb_event); 141 142 /** 143 \brief start generate dma signal. 144 \param[in] handle damc handle to operate. 145 \param[in] ch channel num. 146 \return error code 147 */ 148 int32_t csi_dma_start(dmac_handle_t handle, int32_t ch); 149 150 /** 151 \brief Stop generate dma signal. 152 \param[in] handle damc handle to operate. 153 \param[in] ch channel num. 154 \return error code 155 */ 156 int32_t csi_dma_stop(dmac_handle_t handle, int32_t ch); 157 158 /** 159 \brief Get DMA status. 160 \param[in] handle damc handle to operate. 161 \param[in] ch channel num. 162 \return DMA status \ref dma_status_e 163 */ 164 dma_status_e csi_dma_get_status(dmac_handle_t handle, int32_t ch); 165 166 #ifdef __cplusplus 167 } 168 #endif 169 170 #endif /* _CSI_DMA_H_ */ 171 172