1 /*
2 * Copyright (c) 2006-2021, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2019-05-23 WillianChan first version
9 */
10
11 #include <board.h>
12 #include <drv_gpio.h>
13
14 #ifdef BSP_USING_LCD_OTM8009A
15 extern DSI_HandleTypeDef hdsi;
16 extern DSI_VidCfgTypeDef hdsi_video;
17
18 const rt_uint8_t RDL01[] = {0x80, 0x09, 0x01, 0xFF};
19 const rt_uint8_t RDL02[] = {0x80, 0x09, 0xFF};
20 const rt_uint8_t RDL03[] = {0x00, 0x09, 0x0F, 0x0E, 0x07, 0x10, 0x0B, 0x0A, 0x04, 0x07, 0x0B, 0x08, 0x0F, 0x10, 0x0A, 0x01, 0xE1};
21 const rt_uint8_t RDL04[] = {0x00, 0x09, 0x0F, 0x0E, 0x07, 0x10, 0x0B, 0x0A, 0x04, 0x07, 0x0B, 0x08, 0x0F, 0x10, 0x0A, 0x01, 0xE2};
22 const rt_uint8_t RDL05[] = {0x79, 0x79, 0xD8};
23 const rt_uint8_t RDL06[] = {0x00, 0x01, 0xB3};
24 const rt_uint8_t RDL07[] = {0x85, 0x01, 0x00, 0x84, 0x01, 0x00, 0xCE};
25 const rt_uint8_t RDL08[] = {0x18, 0x04, 0x03, 0x39, 0x00, 0x00, 0x00, 0x18, 0x03, 0x03, 0x3A, 0x00, 0x00, 0x00, 0xCE};
26 const rt_uint8_t RDL09[] = {0x18, 0x02, 0x03, 0x3B, 0x00, 0x00, 0x00, 0x18, 0x01, 0x03, 0x3C, 0x00, 0x00, 0x00, 0xCE};
27 const rt_uint8_t RDL10[] = {0x01, 0x01, 0x20, 0x20, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0xCF};
28 const rt_uint8_t RDL11[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCB};
29 const rt_uint8_t RDL12[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCB};
30 const rt_uint8_t RDL13[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCB};
31 const rt_uint8_t RDL14[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCB};
32 const rt_uint8_t RDL15[] = {0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCB};
33 const rt_uint8_t RDL16[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0xCB};
34 const rt_uint8_t RDL17[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCB};
35 const rt_uint8_t RDL18[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xCB};
36 const rt_uint8_t RDL19[] = {0x00, 0x26, 0x09, 0x0B, 0x01, 0x25, 0x00, 0x00, 0x00, 0x00, 0xCC};
37 const rt_uint8_t RDL20[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x26, 0x0A, 0x0C, 0x02, 0xCC};
38 const rt_uint8_t RDL21[] = {0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCC};
39 const rt_uint8_t RDL22[] = {0x00, 0x25, 0x0C, 0x0A, 0x02, 0x26, 0x00, 0x00, 0x00, 0x00, 0xCC};
40 const rt_uint8_t RDL23[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x25, 0x0B, 0x09, 0x01, 0xCC};
41 const rt_uint8_t RDL24[] = {0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCC};
42 const rt_uint8_t RDL25[] = {0xFF, 0xFF, 0xFF, 0xFF};
43 const rt_uint8_t RDL27[] = {0x00, 0x00, 0x03, 0x1F, 0x2A};
44 const rt_uint8_t RDL28[] = {0x00, 0x00, 0x01, 0xDF, 0x2B};
45
46 const rt_uint8_t RDS01[] = {0x00, 0x00};
47 const rt_uint8_t RDS02[] = {0x00, 0x80};
48 const rt_uint8_t RDS03[] = {0xC4, 0x30};
49 const rt_uint8_t RDS04[] = {0x00, 0x8A};
50 const rt_uint8_t RDS05[] = {0xC4, 0x40};
51 const rt_uint8_t RDS06[] = {0x00, 0xB1};
52 const rt_uint8_t RDS07[] = {0xC5, 0xA9};
53 const rt_uint8_t RDS08[] = {0x00, 0x91};
54 const rt_uint8_t RDS09[] = {0xC5, 0x34};
55 const rt_uint8_t RDS10[] = {0x00, 0xB4};
56 const rt_uint8_t RDS11[] = {0xC0, 0x50};
57 const rt_uint8_t RDS12[] = {0xD9, 0x4E};
58 const rt_uint8_t RDS13[] = {0x00, 0x81};
59 const rt_uint8_t RDS14[] = {0xC1, 0x66};
60 const rt_uint8_t RDS15[] = {0x00, 0xA1};
61 const rt_uint8_t RDS16[] = {0xC1, 0x08};
62 const rt_uint8_t RDS17[] = {0x00, 0x92};
63 const rt_uint8_t RDS18[] = {0xC5, 0x01};
64 const rt_uint8_t RDS19[] = {0x00, 0x95};
65 const rt_uint8_t RDS20[] = {0x00, 0x94};
66 const rt_uint8_t RDS21[] = {0xC5, 0x33};
67 const rt_uint8_t RDS22[] = {0x00, 0xA3};
68 const rt_uint8_t RDS23[] = {0xC0, 0x1B};
69 const rt_uint8_t RDS24[] = {0x00, 0x82};
70 const rt_uint8_t RDS25[] = {0xC5, 0x83};
71 const rt_uint8_t RDS26[] = {0xC4, 0x83};
72 const rt_uint8_t RDS27[] = {0xC1, 0x0E};
73 const rt_uint8_t RDS28[] = {0x00, 0xA6};
74 const rt_uint8_t RDS29[] = {0x00, 0xA0};
75 const rt_uint8_t RDS30[] = {0x00, 0xB0};
76 const rt_uint8_t RDS31[] = {0x00, 0xC0};
77 const rt_uint8_t RDS32[] = {0x00, 0xD0};
78 const rt_uint8_t RDS33[] = {0x00, 0x90};
79 const rt_uint8_t RDS34[] = {0x00, 0xE0};
80 const rt_uint8_t RDS35[] = {0x00, 0xF0};
81 const rt_uint8_t RDS36[] = {0x11, 0x00};
82 const rt_uint8_t RDS37[] = {0x3A, 0x55};
83 const rt_uint8_t RDS38[] = {0x3A, 0x77};
84 const rt_uint8_t RDS39[] = {0x36, 0x60};
85 const rt_uint8_t RDS40[] = {0x51, 0x7F};
86 const rt_uint8_t RDS41[] = {0x53, 0x2C};
87 const rt_uint8_t RDS42[] = {0x55, 0x02};
88 const rt_uint8_t RDS43[] = {0x5E, 0xFF};
89 const rt_uint8_t RDS44[] = {0x29, 0x00};
90 const rt_uint8_t RDS45[] = {0x2C, 0x00};
91 const rt_uint8_t RDS46[] = {0xCF, 0x00};
92 const rt_uint8_t RDS47[] = {0xC5, 0x66};
93 const rt_uint8_t RDS48[] = {0x00, 0xB6};
94 const rt_uint8_t RDS49[] = {0xF5, 0x06};
95 const rt_uint8_t RDS50[] = {0x00, 0xB1};
96 const rt_uint8_t RDS51[] = {0xC6, 0x06};
97
otm8009a_reset(void)98 void otm8009a_reset(void)
99 {
100 rt_pin_mode (GET_PIN(H, 7), PIN_MODE_OUTPUT);
101 rt_pin_write(GET_PIN(H, 7), PIN_LOW);
102 rt_thread_delay(rt_tick_from_millisecond(20));
103 rt_pin_write(GET_PIN(H, 7), PIN_HIGH);
104 rt_thread_delay(rt_tick_from_millisecond(20));
105 }
106
otm8009a_write_cmd(uint8_t * p,uint32_t num)107 static void otm8009a_write_cmd(uint8_t *p, uint32_t num)
108 {
109 if (num <= 1)
110 {
111 HAL_DSI_ShortWrite(&hdsi, hdsi_video.VirtualChannelID, DSI_DCS_SHORT_PKT_WRITE_P1, p[0], p[1]);
112 }
113 else
114 {
115 HAL_DSI_LongWrite(&hdsi, hdsi_video.VirtualChannelID, DSI_DCS_LONG_PKT_WRITE, num, p[num], p);
116 }
117 }
118
otm8009a_delay(uint32_t d)119 static void otm8009a_delay(uint32_t d)
120 {
121 rt_thread_delay(rt_tick_from_millisecond(d));
122 }
123
otm8009a_config(rt_uint32_t pixel_format)124 static void otm8009a_config(rt_uint32_t pixel_format)
125 {
126 otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
127 otm8009a_write_cmd((rt_uint8_t *)RDL01, 3);
128 otm8009a_write_cmd((rt_uint8_t *)RDS02, 0);
129 otm8009a_write_cmd((rt_uint8_t *)RDL02, 2);
130 otm8009a_write_cmd((rt_uint8_t *)RDS02, 0);
131 otm8009a_write_cmd((rt_uint8_t *)RDS03, 0);
132 otm8009a_delay(10);
133
134 otm8009a_write_cmd((rt_uint8_t *)RDS04, 0);
135 otm8009a_write_cmd((rt_uint8_t *)RDS05, 0);
136 otm8009a_delay(10);
137
138 otm8009a_write_cmd((rt_uint8_t *)RDS06, 0);
139 otm8009a_write_cmd((rt_uint8_t *)RDS07, 0);
140 otm8009a_write_cmd((rt_uint8_t *)RDS08, 0);
141 otm8009a_write_cmd((rt_uint8_t *)RDS09, 0);
142 otm8009a_write_cmd((rt_uint8_t *)RDS10, 0);
143 otm8009a_write_cmd((rt_uint8_t *)RDS11, 0);
144 otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
145 otm8009a_write_cmd((rt_uint8_t *)RDS12, 0);
146 otm8009a_write_cmd((rt_uint8_t *)RDS13, 0);
147 otm8009a_write_cmd((rt_uint8_t *)RDS14, 0);
148 otm8009a_write_cmd((rt_uint8_t *)RDS15, 0);
149 otm8009a_write_cmd((rt_uint8_t *)RDS16, 0);
150 otm8009a_write_cmd((rt_uint8_t *)RDS17, 0);
151 otm8009a_write_cmd((rt_uint8_t *)RDS18, 0);
152 otm8009a_write_cmd((rt_uint8_t *)RDS19, 0);
153 otm8009a_write_cmd((rt_uint8_t *)RDS09, 0);
154 otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
155 otm8009a_write_cmd((rt_uint8_t *)RDL05, 2);
156 otm8009a_write_cmd((rt_uint8_t *)RDS20, 0);
157 otm8009a_write_cmd((rt_uint8_t *)RDS21, 0);
158 otm8009a_write_cmd((rt_uint8_t *)RDS22, 0);
159 otm8009a_write_cmd((rt_uint8_t *)RDS23, 0);
160 otm8009a_write_cmd((rt_uint8_t *)RDS24, 0);
161 otm8009a_write_cmd((rt_uint8_t *)RDS25, 0);
162 otm8009a_write_cmd((rt_uint8_t *)RDS13, 0);
163 otm8009a_write_cmd((rt_uint8_t *)RDS26, 0);
164 otm8009a_write_cmd((rt_uint8_t *)RDS15, 0);
165 otm8009a_write_cmd((rt_uint8_t *)RDS27, 0);
166 otm8009a_write_cmd((rt_uint8_t *)RDS28, 0);
167 otm8009a_write_cmd((rt_uint8_t *)RDL06, 2);
168 otm8009a_write_cmd((rt_uint8_t *)RDS02, 0);
169 otm8009a_write_cmd((rt_uint8_t *)RDL07, 6);
170 otm8009a_write_cmd((rt_uint8_t *)RDS29, 0);
171 otm8009a_write_cmd((rt_uint8_t *)RDL08, 14);
172 otm8009a_write_cmd((rt_uint8_t *)RDS30, 0);
173 otm8009a_write_cmd((rt_uint8_t *)RDL09, 14);
174 otm8009a_write_cmd((rt_uint8_t *)RDS31, 0);
175 otm8009a_write_cmd((rt_uint8_t *)RDL10, 10);
176 otm8009a_write_cmd((rt_uint8_t *)RDS32, 0);
177 otm8009a_write_cmd((rt_uint8_t *)RDS46, 0);
178 otm8009a_write_cmd((rt_uint8_t *)RDS02, 0);
179 otm8009a_write_cmd((rt_uint8_t *)RDL11, 10);
180 otm8009a_write_cmd((rt_uint8_t *)RDS33, 0);
181 otm8009a_write_cmd((rt_uint8_t *)RDL12, 15);
182 otm8009a_write_cmd((rt_uint8_t *)RDS29, 0);
183 otm8009a_write_cmd((rt_uint8_t *)RDL13, 15);
184 otm8009a_write_cmd((rt_uint8_t *)RDS30, 0);
185 otm8009a_write_cmd((rt_uint8_t *)RDL14, 10);
186 otm8009a_write_cmd((rt_uint8_t *)RDS31, 0);
187 otm8009a_write_cmd((rt_uint8_t *)RDL15, 15);
188 otm8009a_write_cmd((rt_uint8_t *)RDS32, 0);
189 otm8009a_write_cmd((rt_uint8_t *)RDL16, 15);
190 otm8009a_write_cmd((rt_uint8_t *)RDS34, 0);
191 otm8009a_write_cmd((rt_uint8_t *)RDL17, 10);
192 otm8009a_write_cmd((rt_uint8_t *)RDS35, 0);
193 otm8009a_write_cmd((rt_uint8_t *)RDL18, 10);
194 otm8009a_write_cmd((rt_uint8_t *)RDS02, 0);
195 otm8009a_write_cmd((rt_uint8_t *)RDL19, 10);
196 otm8009a_write_cmd((rt_uint8_t *)RDS33, 0);
197 otm8009a_write_cmd((rt_uint8_t *)RDL20, 15);
198 otm8009a_write_cmd((rt_uint8_t *)RDS29, 0);
199 otm8009a_write_cmd((rt_uint8_t *)RDL21, 15);
200 otm8009a_write_cmd((rt_uint8_t *)RDS30, 0);
201 otm8009a_write_cmd((rt_uint8_t *)RDL22, 10);
202 otm8009a_write_cmd((rt_uint8_t *)RDS31, 0);
203 otm8009a_write_cmd((rt_uint8_t *)RDL23, 15);
204 otm8009a_write_cmd((rt_uint8_t *)RDS32, 0);
205 otm8009a_write_cmd((rt_uint8_t *)RDL24, 15);
206 otm8009a_write_cmd((rt_uint8_t *)RDS13, 0);
207 otm8009a_write_cmd((rt_uint8_t *)RDS47, 0);
208 otm8009a_write_cmd((rt_uint8_t *)RDS48, 0);
209 otm8009a_write_cmd((rt_uint8_t *)RDS49, 0);
210 otm8009a_write_cmd((rt_uint8_t *)RDS50, 0);
211 otm8009a_write_cmd((rt_uint8_t *)RDS51, 0);
212 otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
213 otm8009a_write_cmd((rt_uint8_t *)RDL25, 3);
214 otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
215 otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
216 otm8009a_write_cmd((rt_uint8_t *)RDL03, 16);
217 otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
218 otm8009a_write_cmd((rt_uint8_t *)RDL04, 16);
219 otm8009a_write_cmd((rt_uint8_t *)RDS36, 0);
220 otm8009a_delay(120);
221
222 switch (pixel_format)
223 {
224 case RTGRAPHIC_PIXEL_FORMAT_RGB565:
225 otm8009a_write_cmd((rt_uint8_t *)RDS37, 0);
226 break;
227 case RTGRAPHIC_PIXEL_FORMAT_RGB888:
228 case RTGRAPHIC_PIXEL_FORMAT_ARGB888:
229 otm8009a_write_cmd((rt_uint8_t *)RDS38, 0);
230 break;
231 }
232
233 otm8009a_write_cmd((rt_uint8_t *)RDS39, 0);
234 otm8009a_write_cmd((rt_uint8_t *)RDL27, 4);
235 otm8009a_write_cmd((rt_uint8_t *)RDL28, 4);
236 otm8009a_write_cmd((rt_uint8_t *)RDS40, 0);
237 otm8009a_write_cmd((rt_uint8_t *)RDS41, 0);
238 otm8009a_write_cmd((rt_uint8_t *)RDS42, 0);
239 otm8009a_write_cmd((rt_uint8_t *)RDS43, 0);
240 otm8009a_write_cmd((rt_uint8_t *)RDS44, 0);
241 otm8009a_write_cmd((rt_uint8_t *)RDS01, 0);
242 otm8009a_write_cmd((rt_uint8_t *)RDS45, 0);
243 }
244
245
stm32_mipi_lcd_init(void)246 void stm32_mipi_lcd_init(void)
247 {
248 otm8009a_reset();
249 }
250
stm32_mipi_lcd_config(rt_uint32_t pixel_format)251 void stm32_mipi_lcd_config(rt_uint32_t pixel_format)
252 {
253 otm8009a_config(pixel_format);
254 }
255
stm32_mipi_display_on(void)256 void stm32_mipi_display_on(void)
257 {
258 HAL_DSI_ShortWrite(&hdsi, hdsi_video.VirtualChannelID, DSI_DCS_SHORT_PKT_WRITE_P1, 0x29, 0x00);
259 }
260
stm32_mipi_display_off(void)261 void stm32_mipi_display_off(void)
262 {
263 HAL_DSI_ShortWrite(&hdsi, hdsi_video.VirtualChannelID, DSI_DCS_SHORT_PKT_WRITE_P1, 0x28, 0x00);
264 }
265 #endif
266