1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2022-11-18 shelton first version 9 */ 10 11 #ifndef __SPI_CONFIG_H__ 12 #define __SPI_CONFIG_H__ 13 14 #include <rtthread.h> 15 #include "dma_config.h" 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 #define SPI1_IRQHandler SPI1_IRQHandler 22 #define SPI2_IRQHandler SPI2_I2S2EXT_IRQHandler 23 #define SPI3_IRQHandler SPI3_I2S3EXT_IRQHandler 24 #define SPI4_IRQHandler SPI4_IRQHandler 25 26 #ifdef BSP_USING_SPI1 27 #define SPI1_CONFIG \ 28 { \ 29 .spi_x = SPI1, \ 30 .spi_name = "spi1", \ 31 .irqn = SPI1_IRQn, \ 32 } 33 #endif /* BSP_USING_SPI1 */ 34 35 #ifdef BSP_SPI1_RX_USING_DMA 36 #define SPI1_RX_DMA_CONFIG \ 37 { \ 38 .dma_channel = SPI1_RX_DMA_CHANNEL, \ 39 .dma_clock = SPI1_RX_DMA_CLOCK, \ 40 .dma_irqn = SPI1_RX_DMA_IRQ, \ 41 .dmamux_channel = SPI1_RX_DMA_MUX_CHANNEL, \ 42 .request_id = SPI1_RX_DMA_REQ_ID, \ 43 } 44 #endif /* BSP_SPI1_RX_USING_DMA */ 45 46 #ifdef BSP_SPI1_TX_USING_DMA 47 #define SPI1_TX_DMA_CONFIG \ 48 { \ 49 .dma_channel = SPI1_TX_DMA_CHANNEL, \ 50 .dma_clock = SPI1_TX_DMA_CLOCK, \ 51 .dma_irqn = SPI1_TX_DMA_IRQ, \ 52 .dmamux_channel = SPI1_TX_DMA_MUX_CHANNEL, \ 53 .request_id = SPI1_TX_DMA_REQ_ID, \ 54 } 55 #endif /* BSP_SPI1_TX_USING_DMA */ 56 57 #ifdef BSP_USING_SPI2 58 #define SPI2_CONFIG \ 59 { \ 60 .spi_x = SPI2, \ 61 .spi_name = "spi2", \ 62 .irqn = SPI2_I2S2EXT_IRQn, \ 63 } 64 #endif /* BSP_USING_SPI2 */ 65 66 #ifdef BSP_SPI2_RX_USING_DMA 67 #define SPI2_RX_DMA_CONFIG \ 68 { \ 69 .dma_channel = SPI2_RX_DMA_CHANNEL, \ 70 .dma_clock = SPI2_RX_DMA_CLOCK, \ 71 .dma_irqn = SPI2_RX_DMA_IRQ, \ 72 .dmamux_channel = SPI2_RX_DMA_MUX_CHANNEL, \ 73 .request_id = SPI2_RX_DMA_REQ_ID, \ 74 } 75 #endif /* BSP_SPI2_RX_USING_DMA */ 76 77 #ifdef BSP_SPI2_TX_USING_DMA 78 #define SPI2_TX_DMA_CONFIG \ 79 { \ 80 .dma_channel = SPI2_TX_DMA_CHANNEL, \ 81 .dma_clock = SPI2_TX_DMA_CLOCK, \ 82 .dma_irqn = SPI2_TX_DMA_IRQ, \ 83 .dmamux_channel = SPI2_TX_DMA_MUX_CHANNEL, \ 84 .request_id = SPI2_TX_DMA_REQ_ID, \ 85 } 86 #endif /* BSP_SPI2_TX_USING_DMA */ 87 88 #ifdef BSP_USING_SPI3 89 #define SPI3_CONFIG \ 90 { \ 91 .spi_x = SPI3, \ 92 .spi_name = "spi3", \ 93 .irqn = SPI3_I2S3EXT_IRQn, \ 94 } 95 #endif /* BSP_USING_SPI3 */ 96 97 #ifdef BSP_SPI3_RX_USING_DMA 98 #define SPI3_RX_DMA_CONFIG \ 99 { \ 100 .dma_channel = SPI3_RX_DMA_CHANNEL, \ 101 .dma_clock = SPI3_RX_DMA_CLOCK, \ 102 .dma_irqn = SPI3_RX_DMA_IRQ, \ 103 .dmamux_channel = SPI3_RX_DMA_MUX_CHANNEL, \ 104 .request_id = SPI3_RX_DMA_REQ_ID, \ 105 } 106 #endif /* BSP_SPI3_RX_USING_DMA */ 107 108 #ifdef BSP_SPI3_TX_USING_DMA 109 #define SPI3_TX_DMA_CONFIG \ 110 { \ 111 .dma_channel = SPI3_TX_DMA_CHANNEL, \ 112 .dma_clock = SPI3_TX_DMA_CLOCK, \ 113 .dma_irqn = SPI3_TX_DMA_IRQ, \ 114 .dmamux_channel = SPI3_TX_DMA_MUX_CHANNEL, \ 115 .request_id = SPI3_TX_DMA_REQ_ID, \ 116 } 117 #endif /* BSP_SPI3_TX_USING_DMA */ 118 119 #ifdef BSP_USING_SPI4 120 #define SPI4_CONFIG \ 121 { \ 122 .spi_x = SPI4, \ 123 .spi_name = "spi4", \ 124 .irqn = SPI4_IRQn, \ 125 } 126 #endif /* BSP_USING_SPI4 */ 127 128 #ifdef BSP_SPI4_RX_USING_DMA 129 #define SPI4_RX_DMA_CONFIG \ 130 { \ 131 .dma_channel = SPI4_RX_DMA_CHANNEL, \ 132 .dma_clock = SPI4_RX_DMA_CLOCK, \ 133 .dma_irqn = SPI4_RX_DMA_IRQ, \ 134 .dmamux_channel = SPI4_RX_DMA_MUX_CHANNEL, \ 135 .request_id = SPI4_RX_DMA_REQ_ID, \ 136 } 137 #endif /* BSP_SPI4_RX_USING_DMA */ 138 139 #ifdef BSP_SPI4_TX_USING_DMA 140 #define SPI4_TX_DMA_CONFIG \ 141 { \ 142 .dma_channel = SPI4_TX_DMA_CHANNEL, \ 143 .dma_clock = SPI4_TX_DMA_CLOCK, \ 144 .dma_irqn = SPI4_TX_DMA_IRQ, \ 145 .dmamux_channel = SPI4_TX_DMA_MUX_CHANNEL, \ 146 .request_id = SPI4_TX_DMA_REQ_ID, \ 147 } 148 #endif /* BSP_SPI4_TX_USING_DMA */ 149 150 #ifdef __cplusplus 151 } 152 #endif 153 154 #endif /*__SPI_CONFIG_H__ */ 155 156 157 158