1 /*********************************************************************************************************//** 2 * @file ht32f5xxxx_mctm.h 3 * @version $Rev:: 8260 $ 4 * @date $Date:: 2024-11-05 #$ 5 * @brief The header file of the MCTM library. 6 ************************************************************************************************************* 7 * @attention 8 * 9 * Firmware Disclaimer Information 10 * 11 * 1. The customer hereby acknowledges and agrees that the program technical documentation, including the 12 * code, which is supplied by Holtek Semiconductor Inc., (hereinafter referred to as "HOLTEK") is the 13 * proprietary and confidential intellectual property of HOLTEK, and is protected by copyright law and 14 * other intellectual property laws. 15 * 16 * 2. The customer hereby acknowledges and agrees that the program technical documentation, including the 17 * code, is confidential information belonging to HOLTEK, and must not be disclosed to any third parties 18 * other than HOLTEK and the customer. 19 * 20 * 3. The program technical documentation, including the code, is provided "as is" and for customer reference 21 * only. After delivery by HOLTEK, the customer shall use the program technical documentation, including 22 * the code, at their own risk. HOLTEK disclaims any expressed, implied or statutory warranties, including 23 * the warranties of merchantability, satisfactory quality and fitness for a particular purpose. 24 * 25 * <h2><center>Copyright (C) Holtek Semiconductor Inc. All rights reserved</center></h2> 26 ************************************************************************************************************/ 27 28 /* Define to prevent recursive inclusion -------------------------------------------------------------------*/ 29 #ifndef __HT32F5XXXX_MCTM_H 30 #define __HT32F5XXXX_MCTM_H 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /* Includes ------------------------------------------------------------------------------------------------*/ 37 #include "ht32f5xxxx_tm.h" 38 #include "ht32.h" 39 40 /** @addtogroup HT32F5xxxx_Peripheral_Driver HT32F5xxxx Peripheral Driver 41 * @{ 42 */ 43 44 /** @addtogroup MCTM 45 * @{ 46 */ 47 48 49 /* Exported types ------------------------------------------------------------------------------------------*/ 50 /** @defgroup MCTM_Exported_Types MCTM exported types 51 * @{ 52 */ 53 /** 54 * @brief Enumeration of MCTM channel output idle state. 55 */ 56 /** 57 * @brief Definition of Break & DeadTime init structure. 58 */ 59 typedef struct 60 { 61 u32 OSSRState; 62 u32 OSSIState; 63 u32 LockLevel; 64 u32 Break0; 65 u32 Break0Polarity; 66 u32 AutomaticOutput; 67 u8 DeadTime; 68 u8 BreakFilter; 69 } MCTM_CHBRKCTRInitTypeDef; 70 71 typedef union 72 { 73 struct 74 { 75 /* Definitions of CHBRKCTR */ 76 unsigned long Break0 :1; // BK0E 77 unsigned long Break0Polarity :1; // BK0P 78 #if (LIBCFG_TM_65X_66X_V1) 79 unsigned long Break1 :1; // BK1E 80 unsigned long Break1Polarity :1; // BK1E 81 #else 82 unsigned long :1; 83 unsigned long :1; 84 #endif 85 unsigned long :1; // CHMOE 86 unsigned long AutomaticOutput :1; // CHAOE 87 #if (LIBCFG_TM_BK_FROM_CMP) 88 unsigned long Break0FromCMP0 :1; // BK0CMP0 89 unsigned long Break0FromCMP1 :1; // BK0CMP1 90 #else 91 unsigned long :1; 92 unsigned long :1; 93 #endif 94 95 #if (LIBCFG_TM_65X_66X_V1) 96 unsigned long Break0EventCount :2; // BK0FN 97 unsigned long Break0FDiv :2; // BK0FF 98 unsigned long Break1EventCount :2; // BK1FN 99 unsigned long Break1FDiv :2; // BK1FF 100 #else 101 unsigned long Break0Filter :4; // BK0F 102 unsigned long :4; 103 #endif 104 105 unsigned long LockLevel :2; // LOCKLV 106 unsigned long DeglitchFilter :1; // GFSEL 107 unsigned long :1; 108 unsigned long OSSIState :1; // CHOSSI 109 unsigned long OSSRState :1; // CHOSSR 110 #if (LIBCFG_TM_BK_FROM_CMP) 111 unsigned long Break1FromCMP0 :1; // BK1CMP0 112 unsigned long Break1FromCMP1 :1; // BK1CMP1 113 #else 114 unsigned long :1; 115 unsigned long :1; 116 #endif 117 118 unsigned long DeadTime :8; // CHDTG 119 } Bit; 120 u32 Reg; 121 } MCTM_CHBRKCTRTypeDef; 122 /** 123 * @} 124 */ 125 126 /* Exported constants --------------------------------------------------------------------------------------*/ 127 /** @defgroup MCTM_Exported_Constants MCTM exported constants 128 * @{ 129 */ 130 131 /** @defgroup MCTM_BKE Definitions of MCTM break control 132 * @{ 133 */ 134 #define MCTM_BREAK_ENABLE 0x00000001 /*!< Break enable */ 135 #define MCTM_BREAK_DISABLE 0x00000000 /*!< Break disable */ 136 /** 137 * @} 138 */ 139 140 /** @defgroup MCTM_BKP Definitions of MCTM break polarity 141 * @{ 142 */ 143 #define MCTM_BREAK_POLARITY_LOW 0x00000000 /*!< Break input pin active low level */ 144 #define MCTM_BREAK_POLARITY_HIGH 0x00000002 /*!< Break input pin active high level */ 145 /** 146 * @} 147 */ 148 149 /** @defgroup MCTM_CHMOE Definitions of MCTM main output enable function state 150 * @{ 151 */ 152 #define MCTM_CHMOE_DISABLE 0x00000000 /*!< main output disable */ 153 #define MCTM_CHMOE_ENABLE 0x00000010 /*!< Main output enable */ 154 /** 155 * @} 156 */ 157 158 /** @defgroup MCTM_CHAOE Definitions of MCTM automatic output enable function state 159 * @{ 160 */ 161 #define MCTM_CHAOE_DISABLE 0x00000000 /*!< Automatic output enable function disable */ 162 #define MCTM_CHAOE_ENABLE 0x00000020 /*!< Automatic output enable function enable */ 163 /** 164 * @} 165 */ 166 167 /** @defgroup MCTM_LOCK_LEVEL Definitions of MCTM lock level selection 168 * @{ 169 */ 170 #define MCTM_LOCK_LEVEL_OFF 0x00000000 /*!< Lock Off */ 171 #define MCTM_LOCK_LEVEL_1 0x00010000 /*!< Lock level 1 */ 172 #define MCTM_LOCK_LEVEL_2 0x00020000 /*!< Lock level 2 */ 173 #define MCTM_LOCK_LEVEL_3 0x00030000 /*!< Lock level 3 */ 174 /** 175 * @} 176 */ 177 178 /** @defgroup MCTM_OSSI Definitions of Off-State Selection for Idle mode states 179 * @{ 180 */ 181 #define MCTM_OSSI_STATE_ENABLE 0x00100000 182 #define MCTM_OSSI_STATE_DISABLE 0x00000000 183 /** 184 * @} 185 */ 186 187 /** @defgroup MCTM_OSSR Definitions of Off-State Selection for Run mode states 188 * @{ 189 */ 190 #define MCTM_OSSR_STATE_ENABLE 0x00200000 191 #define MCTM_OSSR_STATE_DISABLE 0x00000000 192 /** 193 * @} 194 */ 195 196 /** @defgroup MCTM_Check_Parameter Check parameter 197 * @{ 198 */ 199 200 /** 201 * @brief Used to check parameter of the MCTMx. 202 */ 203 #define IS_MCTM(x) (IS_MCTM0(x)) 204 205 #if (LIBCFG_MCTM0) 206 #define IS_MCTM0(x) (x == HT_MCTM0) 207 #else 208 #define IS_MCTM0(x) (0) 209 #endif 210 211 /** 212 * @brief Used to check parameter of the complementary output channel. 213 */ 214 #define IS_MCTM_COMPLEMENTARY_CH(x) (((x) == TM_CH_0) || ((x) == TM_CH_1) || \ 215 ((x) == TM_CH_2)) 216 /** 217 * @brief Used to check parameter of the COMUS. 218 */ 219 #define IS_MCTM_COMUS(x) ((x == MCTM_COMUS_STIOFF) || (x == MCTM_COMUS_STION)) 220 /** 221 * @brief Used to check parameter of the channel output idle state. 222 */ 223 #define IS_MCTM_OIS(x) ((x == MCTM_OIS_LOW) || (x == MCTM_OIS_HIGH)) 224 /** 225 * @brief Used to check value of MCTM break control state. 226 */ 227 #define IS_MCTM_BREAK_STATE(STATE) (((STATE) == MCTM_BREAK_ENABLE) || \ 228 ((STATE) == MCTM_BREAK_DISABLE)) 229 /** 230 * @brief Used to check value of MCTM break polarity. 231 */ 232 #define IS_MCTM_BREAK_POLARITY(POLARITY) (((POLARITY) == MCTM_BREAK_POLARITY_LOW) || \ 233 ((POLARITY) == MCTM_BREAK_POLARITY_HIGH)) 234 /** 235 * @brief Used to check value of MCTM automatic output enable control state. 236 */ 237 #define IS_MCTM_CHAOE_STATE(STATE) (((STATE) == MCTM_CHAOE_ENABLE) || \ 238 ((STATE) == MCTM_CHAOE_DISABLE)) 239 /** 240 * @brief Used to check value of MCTM lock level. 241 */ 242 #define IS_MCTM_LOCK_LEVEL(LEVEL) (((LEVEL) == MCTM_LOCK_LEVEL_OFF) || \ 243 ((LEVEL) == MCTM_LOCK_LEVEL_1) || \ 244 ((LEVEL) == MCTM_LOCK_LEVEL_2) || \ 245 ((LEVEL) == MCTM_LOCK_LEVEL_3)) 246 /** 247 * @brief Used to check value of MCTM OSSI state. 248 */ 249 #define IS_MCTM_OSSI_STATE(STATE) (((STATE) == MCTM_OSSI_STATE_ENABLE) || \ 250 ((STATE) == MCTM_OSSI_STATE_DISABLE)) 251 /** 252 * @brief Used to check value of MCTM OSSR state. 253 */ 254 #define IS_MCTM_OSSR_STATE(STATE) (((STATE) == MCTM_OSSR_STATE_ENABLE) || \ 255 ((STATE) == MCTM_OSSR_STATE_DISABLE)) 256 /** 257 * @} 258 */ 259 260 /** 261 * @} 262 */ 263 264 /* Exported functions --------------------------------------------------------------------------------------*/ 265 /** @defgroup MCTM_Exported_Functions MCTM exported functions 266 * @{ 267 */ 268 void MCTM_ChNPolarityConfig(HT_TM_TypeDef* MCTMx, TM_CH_Enum Channel, TM_CHP_Enum Pol); 269 void MCTM_ChannelNConfig(HT_TM_TypeDef* MCTMx, TM_CH_Enum Channel, TM_CHCTL_Enum Control); 270 271 void MCTM_CHMOECmd(HT_TM_TypeDef* MCTMx, ControlStatus NewState); 272 void MCTM_CHBRKCTRConfig(HT_TM_TypeDef* MCTMx, MCTM_CHBRKCTRInitTypeDef *CHBRKCTRInit); 273 void MCTM_CHBRKCTRConfig2(HT_TM_TypeDef* MCTMx, MCTM_CHBRKCTRTypeDef *CHBRKCTRInit); 274 void MCTM_CHBRKCTRStructInit(MCTM_CHBRKCTRInitTypeDef* CHBRKCTRInit); 275 void MCTM_COMPRECmd(HT_TM_TypeDef* MCTMx, ControlStatus NewState); 276 void MCTM_COMUSConfig(HT_TM_TypeDef* MCTMx, MCTM_COMUS_Enum Sel); 277 278 #if (LIBCFG_MCTM_UEV1DIS) 279 void MCTM_UpdateEventDisable(HT_TM_TypeDef* MCTMx, MCTM_UEV1DIS_Enum MCTM_UEV1x, FlagStatus NewState); 280 #endif 281 /** 282 * @} 283 */ 284 285 286 /** 287 * @} 288 */ 289 290 /** 291 * @} 292 */ 293 294 #ifdef __cplusplus 295 } 296 #endif 297 298 #endif 299