1 /*********************************************************************************************************//** 2 * @file ht32f5xxxx_spi.h 3 * @version $Rev:: 6386 $ 4 * @date $Date:: 2022-10-27 #$ 5 * @brief The header file of the SPI library. 6 ************************************************************************************************************* 7 * @attention 8 * 9 * Firmware Disclaimer Information 10 * 11 * 1. The customer hereby acknowledges and agrees that the program technical documentation, including the 12 * code, which is supplied by Holtek Semiconductor Inc., (hereinafter referred to as "HOLTEK") is the 13 * proprietary and confidential intellectual property of HOLTEK, and is protected by copyright law and 14 * other intellectual property laws. 15 * 16 * 2. The customer hereby acknowledges and agrees that the program technical documentation, including the 17 * code, is confidential information belonging to HOLTEK, and must not be disclosed to any third parties 18 * other than HOLTEK and the customer. 19 * 20 * 3. The program technical documentation, including the code, is provided "as is" and for customer reference 21 * only. After delivery by HOLTEK, the customer shall use the program technical documentation, including 22 * the code, at their own risk. HOLTEK disclaims any expressed, implied or statutory warranties, including 23 * the warranties of merchantability, satisfactory quality and fitness for a particular purpose. 24 * 25 * <h2><center>Copyright (C) Holtek Semiconductor Inc. All rights reserved</center></h2> 26 ************************************************************************************************************/ 27 28 /* Define to prevent recursive inclusion -------------------------------------------------------------------*/ 29 #ifndef __HT32F5XXXX_SPI_H 30 #define __HT32F5XXXX_SPI_H 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /* Includes ------------------------------------------------------------------------------------------------*/ 37 #include "ht32.h" 38 39 /** @addtogroup HT32F5xxxx_Peripheral_Driver HT32F5xxxx Peripheral Driver 40 * @{ 41 */ 42 43 /** @addtogroup SPI 44 * @{ 45 */ 46 47 48 #if (LIBCFG_MIDI) 49 #include "ht32f5xxxx_spi_midi.h" 50 #endif 51 52 /* Exported types ------------------------------------------------------------------------------------------*/ 53 /** @defgroup SPI_Exported_Types SPI exported types 54 * @{ 55 */ 56 57 #if (LIBCFG_SPI_DATA_LENGTH_V01) 58 typedef u8 SPI_DataTypeDef; 59 #else 60 typedef u16 SPI_DataTypeDef; 61 #endif 62 63 #if (LIBCFG_SPI_TIMEOUT_LENGTH_V01) 64 typedef u8 SPI_TimeoutTypeDef; 65 #else 66 typedef u16 SPI_TimeoutTypeDef; 67 #endif 68 69 typedef struct 70 { 71 u32 SPI_Mode; 72 u32 SPI_FIFO; 73 u32 SPI_DataLength; 74 u32 SPI_SELMode; 75 u32 SPI_SELPolarity; 76 u32 SPI_CPOL; 77 u32 SPI_CPHA; 78 u32 SPI_FirstBit; 79 u32 SPI_RxFIFOTriggerLevel; 80 u32 SPI_TxFIFOTriggerLevel; 81 u32 SPI_ClockPrescaler; 82 } SPI_InitTypeDef; 83 84 /** 85 * @brief Enumeration of SIO direction. 86 */ 87 #if (LIBCFG_QSPI) 88 typedef enum 89 { 90 SIO_DIR_IN = 0, /*!< input mode */ 91 SIO_DIR_OUT /*!< output mode */ 92 } SIO_DIR_Enum; 93 #endif 94 /** 95 * @} 96 */ 97 98 /* Exported constants --------------------------------------------------------------------------------------*/ 99 /** @defgroup SPI_Exported_Constants SPI exported constants 100 * @{ 101 */ 102 #define SPI_FIFO_ENABLE ((u32)0x00000400) 103 #define SPI_FIFO_DISABLE ((u32)0x00000000) 104 105 #define IS_SPI_FIFO_SET(FIFO) ((FIFO == SPI_FIFO_ENABLE) || \ 106 (FIFO == SPI_FIFO_DISABLE)) 107 108 #define SPI_DATALENGTH_1 ((u32)0x00000001) 109 #define SPI_DATALENGTH_2 ((u32)0x00000002) 110 #define SPI_DATALENGTH_3 ((u32)0x00000003) 111 #define SPI_DATALENGTH_4 ((u32)0x00000004) 112 #define SPI_DATALENGTH_5 ((u32)0x00000005) 113 #define SPI_DATALENGTH_6 ((u32)0x00000006) 114 #define SPI_DATALENGTH_7 ((u32)0x00000007) 115 116 #if (LIBCFG_SPI_DATA_LENGTH_V01) 117 #define SPI_DATALENGTH_8 ((u32)0x00000000) 118 119 #define IS_SPI_DATALENGTH(DATALENGTH) ((DATALENGTH <= 0x07)) 120 #else 121 #define SPI_DATALENGTH_8 ((u32)0x00000008) 122 #define SPI_DATALENGTH_9 ((u32)0x00000009) 123 #define SPI_DATALENGTH_10 ((u32)0x0000000A) 124 #define SPI_DATALENGTH_11 ((u32)0x0000000B) 125 #define SPI_DATALENGTH_12 ((u32)0x0000000C) 126 #define SPI_DATALENGTH_13 ((u32)0x0000000D) 127 #define SPI_DATALENGTH_14 ((u32)0x0000000E) 128 #define SPI_DATALENGTH_15 ((u32)0x0000000F) 129 #define SPI_DATALENGTH_16 ((u32)0x00000000) 130 131 #define IS_SPI_DATALENGTH(DATALENGTH) ((DATALENGTH <= 0xF)) 132 #endif 133 134 #define SPI_MASTER ((u32)0x00004000) 135 #define SPI_SLAVE ((u32)0x00000000) 136 137 #define IS_SPI_MODE(MODE) ((MODE == SPI_MASTER) || \ 138 (MODE == SPI_SLAVE)) 139 140 141 #define SPI_SEL_HARDWARE ((u32)0x00002000) 142 #define SPI_SEL_SOFTWARE ((u32)0x00000000) 143 144 #define IS_SPI_SEL_MODE(SELMODE) ((SELMODE == SPI_SEL_HARDWARE) || \ 145 (SELMODE == SPI_SEL_SOFTWARE)) 146 147 148 #define SPI_SEL_ACTIVE ((u32)0x00000010) 149 #define SPI_SEL_INACTIVE ((u32)0xFFFFFFEF) 150 151 #define IS_SPI_SOFTWARE_SEL(SEL) ((SEL == SPI_SEL_ACTIVE) || \ 152 (SEL == SPI_SEL_INACTIVE)) 153 154 155 #define SPI_SELPOLARITY_HIGH ((u32)0x00000800) 156 #define SPI_SELPOLARITY_LOW ((u32)0x00000000) 157 158 #define IS_SPI_SEL_POLARITY(POLARITY) ((POLARITY == SPI_SELPOLARITY_HIGH) || \ 159 (POLARITY == SPI_SELPOLARITY_LOW)) 160 161 162 #define SPI_CPOL_HIGH ((u32)0x00000400) 163 #define SPI_CPOL_LOW ((u32)0x00000000) 164 165 #define IS_SPI_CPOL(CPOL) ((CPOL == SPI_CPOL_HIGH) || \ 166 (CPOL == SPI_CPOL_LOW)) 167 168 169 #define SPI_CPHA_FIRST ((u32)0x00000000) 170 #define SPI_CPHA_SECOND ((u32)0x00000001) 171 172 #define IS_SPI_CPHA(CPHA) ((CPHA == SPI_CPHA_FIRST) || \ 173 (CPHA == SPI_CPHA_SECOND)) 174 175 176 #define SPI_FIRSTBIT_LSB ((u32)0x00001000) 177 #define SPI_FIRSTBIT_MSB ((u32)0x00000000) 178 179 #define IS_SPI_FIRST_BIT(BIT) ((BIT == SPI_FIRSTBIT_LSB) || \ 180 (BIT == SPI_FIRSTBIT_MSB)) 181 182 183 #define SPI_FLAG_TXBE ((u32)0x00000001) 184 #define SPI_FLAG_TXE ((u32)0x00000002) 185 #define SPI_FLAG_RXBNE ((u32)0x00000004) 186 #define SPI_FLAG_WC ((u32)0x00000008) 187 #define SPI_FLAG_RO ((u32)0x00000010) 188 #if (LIBCFG_SPI_NO_MULTI_MASTER) 189 #define IS_FLAG_MF(x) (0) 190 #else 191 #define SPI_FLAG_MF ((u32)0x00000020) 192 #define IS_FLAG_MF(x) (x == SPI_FLAG_MF) 193 #endif 194 #define SPI_FLAG_SA ((u32)0x00000040) 195 #define SPI_FLAG_TOUT ((u32)0x00000080) 196 #define SPI_FLAG_BUSY ((u32)0x00000100) 197 198 #define IS_SPI_FLAG(FLAG) ((FLAG == SPI_FLAG_TXBE) || \ 199 (FLAG == SPI_FLAG_TXE) || \ 200 (FLAG == SPI_FLAG_RXBNE) || \ 201 (FLAG == SPI_FLAG_WC) || \ 202 (FLAG == SPI_FLAG_RO) || \ 203 IS_FLAG_MF(FLAG) || \ 204 (FLAG == SPI_FLAG_SA) || \ 205 (FLAG == SPI_FLAG_TOUT) || \ 206 (FLAG == SPI_FLAG_BUSY)) 207 208 #define IS_SPI_FLAG_CLEAR(CLEAR) ((CLEAR == SPI_FLAG_WC) || \ 209 (CLEAR == SPI_FLAG_RO) || \ 210 IS_FLAG_MF(CLEAR) || \ 211 (CLEAR == SPI_FLAG_SA) || \ 212 (CLEAR == SPI_FLAG_TOUT)) 213 214 215 #define SPI_INT_TXBE ((u32)0x00000001) 216 #define SPI_INT_TXE ((u32)0x00000002) 217 #define SPI_INT_RXBNE ((u32)0x00000004) 218 #define SPI_INT_WC ((u32)0x00000008) 219 #define SPI_INT_RO ((u32)0x00000010) 220 #if (!LIBCFG_SPI_NO_MULTI_MASTER) 221 #define SPI_INT_MF ((u32)0x00000020) 222 #endif 223 #define SPI_INT_SA ((u32)0x00000040) 224 #define SPI_INT_TOUT ((u32)0x00000080) 225 #if (LIBCFG_SPI_NO_MULTI_MASTER) 226 #define SPI_INT_ALL ((u32)0x000000DF) 227 #else 228 #define SPI_INT_ALL ((u32)0x000000FF) 229 #endif 230 231 #define IS_SPI_INT(SPI_INT) (((SPI_INT & 0xFFFFFF00) == 0x0) && (SPI_INT != 0x0)) 232 233 234 235 #define SPI_FIFO_TX ((u32)0x00000100) 236 #define SPI_FIFO_RX ((u32)0x00000200) 237 238 #define IS_SPI_FIFO_DIRECTION(DIRECTION) (((DIRECTION & 0xFFFFFCFF) == 0) && (DIRECTION != 0)) 239 240 241 #if (LIBCFG_PDMA) 242 #define SPI_PDMAREQ_TX ((u32)0x00000002) 243 #define SPI_PDMAREQ_RX ((u32)0x00000004) 244 245 #define IS_SPI_PDMA_REQ(REQ) (((REQ & 0xFFFFFFF9) == 0x0) && (REQ != 0x0)) 246 #endif 247 248 /* Check parameter of the SIOx input/output direction */ 249 #if (LIBCFG_QSPI) 250 #define IS_SIO_DIR(x) (((x) == SIO_DIR_IN) || ((x) == SIO_DIR_OUT)) 251 #endif 252 253 #define IS_SPI(x) (IS_SPI0(x) || IS_SPI1(x)) 254 #define IS_SPI0(x) (x == HT_SPI0) 255 #if (LIBCFG_SPI1) 256 #define IS_SPI1(x) (x == HT_SPI1) 257 #else 258 #define IS_SPI1(x) (0) 259 #endif 260 #if (LIBCFG_QSPI) 261 #define IS_QSPI(x) (x == HT_QSPI) 262 #else 263 #define IS_QSPI(x) (0) 264 #endif 265 266 #if (LIBCFG_SPI_DATA_LENGTH_V01) 267 #define IS_SPI_DATA(DATA) (DATA <= 0xff) 268 #else 269 #define IS_SPI_DATA(DATA) (DATA <= 0xffff) 270 #endif 271 272 #if (LIBCFG_SPI_FIFO_DEPTH_V01) 273 #define IS_SPI_FIFO_LEVEL(LEVEL) (LEVEL <= 4) 274 #else 275 #define IS_SPI_FIFO_LEVEL(LEVEL) (LEVEL <= 8) 276 #endif 277 278 #define IS_SPI_CLOCK_PRESCALER(PRESCALER) (PRESCALER >= 2) 279 280 #define SPI_GUADTIME_1_SCK ((u16)0x0000) 281 #define SPI_GUADTIME_2_SCK ((u16)0x0001) 282 #define SPI_GUADTIME_3_SCK ((u16)0x0002) 283 #define SPI_GUADTIME_4_SCK ((u16)0x0003) 284 #define SPI_GUADTIME_5_SCK ((u16)0x0004) 285 #define SPI_GUADTIME_6_SCK ((u16)0x0005) 286 #define SPI_GUADTIME_7_SCK ((u16)0x0006) 287 #define SPI_GUADTIME_8_SCK ((u16)0x0007) 288 #define SPI_GUADTIME_9_SCK ((u16)0x0008) 289 #define SPI_GUADTIME_10_SCK ((u16)0x0009) 290 #define SPI_GUADTIME_11_SCK ((u16)0x000A) 291 #define SPI_GUADTIME_12_SCK ((u16)0x000B) 292 #define SPI_GUADTIME_13_SCK ((u16)0x000C) 293 #define SPI_GUADTIME_14_SCK ((u16)0x000D) 294 #define SPI_GUADTIME_15_SCK ((u16)0x000E) 295 #define SPI_GUADTIME_16_SCK ((u16)0x000F) 296 297 #define IS_SPI_GUADTIME(GUADTIMEPERIOD) ((GUADTIMEPERIOD <= 0x000F)) 298 299 300 #define SPI_SELHOLDTIME_HALF_SCK ((u16)0x0000) 301 #define SPI_SELHOLDTIME_1_SCK ((u16)0x0001) 302 #define SPI_SELHOLDTIME_1_HALF_SCK ((u16)0x0002) 303 #define SPI_SELHOLDTIME_2_SCK ((u16)0x0003) 304 #define SPI_SELHOLDTIME_2_HALF_SCK ((u16)0x0004) 305 #define SPI_SELHOLDTIME_3_SCK ((u16)0x0005) 306 #define SPI_SELHOLDTIME_3_HALF_SCK ((u16)0x0006) 307 #define SPI_SELHOLDTIME_4_SCK ((u16)0x0007) 308 #define SPI_SELHOLDTIME_4_HALF_SCK ((u16)0x0008) 309 #define SPI_SELHOLDTIME_5_SCK ((u16)0x0009) 310 #define SPI_SELHOLDTIME_5_HALF_SCK ((u16)0x000A) 311 #define SPI_SELHOLDTIME_6_SCK ((u16)0x000B) 312 #define SPI_SELHOLDTIME_6_HALF_SCK ((u16)0x000C) 313 #define SPI_SELHOLDTIME_7_SCK ((u16)0x000D) 314 #define SPI_SELHOLDTIME_7_HALF_SCK ((u16)0x000E) 315 #define SPI_SELHOLDTIME_8_SCK ((u16)0x000F) 316 317 #define IS_SPI_SELHOLDTIME(SELHOLDTIME) ((SELHOLDTIME <= 0x000F)) 318 /** 319 * @} 320 */ 321 322 /* Exported functions --------------------------------------------------------------------------------------*/ 323 /** @defgroup SPI_Exported_Functions SPI exported functions 324 * @{ 325 */ 326 void SPI_DeInit(HT_SPI_TypeDef* SPIx); 327 void SPI_Init(HT_SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct); 328 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct); 329 void SPI_Cmd(HT_SPI_TypeDef* SPIx, ControlStatus NewState); 330 #if (!LIBCFG_SPI_NO_MULTI_MASTER) 331 void SPI_SELOutputCmd(HT_SPI_TypeDef* SPIx, ControlStatus NewState); 332 #endif 333 void SPI_FIFOCmd(HT_SPI_TypeDef* SPIx, ControlStatus NewState); 334 void SPI_SetDataLength(HT_SPI_TypeDef* SPIx, u16 SPI_DataLength); 335 void SPI_SELModeConfig(HT_SPI_TypeDef* SPIx, u32 SPI_SELMode); 336 void SPI_SoftwareSELCmd(HT_SPI_TypeDef* SPIx, u32 SPI_SoftwareSEL); 337 void SPI_SendData(HT_SPI_TypeDef* SPIx, SPI_DataTypeDef SPI_Data); 338 SPI_DataTypeDef SPI_ReceiveData(HT_SPI_TypeDef* SPIx); 339 void SPI_SetTimeOutValue(HT_SPI_TypeDef* SPIx, SPI_TimeoutTypeDef SPI_Timeout); 340 void SPI_IntConfig(HT_SPI_TypeDef* SPIx, u32 SPI_Int, ControlStatus NewState); 341 FlagStatus SPI_GetFlagStatus(HT_SPI_TypeDef* SPIx, u32 SPI_Flag); 342 u8 SPI_GetFIFOStatus(HT_SPI_TypeDef* SPIx, u32 SPI_FIFODirection); 343 void SPI_ClearFlag(HT_SPI_TypeDef* SPIx, u32 SPI_FlagClear); 344 void SPI_FIFOTriggerLevelConfig(HT_SPI_TypeDef* SPIx, u32 SPI_FIFODirection, u8 SPI_FIFOLevel); 345 #if (LIBCFG_PDMA) 346 void SPI_PDMACmd(HT_SPI_TypeDef* SPIx, u32 SPI_PDMAREQ, ControlStatus NewState); 347 #endif 348 #if (!LIBCFG_SPI_NO_DUAL) 349 void SPI_DUALCmd(HT_SPI_TypeDef* SPIx, ControlStatus NewState); 350 #endif 351 void SPI_GUARDTCmd(HT_SPI_TypeDef* SPIx, ControlStatus NewState); 352 void SPI_GUARDTConfig(HT_SPI_TypeDef* SPIx, u32 Guard_Time); 353 void SPI_SELHTConfig(HT_SPI_TypeDef* SPIx, u32 CS_Hold_Time); 354 #if (LIBCFG_QSPI) 355 void QSPI_QuadCmd(HT_SPI_TypeDef* SPIx, ControlStatus NewState); 356 void QSPI_DirectionConfig(HT_SPI_TypeDef* SPIx, SIO_DIR_Enum SIO_DIR_INorOUT); 357 #endif 358 /** 359 * @} 360 */ 361 362 363 /** 364 * @} 365 */ 366 367 /** 368 * @} 369 */ 370 371 #ifdef __cplusplus 372 } 373 #endif 374 375 #endif 376