1 /* 2 * hw_mdio.h 3 */ 4 5 /* (c) Texas Instruments 2009-2013, All rights reserved. */ 6 7 #ifndef _HW_MDIO_H_ 8 #define _HW_MDIO_H_ 9 10 #ifdef __cplusplus 11 extern "C" { 12 #endif 13 14 #define MDIO_BASE (0xFCF78900U) 15 16 #define MDIO_REVID (0x0U) 17 #define MDIO_CONTROL (0x4U) 18 #define MDIO_ALIVE (0x8U) 19 #define MDIO_LINK (0xCU) 20 #define MDIO_LINKINTRAW (0x10U) 21 #define MDIO_LINKINTMASKED (0x14U) 22 #define MDIO_USERINTRAW (0x20U) 23 #define MDIO_USERINTMASKED (0x24U) 24 #define MDIO_USERINTMASKSET (0x28U) 25 #define MDIO_USERINTMASKCLEAR (0x2CU) 26 #define MDIO_USERACCESS0 (0x80U) 27 #define MDIO_USERPHYSEL0 (0x84U) 28 #define MDIO_USERACCESS1 (0x88U) 29 #define MDIO_USERPHYSEL1 (0x8CU) 30 31 /**************************************************************************\ 32 * Field Definition Macros 33 \**************************************************************************/ 34 35 /* REVID */ 36 37 #define MDIO_REVID_REV (0xFFFFFFFFU) 38 #define MDIO_REVID_REV_SHIFT (0x00000000U) 39 40 41 /* CONTROL */ 42 43 #define MDIO_CONTROL_IDLE (0x80000000U) 44 #define MDIO_CONTROL_IDLE_SHIFT (0x0000001FU) 45 /*----IDLE Tokens----*/ 46 #define MDIO_CONTROL_IDLE_NO (0x00000000U) 47 #define MDIO_CONTROL_IDLE_YES (0x00000001U) 48 49 #define MDIO_CONTROL_ENABLE (0x40000000U) 50 #define MDIO_CONTROL_ENABLE_SHIFT (0x0000001EU) 51 52 #define MDIO_CONTROL_HIGHEST_USER_CHANNEL (0x1F000000U) 53 #define MDIO_CONTROL_HIGHEST_USER_CHANNEL_SHIFT (0x00000018U) 54 55 56 #define MDIO_CONTROL_PREAMBLE (0x00100000U) 57 #define MDIO_CONTROL_PREAMBLE_SHIFT (0x00000014U) 58 /*----PREAMBLE Tokens----*/ 59 60 #define MDIO_CONTROL_FAULT (0x00080000U) 61 #define MDIO_CONTROL_FAULT_SHIFT (0x00000013U) 62 63 #define MDIO_CONTROL_FAULTENB (0x00040000U) 64 #define MDIO_CONTROL_FAULTENB_SHIFT (0x00000012U) 65 /*----FAULTENB Tokens----*/ 66 67 68 69 #define MDIO_CONTROL_CLKDIV (0x0000FFFFU) 70 #define MDIO_CONTROL_CLKDIV_SHIFT (0x00000000U) 71 /*----CLKDIV Tokens----*/ 72 73 74 /* ALIVE */ 75 76 #define MDIO_ALIVE_REGVAL (0xFFFFFFFFU) 77 #define MDIO_ALIVE_REGVAL_SHIFT (0x00000000U) 78 79 80 /* LINK */ 81 82 #define MDIO_LINK_REGVAL (0xFFFFFFFFU) 83 #define MDIO_LINK_REGVAL_SHIFT (0x00000000U) 84 85 86 /* LINKINTRAW */ 87 88 89 #define MDIO_LINKINTRAW_USERPHY1 (0x00000002U) 90 #define MDIO_LINKINTRAW_USERPHY1_SHIFT (0x00000001U) 91 92 #define MDIO_LINKINTRAW_USERPHY0 (0x00000001U) 93 #define MDIO_LINKINTRAW_USERPHY0_SHIFT (0x00000000U) 94 95 96 /* LINKINTMASKED */ 97 98 99 #define MDIO_LINKINTMASKED_USERPHY1 (0x00000002U) 100 #define MDIO_LINKINTMASKED_USERPHY1_SHIFT (0x00000001U) 101 102 #define MDIO_LINKINTMASKED_USERPHY0 (0x00000001U) 103 #define MDIO_LINKINTMASKED_USERPHY0_SHIFT (0x00000000U) 104 105 106 /* USERINTRAW */ 107 108 109 #define MDIO_USERINTRAW_USERACCESS1 (0x00000002U) 110 #define MDIO_USERINTRAW_USERACCESS1_SHIFT (0x00000001U) 111 112 #define MDIO_USERINTRAW_USERACCESS0 (0x00000001U) 113 #define MDIO_USERINTRAW_USERACCESS0_SHIFT (0x00000000U) 114 115 116 /* USERINTMASKED */ 117 118 119 #define MDIO_USERINTMASKED_USERACCESS1 (0x00000002U) 120 #define MDIO_USERINTMASKED_USERACCESS1_SHIFT (0x00000001U) 121 122 #define MDIO_USERINTMASKED_USERACCESS0 (0x00000001U) 123 #define MDIO_USERINTMASKED_USERACCESS0_SHIFT (0x00000000U) 124 125 126 /* USERINTMASKSET */ 127 128 129 #define MDIO_USERINTMASKSET_USERACCESS1 (0x00000002U) 130 #define MDIO_USERINTMASKSET_USERACCESS1_SHIFT (0x00000001U) 131 132 #define MDIO_USERINTMASKSET_USERACCESS0 (0x00000001U) 133 #define MDIO_USERINTMASKSET_USERACCESS0_SHIFT (0x00000000U) 134 135 136 /* USERINTMASKCLEAR */ 137 138 139 #define MDIO_USERINTMASKCLEAR_USERACCESS1 (0x00000002U) 140 #define MDIO_USERINTMASKCLEAR_USERACCESS1_SHIFT (0x00000001U) 141 142 #define MDIO_USERINTMASKCLEAR_USERACCESS0 (0x00000001U) 143 #define MDIO_USERINTMASKCLEAR_USERACCESS0_SHIFT (0x00000000U) 144 145 146 /* USERACCESS0 */ 147 148 #define MDIO_USERACCESS0_GO (0x80000000U) 149 #define MDIO_USERACCESS0_GO_SHIFT (0x0000001FU) 150 151 #define MDIO_USERACCESS0_WRITE (0x40000000U) 152 #define MDIO_USERACCESS0_READ (0x00000000U) 153 #define MDIO_USERACCESS0_WRITE_SHIFT (0x0000001EU) 154 155 #define MDIO_USERACCESS0_ACK (0x20000000U) 156 #define MDIO_USERACCESS0_ACK_SHIFT (0x0000001DU) 157 158 159 #define MDIO_USERACCESS0_REGADR (0x03E00000U) 160 #define MDIO_USERACCESS0_REGADR_SHIFT (0x00000015U) 161 162 #define MDIO_USERACCESS0_PHYADR (0x001F0000U) 163 #define MDIO_USERACCESS0_PHYADR_SHIFT (0x00000010U) 164 165 #define MDIO_USERACCESS0_DATA (0x0000FFFFU) 166 #define MDIO_USERACCESS0_DATA_SHIFT (0x00000000U) 167 168 169 /* USERPHYSEL0 */ 170 171 172 #define MDIO_USERPHYSEL0_LINKSEL (0x00000080U) 173 #define MDIO_USERPHYSEL0_LINKSEL_SHIFT (0x00000007U) 174 175 #define MDIO_USERPHYSEL0_LINKINTENB (0x00000040U) 176 #define MDIO_USERPHYSEL0_LINKINTENB_SHIFT (0x00000006U) 177 178 179 #define MDIO_USERPHYSEL0_PHYADRMON (0x0000001FU) 180 #define MDIO_USERPHYSEL0_PHYADRMON_SHIFT (0x00000000U) 181 182 183 /* USERACCESS1 */ 184 185 #define MDIO_USERACCESS1_GO (0x80000000U) 186 #define MDIO_USERACCESS1_GO_SHIFT (0x0000001FU) 187 188 #define MDIO_USERACCESS1_WRITE (0x40000000U) 189 #define MDIO_USERACCESS1_WRITE_SHIFT (0x0000001EU) 190 191 #define MDIO_USERACCESS1_ACK (0x20000000U) 192 #define MDIO_USERACCESS1_ACK_SHIFT (0x0000001DU) 193 194 195 #define MDIO_USERACCESS1_REGADR (0x03E00000U) 196 #define MDIO_USERACCESS1_REGADR_SHIFT (0x00000015U) 197 198 #define MDIO_USERACCESS1_PHYADR (0x001F0000U) 199 #define MDIO_USERACCESS1_PHYADR_SHIFT (0x00000010U) 200 201 #define MDIO_USERACCESS1_DATA (0x0000FFFFU) 202 #define MDIO_USERACCESS1_DATA_SHIFT (0x00000000U) 203 204 205 /* USERPHYSEL1 */ 206 207 208 #define MDIO_USERPHYSEL1_LINKSEL (0x00000080U) 209 #define MDIO_USERPHYSEL1_LINKSEL_SHIFT (0x00000007U) 210 211 #define MDIO_USERPHYSEL1_LINKINTENB (0x00000040U) 212 #define MDIO_USERPHYSEL1_LINKINTENB_SHIFT (0x00000006U) 213 214 215 #define MDIO_USERPHYSEL1_PHYADRMON (0x0000001FU) 216 #define MDIO_USERPHYSEL1_PHYADRMON_SHIFT (0x00000000U) 217 218 219 #ifdef __cplusplus 220 } 221 #endif 222 223 #endif 224