1 /*
2 * Copyright (c) 2012, Freescale Semiconductor, Inc.
3 * All rights reserved.
4 *
5 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
6 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
7 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
8 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
9 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
10 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
11 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
12 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
13 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
14 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
15 */
16
17 // File: i2c3_iomux_config.c
18
19 /* ------------------------------------------------------------------------------
20 * <auto-generated>
21 * This code was generated by a tool.
22 * Runtime Version:3.4.0.0
23 *
24 * Changes to this file may cause incorrect behavior and will be lost if
25 * the code is regenerated.
26 * </auto-generated>
27 * ------------------------------------------------------------------------------
28 */
29
30 #include "iomux_config.h"
31 #include "registers/regsiomuxc.h"
32
33 // Function to configure IOMUXC for i2c3 module.
i2c3_iomux_config(void)34 void i2c3_iomux_config(void)
35 {
36 // Config i2c3.I2C3_SCL to pad GPIO03(R7)
37 // HW_IOMUXC_SW_MUX_CTL_PAD_GPIO03_WR(0x00000012);
38 // HW_IOMUXC_SW_PAD_CTL_PAD_GPIO03_WR(0x0001B860);
39 // HW_IOMUXC_I2C3_SCL_IN_SELECT_INPUT_WR(0x00000001);
40 // Mux Register:
41 // IOMUXC_SW_MUX_CTL_PAD_GPIO03(0x020E0228)
42 // SION [4] - Software Input On Field Reset: DISABLED
43 // Force the selected mux mode Input path no matter of MUX_MODE functionality.
44 // DISABLED (0) - Input Path is determined by functionality of the selected mux mode (regular).
45 // ENABLED (1) - Force input path of pad.
46 // MUX_MODE [2:0] - MUX Mode Select Field Reset: ALT5
47 // Select iomux modes to be used for pad.
48 // ALT0 (0) - Select instance: esai signal: ESAI_RX_HF_CLK
49 // ALT2 (2) - Select instance: i2c3 signal: I2C3_SCL
50 // ALT3 (3) - Select instance: xtalosc signal: XTALOSC_REF_CLK_24M
51 // ALT4 (4) - Select instance: ccm signal: CCM_CLKO2
52 // ALT5 (5) - Select instance: gpio1 signal: GPIO1_IO03
53 // ALT6 (6) - Select instance: usb signal: USB_H1_OC
54 // ALT7 (7) - Select instance: mlb signal: MLB_CLK
55 HW_IOMUXC_SW_MUX_CTL_PAD_GPIO03_WR(
56 BF_IOMUXC_SW_MUX_CTL_PAD_GPIO03_SION_V(ENABLED) |
57 BF_IOMUXC_SW_MUX_CTL_PAD_GPIO03_MUX_MODE_V(ALT2));
58 // Pad Control Register:
59 // IOMUXC_SW_PAD_CTL_PAD_GPIO03(0x020E05F8)
60 // HYS [16] - Hysteresis Enable Field Reset: ENABLED
61 // DISABLED (0) - CMOS input
62 // ENABLED (1) - Schmitt trigger input
63 // PUS [15:14] - Pull Up / Down Config. Field Reset: 100K_OHM_PU
64 // 100K_OHM_PD (0) - 100K Ohm Pull Down
65 // 47K_OHM_PU (1) - 47K Ohm Pull Up
66 // 100K_OHM_PU (2) - 100K Ohm Pull Up
67 // 22K_OHM_PU (3) - 22K Ohm Pull Up
68 // PUE [13] - Pull / Keep Select Field Reset: PULL
69 // KEEP (0) - Keeper Enabled
70 // PULL (1) - Pull Enabled
71 // PKE [12] - Pull / Keep Enable Field Reset: ENABLED
72 // DISABLED (0) - Pull/Keeper Disabled
73 // ENABLED (1) - Pull/Keeper Enabled
74 // ODE [11] - Open Drain Enable Field Reset: DISABLED
75 // Enables open drain of the pin.
76 // DISABLED (0) - Output is CMOS.
77 // ENABLED (1) - Output is Open Drain.
78 // SPEED [7:6] - Speed Field Reset: 100MHZ
79 // RESERVED0 (0) - Reserved
80 // 50MHZ (1) - Low (50 MHz)
81 // 100MHZ (2) - Medium (100 MHz)
82 // 200MHZ (3) - Maximum (200 MHz)
83 // DSE [5:3] - Drive Strength Field Reset: 40_OHM
84 // HIZ (0) - HI-Z
85 // 240_OHM (1) - 240 Ohm
86 // 120_OHM (2) - 120 Ohm
87 // 80_OHM (3) - 80 Ohm
88 // 60_OHM (4) - 60 Ohm
89 // 48_OHM (5) - 48 Ohm
90 // 40_OHM (6) - 40 Ohm
91 // 34_OHM (7) - 34 Ohm
92 // SRE [0] - Slew Rate Field Reset: SLOW
93 // Slew rate control.
94 // SLOW (0) - Slow Slew Rate
95 // FAST (1) - Fast Slew Rate
96 HW_IOMUXC_SW_PAD_CTL_PAD_GPIO03_WR(
97 BF_IOMUXC_SW_PAD_CTL_PAD_GPIO03_HYS_V(ENABLED) |
98 BF_IOMUXC_SW_PAD_CTL_PAD_GPIO03_PUS_V(100K_OHM_PU) |
99 BF_IOMUXC_SW_PAD_CTL_PAD_GPIO03_PUE_V(PULL) |
100 BF_IOMUXC_SW_PAD_CTL_PAD_GPIO03_PKE_V(ENABLED) |
101 BF_IOMUXC_SW_PAD_CTL_PAD_GPIO03_ODE_V(ENABLED) |
102 BF_IOMUXC_SW_PAD_CTL_PAD_GPIO03_SPEED_V(50MHZ) |
103 BF_IOMUXC_SW_PAD_CTL_PAD_GPIO03_DSE_V(60_OHM) |
104 BF_IOMUXC_SW_PAD_CTL_PAD_GPIO03_SRE_V(SLOW));
105 // Pad GPIO03 is involved in Daisy Chain.
106 // Input Select Register:
107 // IOMUXC_I2C3_SCL_IN_SELECT_INPUT(0x020E0878)
108 // DAISY [1:0] - MUX Mode Select Field Reset: EIM_DATA17_ALT6
109 // Selecting Pads Involved in Daisy Chain.
110 // EIM_DATA17_ALT6 (0) - Select signal i2c3 I2C3_SCL as input from pad EIM_DATA17(ALT6).
111 // GPIO03_ALT2 (1) - Select signal i2c3 I2C3_SCL as input from pad GPIO03(ALT2).
112 // GPIO05_ALT6 (2) - Select signal i2c3 I2C3_SCL as input from pad GPIO05(ALT6).
113 HW_IOMUXC_I2C3_SCL_IN_SELECT_INPUT_WR(
114 BF_IOMUXC_I2C3_SCL_IN_SELECT_INPUT_DAISY_V(GPIO03_ALT2));
115
116 // Config i2c3.I2C3_SDA to pad EIM_DATA18(D24)
117 // HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18_WR(0x00000016);
118 // HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_WR(0x0001B860);
119 // HW_IOMUXC_I2C3_SDA_IN_SELECT_INPUT_WR(0x00000000);
120 // Mux Register:
121 // IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18(0x020E014C)
122 // SION [4] - Software Input On Field Reset: DISABLED
123 // Force the selected mux mode Input path no matter of MUX_MODE functionality.
124 // DISABLED (0) - Input Path is determined by functionality of the selected mux mode (regular).
125 // ENABLED (1) - Force input path of pad.
126 // MUX_MODE [3:0] - MUX Mode Select Field Reset: ALT5
127 // Select iomux modes to be used for pad.
128 // ALT0 (0) - Select instance: eim signal: EIM_DATA18
129 // ALT1 (1) - Select instance: ecspi1 signal: ECSPI1_MOSI
130 // ALT2 (2) - Select instance: ipu1 signal: IPU1_DI0_PIN07
131 // ALT3 (3) - Select instance: ipu1 signal: IPU1_CSI1_DATA17
132 // ALT4 (4) - Select instance: ipu1 signal: IPU1_DI1_D0_CS
133 // ALT5 (5) - Select instance: gpio3 signal: GPIO3_IO18
134 // ALT6 (6) - Select instance: i2c3 signal: I2C3_SDA
135 // ALT8 (8) - Select instance: epdc signal: EPDC_VCOM1
136 HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18_WR(
137 BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18_SION_V(ENABLED) |
138 BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18_MUX_MODE_V(ALT6));
139 // Pad Control Register:
140 // IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18(0x020E051C)
141 // HYS [16] - Hysteresis Enable Field Reset: ENABLED
142 // DISABLED (0) - CMOS input
143 // ENABLED (1) - Schmitt trigger input
144 // PUS [15:14] - Pull Up / Down Config. Field Reset: 100K_OHM_PU
145 // 100K_OHM_PD (0) - 100K Ohm Pull Down
146 // 47K_OHM_PU (1) - 47K Ohm Pull Up
147 // 100K_OHM_PU (2) - 100K Ohm Pull Up
148 // 22K_OHM_PU (3) - 22K Ohm Pull Up
149 // PUE [13] - Pull / Keep Select Field Reset: PULL
150 // KEEP (0) - Keeper Enabled
151 // PULL (1) - Pull Enabled
152 // PKE [12] - Pull / Keep Enable Field Reset: ENABLED
153 // DISABLED (0) - Pull/Keeper Disabled
154 // ENABLED (1) - Pull/Keeper Enabled
155 // ODE [11] - Open Drain Enable Field Reset: DISABLED
156 // Enables open drain of the pin.
157 // DISABLED (0) - Output is CMOS.
158 // ENABLED (1) - Output is Open Drain.
159 // SPEED [7:6] - Speed Field Reset: 100MHZ
160 // RESERVED0 (0) - Reserved
161 // 50MHZ (1) - Low (50 MHz)
162 // 100MHZ (2) - Medium (100 MHz)
163 // 200MHZ (3) - Maximum (200 MHz)
164 // DSE [5:3] - Drive Strength Field Reset: 40_OHM
165 // HIZ (0) - HI-Z
166 // 240_OHM (1) - 240 Ohm
167 // 120_OHM (2) - 120 Ohm
168 // 80_OHM (3) - 80 Ohm
169 // 60_OHM (4) - 60 Ohm
170 // 48_OHM (5) - 48 Ohm
171 // 40_OHM (6) - 40 Ohm
172 // 34_OHM (7) - 34 Ohm
173 // SRE [0] - Slew Rate Field Reset: SLOW
174 // Slew rate control.
175 // SLOW (0) - Slow Slew Rate
176 // FAST (1) - Fast Slew Rate
177 HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_WR(
178 BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_HYS_V(ENABLED) |
179 BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_PUS_V(100K_OHM_PU) |
180 BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_PUE_V(PULL) |
181 BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_PKE_V(ENABLED) |
182 BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_ODE_V(ENABLED) |
183 BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_SPEED_V(50MHZ) |
184 BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_DSE_V(60_OHM) |
185 BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_SRE_V(SLOW));
186 // Pad EIM_DATA18 is involved in Daisy Chain.
187 // Input Select Register:
188 // IOMUXC_I2C3_SDA_IN_SELECT_INPUT(0x020E087C)
189 // DAISY [1:0] - MUX Mode Select Field Reset: EIM_DATA18_ALT6
190 // Selecting Pads Involved in Daisy Chain.
191 // EIM_DATA18_ALT6 (0) - Select signal i2c3 I2C3_SDA as input from pad EIM_DATA18(ALT6).
192 // GPIO16_ALT6 (1) - Select signal i2c3 I2C3_SDA as input from pad GPIO16(ALT6).
193 // GPIO06_ALT2 (2) - Select signal i2c3 I2C3_SDA as input from pad GPIO06(ALT2).
194 HW_IOMUXC_I2C3_SDA_IN_SELECT_INPUT_WR(
195 BF_IOMUXC_I2C3_SDA_IN_SELECT_INPUT_DAISY_V(EIM_DATA18_ALT6));
196 }
197