1 /**********************************************************************
2 * $Id$ lpc177x_8x_clkpwr.c 2011-06-02
3 *//**
4 * @file lpc177x_8x_clkpwr.c
5 * @brief Contains all functions support for Clock and Power Control
6 * firmware library on LPC177x_8x
7 * @version 1.0
8 * @date 02. June. 2011
9 * @author NXP MCU SW Application Team
10 *
11 * Copyright(C) 2011, NXP Semiconductor
12 * All rights reserved.
13 *
14 ***********************************************************************
15 * Software that is described herein is for illustrative purposes only
16 * which provides customers with programming information regarding the
17 * products. This software is supplied "AS IS" without any warranties.
18 * NXP Semiconductors assumes no responsibility or liability for the
19 * use of the software, conveys no license or title under any patent,
20 * copyright, or mask work right to the product. NXP Semiconductors
21 * reserves the right to make changes in the software without
22 * notification. NXP Semiconductors also make no representation or
23 * warranty that such application will be suitable for the specified
24 * use without further testing or modification.
25 **********************************************************************/
26
27 /* Peripheral group ----------------------------------------------------------- */
28 /** @addtogroup CLKPWR
29 * @{
30 */
31
32 /* Includes ------------------------------------------------------------------- */
33 #include "lpc177x_8x_clkpwr.h"
34
35
36 uint32_t USBFrequency = 0;
37 uint32_t SPIFIFrequency = 0;
38 /* Public Functions ----------------------------------------------------------- */
39 /** @addtogroup CLKPWR_Public_Functions
40 * @{
41 */
42
43 /*********************************************************************//**
44 * @brief Set value of each Peripheral Clock Selection
45 * @param[in] ClkType clock type that will be divided, should be:
46 * - CLKPWR_CLKTYPE_CPU : CPU clock
47 * - CLKPWR_CLKTYPE_PER : Peripheral clock
48 * - CLKPWR_CLKTYPE_EMC : EMC clock
49 * - CLKPWR_CLKTYPE_USB : USB clock
50 * @param[in] DivVal Value of divider. This value should be set as follows:
51 * - CPU clock: DivVal must be in range: 0..31
52 * - Peripheral clock: DivVal must be in range: 0..31
53 * - EMC clock: DivVal must be:
54 * + 0: The EMC uses the same clock as the CPU
55 * + 1: The EMC uses a clock at half the rate of the CPU
56 * - USB clock: DivVal must be:
57 * + 0: the divider is turned off, no clock will
58 * be provided to the USB subsystem
59 * + 4: PLL0 output is divided by 4. PLL0 output must be 192MHz
60 * + 6: PLL0 output is divided by 6. PLL0 output must be 288MHz
61 * @return none
62 * Note: Pls assign right DivVal, this function will not check if it is illegal.
63 **********************************************************************/
CLKPWR_SetCLKDiv(uint8_t ClkType,uint8_t DivVal)64 void CLKPWR_SetCLKDiv (uint8_t ClkType, uint8_t DivVal)
65 {
66 switch(ClkType)
67 {
68 case CLKPWR_CLKTYPE_CPU:
69 LPC_SC->CCLKSEL = DivVal;
70 SystemCoreClockUpdate(); //Update clock
71 break;
72 case CLKPWR_CLKTYPE_PER:
73 LPC_SC->PCLKSEL = DivVal;
74 SystemCoreClockUpdate(); //Update clock
75 break;
76 case CLKPWR_CLKTYPE_EMC:
77 LPC_SC->EMCCLKSEL = DivVal;
78 SystemCoreClockUpdate(); //Update clock
79 break;
80 case CLKPWR_CLKTYPE_USB:
81 LPC_SC->USBCLKSEL &= ~(0x0000001F);
82 LPC_SC->USBCLKSEL |= DivVal;
83 break;
84 default:
85 while(1);//Error Loop;
86 }
87 }
88
89 /*********************************************************************//**
90 * @brief Get current clock value
91 * @param[in] ClkType clock type that will be divided, should be:
92 * - CLKPWR_CLKTYPE_CPU : CPU clock
93 * - CLKPWR_CLKTYPE_PER : Peripheral clock
94 * - CLKPWR_CLKTYPE_EMC : EMC clock
95 * - CLKPWR_CLKTYPE_USB : USB clock
96 **********************************************************************/
CLKPWR_GetCLK(uint8_t ClkType)97 uint32_t CLKPWR_GetCLK (uint8_t ClkType)
98 {
99 switch(ClkType)
100 {
101 case CLKPWR_CLKTYPE_CPU:
102 return SystemCoreClock;
103
104 case CLKPWR_CLKTYPE_PER:
105 return PeripheralClock;
106
107 case CLKPWR_CLKTYPE_EMC:
108 return EMCClock;
109
110 case CLKPWR_CLKTYPE_USB:
111 return USBClock;
112
113 default:
114 while(1);//error loop
115 }
116 }
117
118 /*********************************************************************//**
119 * @brief Configure power supply for each peripheral according to NewState
120 * @param[in] PPType Type of peripheral used to enable power,
121 * should be one of the following:
122 * - CLKPWR_PCONP_PCLCD : LCD
123 * - CLKPWR_PCONP_PCTIM0 : Timer 0
124 - CLKPWR_PCONP_PCTIM1 : Timer 1
125 - CLKPWR_PCONP_PCUART0 : UART 0
126 - CLKPWR_PCONP_PCUART1 : UART 1
127 - CLKPWR_PCONP_PCPWM0 : PWM 0
128 - CLKPWR_PCONP_PCPWM1 : PWM 1
129 - CLKPWR_PCONP_PCI2C0 : I2C 0
130 - CLKPWR_PCONP_PCUART4 : UART4
131 - CLKPWR_PCONP_PCRTC : RTC
132 - CLKPWR_PCONP_PCSSP1 : SSP 1
133 - CLKPWR_PCONP_PCEMC : EMC
134 - CLKPWR_PCONP_PCADC : ADC
135 - CLKPWR_PCONP_PCAN1 : CAN 1
136 - CLKPWR_PCONP_PCAN2 : CAN 2
137 - CLKPWR_PCONP_PCGPIO : GPIO
138 - CLKPWR_PCONP_PCMC : MCPWM
139 - CLKPWR_PCONP_PCQEI : QEI
140 - CLKPWR_PCONP_PCI2C1 : I2C 1
141 - CLKPWR_PCONP_PCSSP2 : SSP 2
142 - CLKPWR_PCONP_PCSSP0 : SSP 0
143 - CLKPWR_PCONP_PCTIM2 : Timer 2
144 - CLKPWR_PCONP_PCTIM3 : Timer 3
145 - CLKPWR_PCONP_PCUART2 : UART 2
146 - CLKPWR_PCONP_PCUART3 : UART 3
147 - CLKPWR_PCONP_PCI2C2 : I2C 2
148 - CLKPWR_PCONP_PCI2S : I2S
149 - CLKPWR_PCONP_PCSDC : SDC
150 - CLKPWR_PCONP_PCGPDMA : GPDMA
151 - CLKPWR_PCONP_PCENET : Ethernet
152 - CLKPWR_PCONP_PCUSB : USB
153 *
154 * @param[in] NewState New state of Peripheral Power, should be:
155 * - ENABLE : Enable power for this peripheral
156 * - DISABLE : Disable power for this peripheral
157 *
158 * @return none
159 **********************************************************************/
CLKPWR_ConfigPPWR(uint32_t PPType,FunctionalState NewState)160 void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
161 {
162 if (NewState == ENABLE)
163 {
164 LPC_SC->PCONP |= PPType;
165 }
166 else if (NewState == DISABLE)
167 {
168 LPC_SC->PCONP &= ~PPType;
169 }
170 }
171
172 #if 0
173 // nxp21346
174 /*********************************************************************//**
175 * @brief Configure hardware reset for each peripheral according to NewState
176 * @param[in] PPType Type of peripheral used to enable power,
177 * should be one of the following:
178 * - CLKPWR_RSTCON0_LCD : LCD
179 * - CLKPWR_RSTCON0_TIM0 : Timer 0
180 - CLKPWR_RSTCON0_TIM1 : Timer 1
181 - CLKPWR_RSTCON0_UART0 : UART 0
182 - CLKPWR_RSTCON0_UART1 : UART 1
183 - CLKPWR_RSTCON0_PWM0 : PWM 0
184 - CLKPWR_RSTCON0_PWM1 : PWM 1
185 - CLKPWR_RSTCON0_I2C0 : I2C 0
186 - CLKPWR_RSTCON0_UART4 : UART 4
187 - CLKPWR_RSTCON0_RTC : RTC
188 - CLKPWR_RSTCON0_SSP1 : SSP 1
189 - CLKPWR_RSTCON0_EMC : EMC
190 - CLKPWR_RSTCON0_ADC : ADC
191 - CLKPWR_RSTCON0_CAN1 : CAN 1
192 - CLKPWR_RSTCON0_CAN2 : CAN 2
193 - CLKPWR_RSTCON0_GPIO : GPIO
194 - CLKPWR_RSTCON0_MCPWM : MCPWM
195 - CLKPWR_RSTCON0_QEI : QEI
196 - CLKPWR_RSTCON0_I2C1 : I2C 1
197 - CLKPWR_RSTCON0_SSP2 : SSP 2
198 - CLKPWR_RSTCON0_SSP0 : SSP 0
199 - CLKPWR_RSTCON0_TIM2 : Timer 2
200 - CLKPWR_RSTCON0_TIM3 : Timer 3
201 - CLKPWR_RSTCON0_UART2 : UART 2
202 - CLKPWR_RSTCON0_UART3 : UART 3
203 - CLKPWR_RSTCON0_I2C2 : I2C 2
204 - CLKPWR_RSTCON0_I2S : I2S
205 - CLKPWR_RSTCON0_SDC : SDC
206 - CLKPWR_RSTCON0_GPDMA : GPDMA
207 - CLKPWR_RSTCON0_ENET : Ethernet
208 - CLKPWR_RSTCON0_USB : USB
209 *
210 * @param[in] NewState New state of Peripheral Power, should be:
211 * - ENABLE : Enable power for this peripheral
212 * - DISABLE : Disable power for this peripheral
213 *
214 * @return none
215 **********************************************************************/
216 void CLKPWR_ConfigReset(uint8_t PType, FunctionalState NewState)
217 {
218 if(PType < 32)
219 {
220 if(NewState == ENABLE)
221 LPC_SC->RSTCON0 |=(1<<PType);
222 else
223 LPC_SC->RSTCON0 &=~(1<<PType);
224 }
225 else
226 {
227 if(NewState == ENABLE)
228 LPC_SC->RSTCON1 |= (1<<(PType - 31));
229 else
230 LPC_SC->RSTCON1 &= ~(1<<(PType - 31));
231 }
232 }
233 // nxp21346
234 #endif
235
236 /*********************************************************************//**
237 * @brief Enter Sleep mode with co-operated instruction by the Cortex-M3.
238 * @param[in] None
239 * @return None
240 **********************************************************************/
CLKPWR_Sleep(void)241 void CLKPWR_Sleep(void)
242 {
243 LPC_SC->PCON = 0x00;
244 /* Sleep Mode*/
245 __WFI();
246 }
247
248
249 /*********************************************************************//**
250 * @brief Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.
251 * @param[in] None
252 * @return None
253 **********************************************************************/
CLKPWR_DeepSleep(void)254 void CLKPWR_DeepSleep(void)
255 {
256 /* Deep-Sleep Mode, set SLEEPDEEP bit */
257 SCB->SCR = 0x4;
258 LPC_SC->PCON = 0x8;
259 /* Deep Sleep Mode*/
260 __WFI();
261 }
262
263
264 /*********************************************************************//**
265 * @brief Enter Power Down mode with co-operated instruction by the Cortex-M3.
266 * @param[in] None
267 * @return None
268 **********************************************************************/
CLKPWR_PowerDown(void)269 void CLKPWR_PowerDown(void)
270 {
271 /* Deep-Sleep Mode, set SLEEPDEEP bit */
272 SCB->SCR = 0x4;
273 LPC_SC->PCON = 0x09;
274 /* Power Down Mode*/
275 __WFI();
276 }
277
278
279 /*********************************************************************//**
280 * @brief Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.
281 * @param[in] None
282 * @return None
283 **********************************************************************/
CLKPWR_DeepPowerDown(void)284 void CLKPWR_DeepPowerDown(void)
285 {
286 /* Deep-Sleep Mode, set SLEEPDEEP bit */
287 SCB->SCR = 0x4;
288 LPC_SC->PCON = 0x03;
289 /* Deep Power Down Mode*/
290 __WFI();
291 }
292
293 /**
294 * @}
295 */
296
297 /**
298 * @}
299 */
300
301 /* --------------------------------- End Of File ------------------------------ */
302