1 /********************************************************************** 2 * $Id$ lpc177x_8x_pinsel.h 2011-06-02 3 *//** 4 * @file lpc177x_8x_pinsel.h 5 * @brief Contains all macro definitions and function prototypes 6 * support for Pin-connection block firmware library on LPC177x_8x 7 * @version 1.0 8 * @date 02. June. 2011 9 * @author NXP MCU SW Application Team 10 * 11 * Copyright(C) 2011, NXP Semiconductor 12 * All rights reserved. 13 * 14 *********************************************************************** 15 * Software that is described herein is for illustrative purposes only 16 * which provides customers with programming information regarding the 17 * products. This software is supplied "AS IS" without any warranties. 18 * NXP Semiconductors assumes no responsibility or liability for the 19 * use of the software, conveys no license or title under any patent, 20 * copyright, or mask work right to the product. NXP Semiconductors 21 * reserves the right to make changes in the software without 22 * notification. NXP Semiconductors also make no representation or 23 * warranty that such application will be suitable for the specified 24 * use without further testing or modification. 25 **********************************************************************/ 26 27 /* Peripheral group ----------------------------------------------------------- */ 28 /** @defgroup PINSEL Pin Selection 29 * @ingroup LPC177x_8xCMSIS_FwLib_Drivers 30 * @{ 31 */ 32 33 #ifndef __LPC177X_8X_PINSEL_H 34 #define __LPC177X_8X_PINSEL_H 35 36 /* Includes ------------------------------------------------------------------- */ 37 #include "LPC177x_8x.h" 38 #include "lpc_types.h" 39 40 41 /* Public Macros -------------------------------------------------------------- */ 42 /** @defgroup PINSEL_Public_Macros 43 * @{ 44 */ 45 46 /* Macros define IOCON bits */ 47 #define IOCON_MODE_PLAIN ((0<<3)) 48 #define IOCON_MODE_PULLDOWN ((1<<3)) 49 #define IOCON_MODE_PULLUP ((2<<3)) 50 #define IOCON_MODE_REPEATER ((3<<3)) 51 #define IOCON_HYS ((1<<5)) 52 #define IOCON_SLEW ((1<<6)) 53 #define IOCON_INBUF ((1<<7)) 54 #define IOCON_I2CMODE_FAST ((0<<8)) 55 #define IOCON_I2CMODE_OPENDRAIN ((1<<8)) 56 #define IOCON_I2CMODE_FASTPLUS ((2<<8)) 57 #define IOCON_I2CMODE_HIGHOPENDRAIN ((3<<8)) 58 #define IOCON_ODMODE ((1<<10)) 59 60 61 /* Macros define for LOC registers */ 62 #define LOC_CAN_RD_1_P0_0 ((0)) /**< Input for CAN_RD_1 comes from P0.0 */ 63 #define LOC_CAN_RD_1_P0_21 ((1)) /**< Input for CAN_RD_1 comes from P0.21 */ 64 #define LOC_CAN_RD_2_P2_7 ((0)) /**< Input for CAN_RD_2 comes from P2.7 */ 65 #define LOC_CAN_RD_2_P0_4 ((1)) /**< Input for CAN_RD_2 comes from P0.4 */ 66 #define LOC_ENET_MDIO_P2_9 ((0)) /**< Input for ENET_MDIO comes from P2.9 */ 67 #define LOC_ENET_MDIO_P1_17 ((1)) /**< Input for ENET_MDIO comes from P1.17 */ 68 #define LOC_EINT_0_P0_29 ((0)) /**< Input for EINT_0 comes from P0.29 */ 69 #define LOC_EINT_0_P2_10 ((1)) /**< Input for EINT_0 comes from P2.10 */ 70 #define LOC_EINT_1_P0_30 ((0)) /**< Input for EINT_1 comes from P0.30 */ 71 #define LOC_EINT_1_P2_11 ((1)) /**< Input for EINT_1 comes from P2.11 */ 72 #define LOC_I2C0_SCL_P1_31 ((0)) /**< Input for I2C0_SCL comes from P1.31 */ 73 #define LOC_I2C0_SCL_P0_28 ((1)) /**< Input for I2C0_SCL comes from P0.28 */ 74 #define LOC_I2C0_SCL_P5_3 ((2)) /**< Input for I2C0_SCL comes from P5.3 */ 75 #define LOC_I2C0_SDA_P1_30 ((0)) /**< Input for I2C0_SDA comes from P1.30 */ 76 #define LOC_I2C0_SDA_P0_27 ((1)) /**< Input for I2C0_SDA comes from P0.27 */ 77 #define LOC_I2C0_SDA_P5_2 ((2)) /**< Input for I2C0_SDA comes from P5.2 */ 78 #define LOC_I2C1_SCL_P0_1 ((0)) /**< Input for I2C1_SCL comes from P0.1 */ 79 #define LOC_I2C1_SCL_P2_15 ((1)) /**< Input for I2C1_SCL comes from P2.15 */ 80 #define LOC_I2C1_SCL_P0_20 ((2)) /**< Input for I2C1_SCL comes from P0.20 */ 81 #define LOC_I2C1_SDA_P2_14 ((0)) /**< Input for I2C1_SDA comes from P2.14 */ 82 #define LOC_I2C1_SDA_P0_0 ((1)) /**< Input for I2C1_SDA comes from P0.0 */ 83 #define LOC_I2C1_SDA_P0_19 ((2)) /**< Input for I2C1_SDA comes from P0.19 */ 84 #define LOC_I2C2_SCL_P2_31 ((0)) /**< Input for I2C2_SCL comes from P2.31 */ 85 #define LOC_I2C2_SCL_P0_11 ((1)) /**< Input for I2C2_SCL comes from P0.11 */ 86 #define LOC_I2C2_SCL_P4_21 ((2)) /**< Input for I2C2_SCL comes from P4.21 */ 87 #define LOC_I2C2_SCL_P4_29 ((3)) /**< Input for I2C2_SCL comes from P4.29 */ 88 #define LOC_I2C2_SDA_P2_30 ((0)) /**< Input for I2C2_SDA comes from P2.30 */ 89 #define LOC_I2C2_SDA_P0_10 ((1)) /**< Input for I2C2_SDA comes from P0.10 */ 90 #define LOC_I2C2_SDA_P4_20 ((2)) /**< Input for I2C2_SDA comes from P4.20 */ 91 #define LOC_I2C2_SDA_P1_15 ((3)) /**< Input for I2C2_SDA comes from P1.15 */ 92 #define LOC_I2S_RX_SCK_P0_23 ((0)) /**< Input for I2S_RX_SCK comes from P0.23 */ 93 #define LOC_I2S_RX_SCK_P0_4 ((1)) /**< Input for I2S_RX_SCK comes from P0.4 */ 94 #define LOC_I2S_RX_SDA_P0_25 ((0)) /**< Input for I2S_RX_SDA comes from P0.25 */ 95 #define LOC_I2S_RX_SDA_P0_6 ((1)) /**< Input for I2S_RX_SDA comes from P0.6 */ 96 #define LOC_I2S_RX_WS_P0_24 ((0)) /**< Input for I2S_RX_WS comes from P0.24 */ 97 #define LOC_I2S_RX_WS_P0_5 ((1)) /**< Input for I2S_RX_WS comes from P0.5 */ 98 #define LOC_I2S_TX_SCK_P2_11 ((0)) /**< Input for I2S_TX_SCK comes from P2.11 */ 99 #define LOC_I2S_TX_SCK_P0_7 ((1)) /**< Input for I2S_TX_SCK comes from P0.7 */ 100 #define LOC_I2S_TX_WS_P2_12 ((0)) /**< Input for I2S_TX_WS comes from P2.12 */ 101 #define LOC_I2S_TX_WS_P0_8 ((1)) /**< Input for I2S_TX_WS comes from P0.8 */ 102 #define LOC_PWM0_CAP_0_P1_12 ((0)) /**< Input for PWM0_CAP_0 comes from P1.12 */ 103 #define LOC_PWM0_CAP_0_P3_22 ((1)) /**< Input for PWM0_CAP_0 comes from P3.22 */ 104 #define LOC_PWM1_CAP_0_P3_23 ((0)) /**< Input for PWM1_CAP_0 comes from P3.23 */ 105 #define LOC_PWM1_CAP_0_P1_28 ((1)) /**< Input for PWM1_CAP_0 comes from P1.28 */ 106 #define LOC_PWM1_CAP_0_P2_6 ((2)) /**< Input for PWM1_CAP_0 comes from P2.6 */ 107 #define LOC_SD_CMD_P0_20 ((0)) /**< Input for SD_CMD comes from P0.20 */ 108 #define LOC_SD_CMD_P1_3 ((1)) /**< Input for SD_CMD comes from P1.3 */ 109 #define LOC_SD_DAT_0_P0_22 ((0)) /**< Input for SD_DAT_0 comes from P0.22 */ 110 #define LOC_SD_DAT_0_P1_6 ((1)) /**< Input for SD_DAT_0 comes from P1.6 */ 111 #define LOC_SD_DAT_1_P2_11 ((0)) /**< Input for SD_DAT_1 comes from P2.11 */ 112 #define LOC_SD_DAT_1_P1_7 ((1)) /**< Input for SD_DAT_1 comes from P1.7 */ 113 #define LOC_SD_DAT_2_P2_12 ((0)) /**< Input for SD_DAT_2 comes from P2.12 */ 114 #define LOC_SD_DAT_2_P1_11 ((1)) /**< Input for SD_DAT_2 comes from P1.11 */ 115 #define LOC_SD_DAT_3_P2_13 ((0)) /**< Input for SD_DAT_3 comes from P2.13 */ 116 #define LOC_SD_DAT_3_P1_12 ((1)) /**< Input for SD_DAT_3 comes from P1.12 */ 117 #define LOC_SSP0_MISO_P2_26 ((0)) /**< Input for SSP0_MISO comes from P2.26 */ 118 #define LOC_SSP0_MISO_P1_23 ((1)) /**< Input for SSP0_MISO comes from P1_23 */ 119 #define LOC_SSP0_MISO_P0_17 ((2)) /**< Input for SSP0_MISO comes from P0_17 */ 120 #define LOC_SSP0_MOSI_P2_27 ((0)) /**< Input for SSP0_MOSI comes from P2.27 */ 121 #define LOC_SSP0_MOSI_P1_24 ((1)) /**< Input for SSP0_MOSI comes from P1.24 */ 122 #define LOC_SSP0_MOSI_P0_18 ((2)) /**< Input for SSP0_MOSI comes from P0.18 */ 123 #define LOC_SSP0_SCK_P1_20 ((0)) /**< Input for SSP0_SCK comes from P1.20 */ 124 #define LOC_SSP0_SCK_P2_22 ((1)) /**< Input for SSP0_SCK comes from P2.22 */ 125 #define LOC_SSP0_SCK_P0_15 ((2)) /**< Input for SSP0_SCK comes from P0_15 */ 126 #define LOC_SSP0_SSEL_P2_23 ((0)) /**< Input for SSP0_SSEL comes from P2.23 */ 127 #define LOC_SSP0_SSEL_P1_21 ((1)) /**< Input for SSP0_SSEL comes from P1.21 */ 128 #define LOC_SSP0_SSEL_P1_28 ((2)) /**< Input for SSP0_SSEL comes from P1.28 */ 129 #define LOC_SSP0_SSEL_P0_16 ((3)) /**< Input for SSP0_SSEL comes from P0.16 */ 130 #define LOC_SSP1_MISO_P0_12 ((0)) /**< Input for SSP1_MISO comes from P0.12 */ 131 #define LOC_SSP1_MISO_P1_18 ((1)) /**< Input for SSP1_MISO comes from P1.18 */ 132 #define LOC_SSP1_MISO_P4_22 ((2)) /**< Input for SSP1_MISO comes from P4_22 */ 133 #define LOC_SSP1_MISO_P0_8 ((3)) /**< Input for SSP1_MISO comes from P0.8 */ 134 #define LOC_SSP1_MOSI_P0_13 ((0)) /**< Input for SSP1_MOSI comes from P0.13 */ 135 #define LOC_SSP1_MOSI_P1_22 ((1)) /**< Input for SSP1_MOSI comes from P1.22 */ 136 #define LOC_SSP1_MOSI_P4_23 ((2)) /**< Input for SSP1_MOSI comes from P4.23 */ 137 #define LOC_SSP1_MOSI_P0_9 ((3)) /**< Input for SSP1_MOSI comes from P0.9 */ 138 #define LOC_SSP1_SCK_P1_31 ((0)) /**< Input for SSP1_SCK comes from P1.31 */ 139 #define LOC_SSP1_SCK_P1_19 ((1)) /**< Input for SSP1_SCK comes from P1.19 */ 140 #define LOC_SSP1_SCK_P4_20 ((2)) /**< Input for SSP1_SCK comes from P4_20 */ 141 #define LOC_SSP1_SCK_P0_7 ((3)) /**< Input for SSP1_SCK comes from P0_7 */ 142 #define LOC_SSP1_SSEL_P0_14 ((0)) /**< Input for SSP1_SSEL comes from P0.14 */ 143 #define LOC_SSP1_SSEL_P1_26 ((1)) /**< Input for SSP1_SSEL comes from P1.26 */ 144 #define LOC_SSP1_SSEL_P4_21 ((2)) /**< Input for SSP1_SSEL comes from P4.21 */ 145 #define LOC_SSP1_SSEL_P0_6 ((3)) /**< Input for SSP1_SSEL comes from P0.6 */ 146 #define LOC_SSP2_MISO_P1_4 ((1)) /**< Input for SSP2_MISO comes from P1.4 */ 147 #define LOC_SSP2_MOSI_P1_1 ((1)) /**< Input for SSP2_MOSI comes from P1.1 */ 148 #define LOC_SSP2_SCK_P1_0 ((1)) /**< Input for SSP2_SCK comes from P1.0 */ 149 #define LOC_SSP2_SSEL_P1_8 ((1)) /**< Input for SSP2_SSEL comes from P1.8 */ 150 #define LOC_T0_CAP_0_P3_23 ((0)) /**< Input for T0_CAP_0 comes from P3.23 */ 151 #define LOC_T0_CAP_0_P1_26 ((1)) /**< Input for T0_CAP_0 comes from P1.26 */ 152 #define LOC_T0_CAP_1_P3_24 ((0)) /**< Input for T0_CAP_1 comes from P3.24 */ 153 #define LOC_T0_CAP_1_P1_27 ((1)) /**< Input for T0_CAP_1 comes from P1.27 */ 154 #define LOC_T1_CAP_0_P1_18 ((0)) /**< Input for T1_CAP_0 comes from P1.18 */ 155 #define LOC_T1_CAP_0_P3_27 ((1)) /**< Input for T1_CAP_0 comes from P3.27 */ 156 #define LOC_T1_CAP_1_P3_28 ((0)) /**< Input for T1_CAP_1 comes from P3.28 */ 157 #define LOC_T1_CAP_1_P1_19 ((1)) /**< Input for T1_CAP_1 comes from P1.19 */ 158 #define LOC_T2_CAP_0_P2_14 ((0)) /**< Input for T2_CAP_0 comes from P2.14 */ 159 #define LOC_T2_CAP_0_P2_6 ((1)) /**< Input for T2_CAP_0 comes from P2.6 */ 160 #define LOC_T2_CAP_0_P0_4 ((2)) /**< Input for T2_CAP_0 comes from P0.4 */ 161 #define LOC_T2_CAP_0_P1_14 ((3)) /**< Input for T2_CAP_0 comes from P1.14 */ 162 #define LOC_T2_CAP_1_P2_15 ((0)) /**< Input for T2_CAP_1 comes from P2.15 */ 163 #define LOC_T2_CAP_1_P0_5 ((1)) /**< Input for T2_CAP_1 comes from P0.5 */ 164 #define LOC_T3_CAP_0_P0_23 ((0)) /**< Input for T3_CAP_0 comes from P0.23 */ 165 #define LOC_T3_CAP_0_P2_22 ((1)) /**< Input for T3_CAP_0 comes from P2.22 */ 166 #define LOC_T3_CAP_0_P1_10 ((2)) /**< Input for T3_CAP_0 comes from P1.10 */ 167 #define LOC_T3_CAP_1_P0_24 ((0)) /**< Input for T3_CAP_1 comes from P0.24 */ 168 #define LOC_T3_CAP_1_P2_23 ((1)) /**< Input for T3_CAP_1 comes from P2.23 */ 169 #define LOC_T3_CAP_1_P1_0 ((2)) /**< Input for T3_CAP_1 comes from P1.0 */ 170 #define LOC_U0_RXD_P0_1 ((0)) /**< Input for U0_RXD comes from P0.1 */ 171 #define LOC_U0_RXD_P0_3 ((1)) /**< Input for U0_RXD comes from P0.3 */ 172 #define LOC_U1_CTS_P0_17 ((0)) /**< Input for U1_CTS comes from P0.17 */ 173 #define LOC_U1_CTS_P2_8 ((1)) /**< Input for U1_CTS comes from P2.8 */ 174 #define LOC_U1_CTS_P2_2 ((2)) /**< Input for U1_CTS comes from P2.2 */ 175 #define LOC_U1_CTS_P3_18 ((3)) /**< Input for U1_CTS comes from P3.18 */ 176 #define LOC_U1_DCD_P0_18 ((0)) /**< Input for U1_DCD comes from P0.18 */ 177 #define LOC_U1_DCD_P2_3 ((1)) /**< Input for U1_DCD comes from P2.3 */ 178 #define LOC_U1_DCD_P3_19 ((2)) /**< Input for U1_DCD comes from P3_19 */ 179 #define LOC_U1_DSR_P0_19 ((0)) /**< Input for U1_DSR comes from P0.19 */ 180 #define LOC_U1_DSR_P2_4 ((1)) /**< Input for U1_DSR comes from P2.4 */ 181 #define LOC_U1_DSR_P3_20 ((2)) /**< Input for U1_DSR comes from P0.19 */ 182 #define LOC_U1_RI_P0_21 ((0)) /**< Input for U1_RI comes from P0.21 */ 183 #define LOC_U1_RI_P2_6 ((1)) /**< Input for U1_RI comes from P2.6 */ 184 #define LOC_U1_RI_P3_22 ((2)) /**< Input for U1_RI comes from P3.22 */ 185 #define LOC_U1_RXD_P0_16 ((0)) /**< Input for U1_RXD comes from P0.16 */ 186 #define LOC_U1_RXD_P3_17 ((1)) /**< Input for U1_RXD comes from P3.17 */ 187 #define LOC_U1_RXD_P2_1 ((2)) /**< Input for U1_RXD comes from P2.1 */ 188 #define LOC_U2_RXD_P0_11 ((0)) /**< Input for U2_RXD comes from P0.11 */ 189 #define LOC_U2_RXD_P4_23 ((1)) /**< Input for U2_RXD comes from P4.23 */ 190 #define LOC_U2_RXD_P2_9 ((2)) /**< Input for U2_RXD comes from P2.9 */ 191 #define LOC_U3_RXD_P0_26 ((0)) /**< Input for U3_RXD comes from P0.26 */ 192 #define LOC_U3_RXD_P0_1 ((1)) /**< Input for U3_RXD comes from P0.1 */ 193 #define LOC_U3_RXD_P4_29 ((2)) /**< Input for U3_RXD comes from P4.29 */ 194 #define LOC_U3_RXD_P0_3 ((3)) /**< Input for U3_RXD comes from P0.3 */ 195 #define LOC_U4_RXD_P2_9 ((0)) /**< Input for U4_RXD comes from P2.9 */ 196 #define LOC_U4_RXD_P5_3 ((1)) /**< Input for U4_RXD comes from P5.3 */ 197 #define LOC_USB_SCL_P0_28 ((0)) /**< Input for USB_SCL comes from P0.28 */ 198 #define LOC_USB_SCL_P1_28 ((1)) /**< Input for USB_SCL comes from P1.28 */ 199 #define LOC_USB_SDA_P0_27 ((0)) /**< Input for USB_SDA comes from P0.27 */ 200 #define LOC_USB_SDA_P1_29 ((1)) /**< Input for USB_SDA comes from P1.29 */ 201 202 /** 203 * @} 204 */ 205 206 /** @defgroup PINSEL_Public_Types PINSEL Public Types 207 * @{ 208 */ 209 210 211 typedef enum 212 { 213 PINSEL_BASICMODE_PLAINOUT = 0, /**< Plain output */ 214 PINSEL_BASICMODE_PULLDOWN, /**< Pull-down enabled */ 215 PINSEL_BASICMODE_PULLUP, /**< Pull-up enabled (default) */ 216 PINSEL_BASICMODE_REPEATER /**< Repeater mode */ 217 }PinSel_BasicMode; 218 219 typedef enum 220 { 221 /** Fast mode (400 kHz clock rate) and standard (100 kHz clock rate) */ 222 PINSEL_I2CMODE_FAST_STANDARD = 0, 223 /** Open drain I/O (not I2C). No glitch filter, 3 mA typical output drive */ 224 PINSEL_I2CMODE_OPENDRAINIO, 225 /** Fast Mode Plus I2C. This includes a filter for <50 ns glitches */ 226 PINSEL_I2CMODE_FASTMODEPLUS, 227 /** High drive open drain I/O (not I2C). No glitch filter, 20 mA typical output drive */ 228 PINSEL_I2CMODE_HIDRIVE_OPENDRAIN 229 }PinSel_I2cMode; 230 231 /** 232 * @} 233 */ 234 235 236 /* Public Functions ----------------------------------------------------------- */ 237 /** @defgroup PINSEL_Public_Functions 238 * @{ 239 */ 240 void PINSEL_ConfigPin(uint8_t portnum, uint8_t pinnum, uint8_t funcnum); 241 void PINSEL_SetPinMode(uint8_t portnum, uint8_t pinnum, PinSel_BasicMode modenum); 242 void PINSEL_SetHysMode(uint8_t portnum, uint8_t pinnum, FunctionalState NewState); 243 void PINSEL_SetSlewMode(uint8_t portnum, uint8_t pinnum, FunctionalState NewState); 244 void PINSEL_SetInBufMode(uint8_t portnum, uint8_t pinnum, FunctionalState NewState); 245 void PINSEL_SetI2CMode(uint8_t portnum, uint8_t pinnum, PinSel_I2cMode I2CMode); 246 void PINSEL_SetOpenDrainMode(uint8_t portnum, uint8_t pinnum, FunctionalState NewState); 247 void PINSEL_SetAnalogPinMode (uint8_t portnum, uint8_t pinnum, uint8_t enable); 248 void PINSEL_DacEnable (uint8_t portnum, uint8_t pinnum, uint8_t enable); 249 void PINSEL_SetFilter (uint8_t portnum, uint8_t pinnum, uint8_t enable); 250 251 252 /** 253 * @} 254 */ 255 256 #endif /* LPC177x_8x_PINSEL_H */ 257 258 /** 259 * @} 260 */ 261 262 /* --------------------------------- End Of File ------------------------------ */ 263 264