1 /**********************************************************************
2 * $Id$ lpc177x_8x_uart.c 2011-06-02
3 *//**
4 * @file lpc177x_8x_uart.c
5 * @brief Contains all functions support for UART firmware library
6 * on LPC177x_8x
7 * @version 1.0
8 * @date 02. June. 2011
9 * @author NXP MCU SW Application Team
10 *
11 * Copyright(C) 2011, NXP Semiconductor
12 * All rights reserved.
13 *
14 ***********************************************************************
15 * Software that is described herein is for illustrative purposes only
16 * which provides customers with programming information regarding the
17 * products. This software is supplied "AS IS" without any warranties.
18 * NXP Semiconductors assumes no responsibility or liability for the
19 * use of the software, conveys no license or title under any patent,
20 * copyright, or mask work right to the product. NXP Semiconductors
21 * reserves the right to make changes in the software without
22 * notification. NXP Semiconductors also make no representation or
23 * warranty that such application will be suitable for the specified
24 * use without further testing or modification.
25 **********************************************************************/
26
27 /* Peripheral group ----------------------------------------------------------- */
28 /** @addtogroup UART
29 * @{
30 */
31
32 /* Includes ------------------------------------------------------------------- */
33 #include "lpc177x_8x_uart.h"
34 #include "lpc177x_8x_clkpwr.h"
35
36 /* Private Functions ---------------------------------------------------------- */
37
38 static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate);
39
40
41 /*********************************************************************//**
42 * @brief Determines best dividers to get a target clock rate
43 * @param[in] UARTx Pointer to selected UART peripheral, should be:
44 * - LPC_UART0: UART0 peripheral
45 * - LPC_UART1: UART1 peripheral
46 * - LPC_UART2: UART2 peripheral
47 * - LPC_UART3: UART3 peripheral
48 * @param[in] baudrate Desired UART baud rate.
49 * @return Error status, could be:
50 * - SUCCESS
51 * - ERROR
52 **********************************************************************/
uart_set_divisors(LPC_UART_TypeDef * UARTx,uint32_t baudrate)53 static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate)
54 {
55 Status errorStatus = ERROR;
56
57 uint32_t uClk;
58 uint32_t d, m, bestd, bestm, tmp;
59 uint64_t best_divisor, divisor;
60 uint32_t current_error, best_error;
61 uint32_t recalcbaud;
62
63 /* get UART block clock */
64 uClk = CLKPWR_GetCLK(CLKPWR_CLKTYPE_PER);
65
66 /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers
67 * The formula is :
68 * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL)
69 * It involves floating point calculations. That's the reason the formulae are adjusted with
70 * Multiply and divide method.*/
71
72 /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions:
73 * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */
74 best_error = 0xFFFFFFFF; /* Worst case */
75 bestd = 0;
76 bestm = 0;
77 best_divisor = 0;
78
79 for (m = 1 ; m <= 15 ;m++)
80 {
81 for (d = 0 ; d < m ; d++)
82 {
83 divisor = ((uint64_t)uClk << 28)*m / (baudrate*(m+d));
84 current_error = divisor & 0xFFFFFFFF;
85
86 tmp = divisor>>32;
87
88 /* Adjust error */
89 if(current_error > ((uint32_t)1<<31))
90 {
91 current_error = -current_error;
92 tmp++;
93 }
94
95 /* Out of range */
96 if(tmp < 1 || tmp > 65536)
97 continue;
98
99 if( current_error < best_error)
100 {
101 best_error = current_error;
102 best_divisor = tmp;
103 bestd = d;
104 bestm = m;
105
106 if(best_error == 0)
107 break;
108 }
109 } /* end of inner for loop */
110
111 if (best_error == 0)
112 break;
113 } /* end of outer for loop */
114
115 /* can not find best match */
116 if(best_divisor == 0)
117 return ERROR;
118
119 recalcbaud = (uClk >> 4) * bestm / (best_divisor * (bestm + bestd));
120
121 /* reuse best_error to evaluate baud error*/
122 if(baudrate > recalcbaud)
123 best_error = baudrate - recalcbaud;
124 else
125 best_error = recalcbaud -baudrate;
126
127 best_error = best_error * 100 / baudrate;
128
129 if (best_error < UART_ACCEPTED_BAUDRATE_ERROR)
130 {
131 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
132 {
133 ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN;
134
135 ((LPC_UART1_TypeDef *)UARTx)->DLM = UART_LOAD_DLM(best_divisor);
136
137 ((LPC_UART1_TypeDef *)UARTx)->DLL = UART_LOAD_DLL(best_divisor);
138
139 /* Then reset DLAB bit */
140 ((LPC_UART1_TypeDef *)UARTx)->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
141
142 ((LPC_UART1_TypeDef *)UARTx)->FDR = (UART_FDR_MULVAL(bestm)
143 | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
144 }
145 else
146 {
147 UARTx->LCR |= UART_LCR_DLAB_EN;
148
149 UARTx->DLM = UART_LOAD_DLM(best_divisor);
150
151 UARTx->DLL = UART_LOAD_DLL(best_divisor);
152
153 /* Then reset DLAB bit */
154 UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
155
156 UARTx->FDR = (UART_FDR_MULVAL(bestm) \
157 | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
158 }
159 errorStatus = SUCCESS;
160 }
161
162 return errorStatus;
163 }
164
165 /* End of Private Functions ---------------------------------------------------- */
166
167
168 /* Public Functions ----------------------------------------------------------- */
169 /** @addtogroup UART_Public_Functions
170 * @{
171 */
172 /* UART Init/DeInit functions -------------------------------------------------*/
173 /********************************************************************//**
174 * @brief Initializes the UARTx peripheral according to the specified
175 * parameters in the UART_ConfigStruct.
176 * @param[in] UARTx UART peripheral selected, should be:
177 * - LPC_UART0: UART0 peripheral
178 * - LPC_UART1: UART1 peripheral
179 * - LPC_UART2: UART2 peripheral
180 * - LPC_UART3: UART3 peripheral
181 * - LPC_UART4: UART4 peripheral
182 * @param[in] UART_ConfigStruct Pointer to a UART_CFG_Type structure
183 * that contains the configuration information for the
184 * specified UART peripheral.
185 * @return None
186 *********************************************************************/
UART_Init(LPC_UART_TypeDef * UARTx,UART_CFG_Type * UART_ConfigStruct)187 void UART_Init(LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct)
188 {
189 uint32_t tmp;
190
191 if(UARTx == LPC_UART0)
192 {
193 /* Set up clock and power for UART module */
194 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE);
195 }
196 if(((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
197 {
198 /* Set up clock and power for UART module */
199 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, ENABLE);
200 }
201 if(UARTx == LPC_UART2)
202 {
203 /* Set up clock and power for UART module */
204 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, ENABLE);
205 }
206 if(UARTx == LPC_UART3)
207 {
208 /* Set up clock and power for UART module */
209 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, ENABLE);
210 }
211
212 /* FIFOs are empty */
213 UARTx->FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS);
214
215 // Disable FIFO
216 UARTx->FCR = 0;
217
218 // Dummy reading
219 while (UARTx->LSR & UART_LSR_RDR)
220 {
221 tmp = UARTx->RBR;
222 }
223
224 UARTx->TER = UART_TER_TXEN;
225
226 // Wait for current transmit complete
227 while (!(UARTx->LSR & UART_LSR_THRE));
228
229 // Disable Tx
230 UARTx->TER = 0;
231
232 // Disable interrupt
233 UARTx->IER = 0;
234
235 // Set LCR to default state
236 UARTx->LCR = 0;
237
238 // Set ACR to default state
239 UARTx->ACR = 0;
240
241 // Set RS485 control to default state
242 UARTx->RS485CTRL = 0;
243
244 // Set RS485 delay timer to default state
245 UARTx->RS485DLY = 0;
246
247 // Set RS485 addr match to default state
248 UARTx->ADRMATCH = 0;
249
250 // Dummy reading
251 tmp = UARTx->LSR;
252
253 if(((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
254 {
255 // Set Modem Control to default state
256 ((LPC_UART1_TypeDef *)UARTx)->MCR = 0;
257
258 //Dummy Reading to Clear Status
259 tmp = ((LPC_UART1_TypeDef *)UARTx)->MSR;
260 }
261 else
262 {
263 // Set IrDA to default state for all UART other than UART1
264 UARTx->ICR = 0;
265 }
266
267 // Set Line Control register ----------------------------
268
269 uart_set_divisors(UARTx, (UART_ConfigStruct->Baud_rate));
270
271 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
272 {
273 tmp = (((LPC_UART1_TypeDef *)UARTx)->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \
274 & UART_LCR_BITMASK;
275 }
276 else
277 {
278 tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK;
279 }
280
281 switch (UART_ConfigStruct->Databits)
282 {
283 case UART_DATABIT_5:
284 tmp |= UART_LCR_WLEN5;
285 break;
286
287 case UART_DATABIT_6:
288 tmp |= UART_LCR_WLEN6;
289 break;
290
291 case UART_DATABIT_7:
292 tmp |= UART_LCR_WLEN7;
293 break;
294
295 case UART_DATABIT_8:
296
297 default:
298 tmp |= UART_LCR_WLEN8;
299 break;
300 }
301
302 if (UART_ConfigStruct->Parity == UART_PARITY_NONE)
303 {
304 // Do nothing...
305 }
306 else
307 {
308 tmp |= UART_LCR_PARITY_EN;
309 switch (UART_ConfigStruct->Parity)
310 {
311 case UART_PARITY_ODD:
312 tmp |= UART_LCR_PARITY_ODD;
313 break;
314
315 case UART_PARITY_EVEN:
316 tmp |= UART_LCR_PARITY_EVEN;
317 break;
318
319 case UART_PARITY_SP_1:
320 tmp |= UART_LCR_PARITY_F_1;
321 break;
322
323 case UART_PARITY_SP_0:
324 tmp |= UART_LCR_PARITY_F_0;
325 break;
326
327 default:
328 break;
329 }
330 }
331
332 switch (UART_ConfigStruct->Stopbits)
333 {
334 case UART_STOPBIT_2:
335 tmp |= UART_LCR_STOPBIT_SEL;
336 break;
337
338 case UART_STOPBIT_1:
339
340 default:
341 // Do no thing
342 break;
343 }
344
345
346 // Write back to LCR, configure FIFO and Disable Tx
347 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
348 {
349 ((LPC_UART1_TypeDef *)UARTx)->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
350 }
351 else
352 {
353 UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
354 }
355 }
356
357 /*********************************************************************//**
358 * @brief De-initializes the UARTx peripheral registers to their
359 * default reset values.
360 * @param[in] UARTx UART peripheral selected, should be:
361 * - LPC_UART0: UART0 peripheral
362 * - LPC_UART1: UART1 peripheral
363 * - LPC_UART2: UART2 peripheral
364 * - LPC_UART3: UART3 peripheral
365 * @return None
366 **********************************************************************/
UART_DeInit(LPC_UART_TypeDef * UARTx)367 void UART_DeInit(LPC_UART_TypeDef* UARTx)
368 {
369 UART_TxCmd(UARTx, DISABLE);
370
371 if (UARTx == LPC_UART0)
372 {
373 /* Set up clock and power for UART module */
374 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, DISABLE);
375 }
376
377 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
378 {
379 /* Set up clock and power for UART module */
380 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, DISABLE);
381 }
382
383 if (UARTx == LPC_UART2)
384 {
385 /* Set up clock and power for UART module */
386 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, DISABLE);
387 }
388
389 if (UARTx == LPC_UART3)
390 {
391 /* Set up clock and power for UART module */
392 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, DISABLE);
393 }
394 }
395
396 /*****************************************************************************//**
397 * @brief Fills each UART_InitStruct member with its default value:
398 * - 9600 bps
399 * - 8-bit data
400 * - 1 Stopbit
401 * - None Parity
402 * @param[in] UART_InitStruct Pointer to a UART_CFG_Type structure
403 * which will be initialized.
404 * @return None
405 *******************************************************************************/
UART_ConfigStructInit(UART_CFG_Type * UART_InitStruct)406 void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct)
407 {
408 UART_InitStruct->Baud_rate = 9600;
409
410 UART_InitStruct->Databits = UART_DATABIT_8;
411
412 UART_InitStruct->Parity = UART_PARITY_NONE;
413
414 UART_InitStruct->Stopbits = UART_STOPBIT_1;
415 }
416
417 /* UART Send/Recieve functions -------------------------------------------------*/
418 /*********************************************************************//**
419 * @brief Transmit a single data through UART peripheral
420 * @param[in] UARTx UART peripheral selected, should be:
421 * - LPC_UART0: UART0 peripheral
422 * - LPC_UART1: UART1 peripheral
423 * - LPC_UART2: UART2 peripheral
424 * - LPC_UART3: UART3 peripheral
425 * @param[in] Data Data to transmit (must be 8-bit long)
426 * @return None
427 **********************************************************************/
UART_SendByte(LPC_UART_TypeDef * UARTx,uint8_t Data)428 void UART_SendByte(LPC_UART_TypeDef* UARTx, uint8_t Data)
429 {
430 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
431 {
432 ((LPC_UART1_TypeDef *)UARTx)->THR = Data & UART_THR_MASKBIT;
433 }
434 else
435 {
436 UARTx->THR = Data & UART_THR_MASKBIT;
437 }
438
439 }
440
441
442 /*********************************************************************//**
443 * @brief Receive a single data from UART peripheral
444 * @param[in] UARTx UART peripheral selected, should be:
445 * - LPC_UART0: UART0 peripheral
446 * - LPC_UART1: UART1 peripheral
447 * - LPC_UART2: UART2 peripheral
448 * - LPC_UART3: UART3 peripheral
449 * @return Data received
450 **********************************************************************/
UART_ReceiveByte(LPC_UART_TypeDef * UARTx)451 uint8_t UART_ReceiveByte(LPC_UART_TypeDef* UARTx)
452 {
453 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
454 {
455 return (((LPC_UART1_TypeDef *)UARTx)->RBR & UART_RBR_MASKBIT);
456 }
457 else
458 {
459 return (UARTx->RBR & UART_RBR_MASKBIT);
460 }
461 }
462
463 /*********************************************************************//**
464 * @brief Send a block of data via UART peripheral
465 * @param[in] UARTx Selected UART peripheral used to send data, should be:
466 * - LPC_UART0: UART0 peripheral
467 * - LPC_UART1: UART1 peripheral
468 * - LPC_UART2: UART2 peripheral
469 * - LPC_UART3: UART3 peripheral
470 * @param[in] txbuf Pointer to Transmit buffer
471 * @param[in] buflen Length of Transmit buffer
472 * @param[in] flag Flag used in UART transfer, should be
473 * NONE_BLOCKING or BLOCKING
474 * @return Number of bytes sent.
475 *
476 * Note: when using UART in BLOCKING mode, a time-out condition is used
477 * via defined symbol UART_BLOCKING_TIMEOUT.
478 **********************************************************************/
UART_Send(LPC_UART_TypeDef * UARTx,uint8_t * txbuf,uint32_t buflen,TRANSFER_BLOCK_Type flag)479 uint32_t UART_Send(LPC_UART_TypeDef *UARTx, uint8_t *txbuf,
480 uint32_t buflen, TRANSFER_BLOCK_Type flag)
481 {
482 uint32_t bToSend, bSent, timeOut, fifo_cnt;
483 uint8_t *pChar = txbuf;
484
485 bToSend = buflen;
486
487 // blocking mode
488 if (flag == BLOCKING)
489 {
490 bSent = 0;
491 while (bToSend)
492 {
493 timeOut = UART_BLOCKING_TIMEOUT;
494
495 // Wait for THR empty with timeout
496 while (!(UARTx->LSR & UART_LSR_THRE))
497 {
498 if (timeOut == 0)
499 break;
500
501 timeOut--;
502 }
503
504 // Time out!
505 if(timeOut == 0)
506 break;
507
508 fifo_cnt = UART_TX_FIFO_SIZE;
509
510 while (fifo_cnt && bToSend)
511 {
512 UART_SendByte(UARTx, (*pChar++));
513
514 fifo_cnt--;
515
516 bToSend--;
517
518 bSent++;
519 }
520 }
521 }
522
523 // None blocking mode
524 else
525 {
526 bSent = 0;
527 while (bToSend)
528 {
529 if (bToSend == 0)
530 break;
531
532 if (!(UARTx->LSR & UART_LSR_THRE))
533 {
534 break;
535 }
536
537 fifo_cnt = UART_TX_FIFO_SIZE;
538
539 while (fifo_cnt && bToSend)
540 {
541 UART_SendByte(UARTx, (*pChar++));
542
543 bToSend--;
544
545 fifo_cnt--;
546
547 bSent++;
548 }
549 }
550 }
551
552 return bSent;
553 }
554
555 /*********************************************************************//**
556 * @brief Receive a block of data via UART peripheral
557 * @param[in] UARTx Selected UART peripheral used to send data,
558 * should be:
559 * - LPC_UART0: UART0 peripheral
560 * - LPC_UART1: UART1 peripheral
561 * - LPC_UART2: UART2 peripheral
562 * - LPC_UART3: UART3 peripheral
563 * @param[out] rxbuf Pointer to Received buffer
564 * @param[in] buflen Length of Received buffer
565 * @param[in] flag Flag mode, should be NONE_BLOCKING or BLOCKING
566
567 * @return Number of bytes received
568 *
569 * Note: when using UART in BLOCKING mode, a time-out condition is used
570 * via defined symbol UART_BLOCKING_TIMEOUT.
571 **********************************************************************/
UART_Receive(LPC_UART_TypeDef * UARTx,uint8_t * rxbuf,uint32_t buflen,TRANSFER_BLOCK_Type flag)572 uint32_t UART_Receive(LPC_UART_TypeDef *UARTx, uint8_t *rxbuf,
573 uint32_t buflen, TRANSFER_BLOCK_Type flag)
574 {
575 uint32_t bToRecv, bRecv, timeOut;
576 uint8_t *pChar = rxbuf;
577
578 bToRecv = buflen;
579
580 // Blocking mode
581 if (flag == BLOCKING)
582 {
583 bRecv = 0;
584 while (bToRecv)
585 {
586 timeOut = UART_BLOCKING_TIMEOUT;
587 while (!(UARTx->LSR & UART_LSR_RDR))
588 {
589 if (timeOut == 0)
590 break;
591
592 timeOut--;
593 }
594
595 // Time out!
596 if(timeOut == 0)
597 break;
598
599 // Get data from the buffer
600 (*pChar++) = UART_ReceiveByte(UARTx);
601
602 bToRecv--;
603
604 bRecv++;
605 }
606 }
607 // None blocking mode
608 else
609 {
610 bRecv = 0;
611 while (bToRecv)
612 {
613 if (!(UARTx->LSR & UART_LSR_RDR))
614 {
615 break;
616 }
617 else
618 {
619 (*pChar++) = UART_ReceiveByte(UARTx);
620
621 bRecv++;
622
623 bToRecv--;
624 }
625 }
626 }
627
628 return bRecv;
629 }
630
631 /*********************************************************************//**
632 * @brief Force BREAK character on UART line, output pin UARTx TXD is
633 forced to logic 0.
634 * @param[in] UARTx UART peripheral selected, should be:
635 * - LPC_UART0: UART0 peripheral
636 * - LPC_UART1: UART1 peripheral
637 * - LPC_UART2: UART2 peripheral
638 * - LPC_UART3: UART3 peripheral
639 * @return None
640 **********************************************************************/
UART_ForceBreak(LPC_UART_TypeDef * UARTx)641 void UART_ForceBreak(LPC_UART_TypeDef* UARTx)
642 {
643 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
644 {
645 ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_BREAK_EN;
646 }
647 else
648 {
649 UARTx->LCR |= UART_LCR_BREAK_EN;
650 }
651 }
652
653
654 /********************************************************************//**
655 * @brief Enable or disable specified UART interrupt.
656 * @param[in] UARTx UART peripheral selected, should be
657 * - LPC_UART0: UART0 peripheral
658 * - LPC_UART1: UART1 peripheral
659 * - LPC_UART2: UART2 peripheral
660 * - LPC_UART3: UART3 peripheral
661 * @param[in] UARTIntCfg Specifies the interrupt flag,
662 * should be one of the following:
663 - UART_INTCFG_RBR : RBR Interrupt enable
664 - UART_INTCFG_THRE : THR Interrupt enable
665 - UART_INTCFG_RLS : RX line status interrupt enable
666 - UART1_INTCFG_MS : Modem status interrupt enable (UART1 only)
667 - UART1_INTCFG_CTS : CTS1 signal transition interrupt enable (UART1 only)
668 - UART_INTCFG_ABEO : Enables the end of auto-baud interrupt
669 - UART_INTCFG_ABTO : Enables the auto-baud time-out interrupt
670 * @param[in] NewState New state of specified UART interrupt type,
671 * should be:
672 * - ENALBE: Enable this UART interrupt type.
673 * - DISALBE: Disable this UART interrupt type.
674 * @return None
675 *********************************************************************/
UART_IntConfig(LPC_UART_TypeDef * UARTx,UART_INT_Type UARTIntCfg,FunctionalState NewState)676 void UART_IntConfig(LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
677 {
678 uint32_t tmp;
679
680 switch(UARTIntCfg)
681 {
682 case UART_INTCFG_RBR:
683 tmp = UART_IER_RBRINT_EN;
684 break;
685
686 case UART_INTCFG_THRE:
687 tmp = UART_IER_THREINT_EN;
688 break;
689
690 case UART_INTCFG_RLS:
691 tmp = UART_IER_RLSINT_EN;
692 break;
693
694 case UART1_INTCFG_MS:
695 tmp = UART1_IER_MSINT_EN;
696 break;
697
698 case UART1_INTCFG_CTS:
699 tmp = UART1_IER_CTSINT_EN;
700 break;
701
702 case UART_INTCFG_ABEO:
703 tmp = UART_IER_ABEOINT_EN;
704 break;
705
706 case UART_INTCFG_ABTO:
707 tmp = UART_IER_ABTOINT_EN;
708 break;
709 }
710
711 if (NewState == ENABLE)
712 {
713 if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
714 {
715 ((LPC_UART1_TypeDef *)UARTx)->IER |= tmp;
716 }
717 else
718 {
719 UARTx->IER |= tmp;
720 }
721 }
722 else
723 {
724 if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
725 {
726 ((LPC_UART1_TypeDef *)UARTx)->IER &= (~tmp) & UART1_IER_BITMASK;
727 }
728 else
729 {
730 UARTx->IER &= (~tmp) & UART_IER_BITMASK;
731 }
732 }
733 }
734
735
736 /********************************************************************//**
737 * @brief Get current value of Line Status register in UART peripheral.
738 * @param[in] UARTx UART peripheral selected, should be:
739 * - LPC_UART0: UART0 peripheral
740 * - LPC_UART1: UART1 peripheral
741 * - LPC_UART2: UART2 peripheral
742 * - LPC_UART3: UART3 peripheral
743 * @return Current value of Line Status register in UART peripheral.
744 * Note: The return value of this function must be ANDed with each member in
745 * UART_LS_Type enumeration to determine current flag status
746 * corresponding to each Line status type. Because some flags in
747 * Line Status register will be cleared after reading, the next reading
748 * Line Status register could not be correct. So this function used to
749 * read Line status register in one time only, then the return value
750 * used to check all flags.
751 *********************************************************************/
UART_GetLineStatus(LPC_UART_TypeDef * UARTx)752 uint8_t UART_GetLineStatus(LPC_UART_TypeDef* UARTx)
753 {
754 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
755 {
756 return ((((LPC_UART1_TypeDef *)LPC_UART1)->LSR) & UART_LSR_BITMASK);
757 }
758 else
759 {
760 return ((UARTx->LSR) & UART_LSR_BITMASK);
761 }
762 }
763
764 /********************************************************************//**
765 * @brief Get Interrupt Identification value
766 * @param[in] UARTx UART peripheral selected, should be:
767 * - LPC_UART0: UART0 peripheral
768 * - LPC_UART1: UART1 peripheral
769 * - LPC_UART2: UART2 peripheral
770 * - LPC_UART3: UART3 peripheral
771 * @return Current value of UART UIIR register in UART peripheral.
772 *********************************************************************/
UART_GetIntId(LPC_UART_TypeDef * UARTx)773 uint32_t UART_GetIntId(LPC_UART_TypeDef* UARTx)
774 {
775 return (UARTx->IIR & 0x03CF);
776 }
777
778 /*********************************************************************//**
779 * @brief Check whether if UART is busy or not
780 * @param[in] UARTx UART peripheral selected, should be:
781 * - LPC_UART0: UART0 peripheral
782 * - LPC_UART1: UART1 peripheral
783 * - LPC_UART2: UART2 peripheral
784 * - LPC_UART3: UART3 peripheral
785 * @return RESET if UART is not busy, otherwise return SET.
786 **********************************************************************/
UART_CheckBusy(LPC_UART_TypeDef * UARTx)787 FlagStatus UART_CheckBusy(LPC_UART_TypeDef *UARTx)
788 {
789 if (UARTx->LSR & UART_LSR_TEMT)
790 {
791 return RESET;
792 }
793 else
794 {
795 return SET;
796 }
797 }
798
799
800 /*********************************************************************//**
801 * @brief Configure FIFO function on selected UART peripheral
802 * @param[in] UARTx UART peripheral selected, should be:
803 * - LPC_UART0: UART0 peripheral
804 * - LPC_UART1: UART1 peripheral
805 * - LPC_UART2: UART2 peripheral
806 * - LPC_UART3: UART3 peripheral
807 * @param[in] FIFOCfg Pointer to a UART_FIFO_CFG_Type Structure that
808 * contains specified information about FIFO configuration
809 * @return none
810 **********************************************************************/
UART_FIFOConfig(LPC_UART_TypeDef * UARTx,UART_FIFO_CFG_Type * FIFOCfg)811 void UART_FIFOConfig(LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg)
812 {
813 uint8_t tmp = 0;
814
815 tmp |= UART_FCR_FIFO_EN;
816
817 switch (FIFOCfg->FIFO_Level)
818 {
819 case UART_FIFO_TRGLEV0:
820 tmp |= UART_FCR_TRG_LEV0;
821 break;
822
823 case UART_FIFO_TRGLEV1:
824 tmp |= UART_FCR_TRG_LEV1;
825 break;
826
827 case UART_FIFO_TRGLEV2:
828 tmp |= UART_FCR_TRG_LEV2;
829 break;
830
831 case UART_FIFO_TRGLEV3:
832
833 default:
834 tmp |= UART_FCR_TRG_LEV3;
835 break;
836 }
837
838 if (FIFOCfg->FIFO_ResetTxBuf == ENABLE)
839 {
840 tmp |= UART_FCR_TX_RS;
841 }
842
843 if (FIFOCfg->FIFO_ResetRxBuf == ENABLE)
844 {
845 tmp |= UART_FCR_RX_RS;
846 }
847
848 if (FIFOCfg->FIFO_DMAMode == ENABLE)
849 {
850 tmp |= UART_FCR_DMAMODE_SEL;
851 }
852
853
854 //write to FIFO control register
855 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
856 {
857 ((LPC_UART1_TypeDef *)UARTx)->FCR = tmp & UART_FCR_BITMASK;
858 }
859 else
860 {
861 UARTx->FCR = tmp & UART_FCR_BITMASK;
862 }
863 }
864
865 /*****************************************************************************//**
866 * @brief Fills each UART_FIFOInitStruct member with its default value:
867 * - FIFO_DMAMode = DISABLE
868 * - FIFO_Level = UART_FIFO_TRGLEV0
869 * - FIFO_ResetRxBuf = ENABLE
870 * - FIFO_ResetTxBuf = ENABLE
871 * - FIFO_State = ENABLE
872
873 * @param[in] UART_FIFOInitStruct Pointer to a UART_FIFO_CFG_Type structure
874 * which will be initialized.
875 * @return None
876 *******************************************************************************/
UART_FIFOConfigStructInit(UART_FIFO_CFG_Type * UART_FIFOInitStruct)877 void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct)
878 {
879 UART_FIFOInitStruct->FIFO_DMAMode = DISABLE;
880
881 UART_FIFOInitStruct->FIFO_Level = UART_FIFO_TRGLEV0;
882
883 UART_FIFOInitStruct->FIFO_ResetRxBuf = ENABLE;
884
885 UART_FIFOInitStruct->FIFO_ResetTxBuf = ENABLE;
886 }
887
888
889 /*********************************************************************//**
890 * @brief Start/Stop Auto Baudrate activity
891 * @param[in] UARTx UART peripheral selected, should be
892 * - LPC_UART0: UART0 peripheral
893 * - LPC_UART1: UART1 peripheral
894 * - LPC_UART2: UART2 peripheral
895 * - LPC_UART3: UART3 peripheral
896 * @param[in] ABConfigStruct A pointer to UART_AB_CFG_Type structure that
897 * contains specified information about UART
898 * auto baudrate configuration
899 * @param[in] NewState New State of Auto baudrate activity, should be:
900 * - ENABLE: Start this activity
901 * - DISABLE: Stop this activity
902 * Note: Auto-baudrate mode enable bit will be cleared once this mode
903 * completed.
904 * @return none
905 **********************************************************************/
UART_ABCmd(LPC_UART_TypeDef * UARTx,UART_AB_CFG_Type * ABConfigStruct,FunctionalState NewState)906 void UART_ABCmd(LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct,
907 FunctionalState NewState)
908 {
909 uint32_t tmp;
910
911 tmp = 0;
912 if (NewState == ENABLE)
913 {
914 if (ABConfigStruct->ABMode == UART_AUTOBAUD_MODE1)
915 {
916 tmp |= UART_ACR_MODE;
917 }
918 if (ABConfigStruct->AutoRestart == ENABLE)
919 {
920 tmp |= UART_ACR_AUTO_RESTART;
921 }
922 }
923
924 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
925 {
926 if (NewState == ENABLE)
927 {
928 // Clear DLL and DLM value
929 ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN;
930
931 ((LPC_UART1_TypeDef *)UARTx)->DLL = 0;
932
933 ((LPC_UART1_TypeDef *)UARTx)->DLM = 0;
934
935 ((LPC_UART1_TypeDef *)UARTx)->LCR &= ~UART_LCR_DLAB_EN;
936
937 // FDR value must be reset to default value
938 ((LPC_UART1_TypeDef *)UARTx)->FDR = 0x10;
939
940 ((LPC_UART1_TypeDef *)UARTx)->ACR = UART_ACR_START | tmp;
941 }
942 else
943 {
944 ((LPC_UART1_TypeDef *)UARTx)->ACR = 0;
945 }
946 }
947 else
948 {
949 if (NewState == ENABLE)
950 {
951 // Clear DLL and DLM value
952 UARTx->LCR |= UART_LCR_DLAB_EN;
953
954 UARTx->DLL = 0;
955
956 UARTx->DLM = 0;
957
958 UARTx->LCR &= ~UART_LCR_DLAB_EN;
959
960 // FDR value must be reset to default value
961 UARTx->FDR = 0x10;
962
963 UARTx->ACR = UART_ACR_START | tmp;
964 }
965 else
966 {
967 UARTx->ACR = 0;
968 }
969 }
970 }
971
972 /*********************************************************************//**
973 * @brief Clear Autobaud Interrupt Pending
974 * @param[in] UARTx UART peripheral selected, should be
975 * - LPC_UART0: UART0 peripheral
976 * - LPC_UART1: UART1 peripheral
977 * - LPC_UART2: UART2 peripheral
978 * - LPC_UART3: UART3 peripheral
979 * @param[in] ABIntType type of auto-baud interrupt, should be:
980 * - UART_AUTOBAUD_INTSTAT_ABEO: End of Auto-baud interrupt
981 * - UART_AUTOBAUD_INTSTAT_ABTO: Auto-baud time out interrupt
982 * @return none
983 **********************************************************************/
UART_ABClearIntPending(LPC_UART_TypeDef * UARTx,UART_ABEO_Type ABIntType)984 void UART_ABClearIntPending(LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType)
985 {
986 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
987 {
988 UARTx->ACR |= ABIntType;
989 }
990 else
991 UARTx->ACR |= ABIntType;
992 }
993
994 /*********************************************************************//**
995 * @brief Enable/Disable transmission on UART TxD pin
996 * @param[in] UARTx UART peripheral selected, should be:
997 * - LPC_UART0: UART0 peripheral
998 * - LPC_UART1: UART1 peripheral
999 * - LPC_UART2: UART2 peripheral
1000 * - LPC_UART3: UART3 peripheral
1001 * @param[in] NewState New State of Tx transmission function, should be:
1002 * - ENABLE: Enable this function
1003 - DISABLE: Disable this function
1004 * @return none
1005 **********************************************************************/
UART_TxCmd(LPC_UART_TypeDef * UARTx,FunctionalState NewState)1006 void UART_TxCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState)
1007 {
1008 if (NewState == ENABLE)
1009 {
1010 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
1011 {
1012 ((LPC_UART1_TypeDef *)UARTx)->TER |= UART_TER_TXEN;
1013 }
1014 else
1015 {
1016 UARTx->TER |= UART_TER_TXEN;
1017 }
1018 }
1019 else
1020 {
1021 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
1022 {
1023 ((LPC_UART1_TypeDef *)UARTx)->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
1024 }
1025 else
1026 {
1027 UARTx->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
1028 }
1029 }
1030 }
1031
1032 /* UART IrDA functions ---------------------------------------------------*/
1033 /*********************************************************************//**
1034 * @brief Enable or disable inverting serial input function of IrDA
1035 * on UART peripheral.
1036 * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
1037 * @param[in] NewState New state of inverting serial input, should be:
1038 * - ENABLE: Enable this function.
1039 * - DISABLE: Disable this function.
1040 * @return none
1041 **********************************************************************/
UART_IrDAInvtInputCmd(LPC_UART_TypeDef * UARTx,FunctionalState NewState)1042 void UART_IrDAInvtInputCmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
1043 {
1044 if (NewState == ENABLE)
1045 {
1046 UARTx->ICR |= UART_ICR_IRDAINV;
1047 }
1048 else if (NewState == DISABLE)
1049 {
1050 UARTx->ICR &= (~UART_ICR_IRDAINV) & UART_ICR_BITMASK;
1051 }
1052 }
1053
1054
1055 /*********************************************************************//**
1056 * @brief Enable or disable IrDA function on UART peripheral.
1057 * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
1058 * @param[in] NewState New state of IrDA function, should be:
1059 * - ENABLE: Enable this function.
1060 * - DISABLE: Disable this function.
1061 * @return none
1062 **********************************************************************/
UART_IrDACmd(LPC_UART_TypeDef * UARTx,FunctionalState NewState)1063 void UART_IrDACmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
1064 {
1065 if (NewState == ENABLE)
1066 {
1067 UARTx->ICR |= UART_ICR_IRDAEN;
1068 }
1069 else
1070 {
1071 UARTx->ICR &= (~UART_ICR_IRDAEN) & UART_ICR_BITMASK;
1072 }
1073 }
1074
1075
1076 /*********************************************************************//**
1077 * @brief Configure Pulse divider for IrDA function on UART peripheral.
1078 * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
1079 * @param[in] PulseDiv Pulse Divider value from Peripheral clock,
1080 * should be one of the following:
1081 - UART_IrDA_PULSEDIV2 : Pulse width = 2 * Tpclk
1082 - UART_IrDA_PULSEDIV4 : Pulse width = 4 * Tpclk
1083 - UART_IrDA_PULSEDIV8 : Pulse width = 8 * Tpclk
1084 - UART_IrDA_PULSEDIV16 : Pulse width = 16 * Tpclk
1085 - UART_IrDA_PULSEDIV32 : Pulse width = 32 * Tpclk
1086 - UART_IrDA_PULSEDIV64 : Pulse width = 64 * Tpclk
1087 - UART_IrDA_PULSEDIV128 : Pulse width = 128 * Tpclk
1088 - UART_IrDA_PULSEDIV256 : Pulse width = 256 * Tpclk
1089
1090 * @return none
1091 **********************************************************************/
UART_IrDAPulseDivConfig(LPC_UART_TypeDef * UARTx,UART_IrDA_PULSE_Type PulseDiv)1092 void UART_IrDAPulseDivConfig(LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv)
1093 {
1094 uint32_t tmp, tmp1;
1095
1096 tmp1 = UART_ICR_PULSEDIV(PulseDiv);
1097
1098 tmp = UARTx->ICR & (~ UART_ICR_PULSEDIV(7));
1099
1100 tmp |= tmp1 | UART_ICR_FIXPULSE_EN;
1101
1102 UARTx->ICR = tmp & UART_ICR_BITMASK;
1103 }
1104
1105 /* UART1 FullModem function ---------------------------------------------*/
1106
1107 /*********************************************************************//**
1108 * @brief Force pin DTR/RTS corresponding to given state (Full modem mode)
1109 * @param[in] UARTx LPC_UART1 (only)
1110 * @param[in] Pin Pin that NewState will be applied to, should be:
1111 * - UART1_MODEM_PIN_DTR: DTR pin.
1112 * - UART1_MODEM_PIN_RTS: RTS pin.
1113 * @param[in] NewState New State of DTR/RTS pin, should be:
1114 * - INACTIVE: Force the pin to inactive signal.
1115 - ACTIVE: Force the pin to active signal.
1116 * @return none
1117 **********************************************************************/
UART_FullModemForcePinState(LPC_UART1_TypeDef * UARTx,UART_MODEM_PIN_Type Pin,UART1_SignalState NewState)1118 void UART_FullModemForcePinState(LPC_UART1_TypeDef *UARTx,
1119 UART_MODEM_PIN_Type Pin,
1120 UART1_SignalState NewState)
1121 {
1122 uint8_t tmp = 0;
1123
1124 switch (Pin)
1125 {
1126 case UART1_MODEM_PIN_DTR:
1127 tmp = UART1_MCR_DTR_CTRL;
1128 break;
1129
1130 case UART1_MODEM_PIN_RTS:
1131 tmp = UART1_MCR_RTS_CTRL;
1132 break;
1133
1134 default:
1135 break;
1136 }
1137
1138 if (NewState == ACTIVE)
1139 {
1140 UARTx->MCR |= tmp;
1141 }
1142 else
1143 {
1144 UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
1145 }
1146 }
1147
1148
1149 /*********************************************************************//**
1150 * @brief Configure Full Modem mode for UART peripheral
1151 * @param[in] UARTx LPC_UART1 (only)
1152 * @param[in] Mode Full Modem mode, should be:
1153 * - UART1_MODEM_MODE_LOOPBACK: Loop back mode.
1154 * - UART1_MODEM_MODE_AUTO_RTS: Auto-RTS mode.
1155 * - UART1_MODEM_MODE_AUTO_CTS: Auto-CTS mode.
1156 * @param[in] NewState New State of this mode, should be:
1157 * - ENABLE: Enable this mode.
1158 - DISABLE: Disable this mode.
1159 * @return none
1160 **********************************************************************/
UART_FullModemConfigMode(LPC_UART1_TypeDef * UARTx,UART_MODEM_MODE_Type Mode,FunctionalState NewState)1161 void UART_FullModemConfigMode(LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode,
1162 FunctionalState NewState)
1163 {
1164 uint8_t tmp;
1165
1166 switch(Mode)
1167 {
1168 case UART1_MODEM_MODE_LOOPBACK:
1169 tmp = UART1_MCR_LOOPB_EN;
1170 break;
1171
1172 case UART1_MODEM_MODE_AUTO_RTS:
1173 tmp = UART1_MCR_AUTO_RTS_EN;
1174 break;
1175
1176 case UART1_MODEM_MODE_AUTO_CTS:
1177 tmp = UART1_MCR_AUTO_CTS_EN;
1178 break;
1179
1180 default:
1181 break;
1182 }
1183
1184 if (NewState == ENABLE)
1185 {
1186 UARTx->MCR |= tmp;
1187 }
1188 else
1189 {
1190 UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
1191 }
1192 }
1193
1194
1195 /*********************************************************************//**
1196 * @brief Get current status of modem status register
1197 * @param[in] UARTx LPC_UART1 (only)
1198 * @return Current value of modem status register
1199 * Note: The return value of this function must be ANDed with each member
1200 * UART_MODEM_STAT_type enumeration to determine current flag status
1201 * corresponding to each modem flag status. Because some flags in
1202 * modem status register will be cleared after reading, the next reading
1203 * modem register could not be correct. So this function used to
1204 * read modem status register in one time only, then the return value
1205 * used to check all flags.
1206 **********************************************************************/
UART_FullModemGetStatus(LPC_UART1_TypeDef * UARTx)1207 uint8_t UART_FullModemGetStatus(LPC_UART1_TypeDef *UARTx)
1208 {
1209 return ((UARTx->MSR) & UART1_MSR_BITMASK);
1210 }
1211
1212
1213 /* UART RS485 functions --------------------------------------------------------------*/
1214
1215 /*********************************************************************//**
1216 * @brief Configure UART peripheral in RS485 mode according to the specified
1217 * parameters in the RS485ConfigStruct.
1218 * @param[in] UARTx LPC_UART1 (only)
1219 * @param[in] RS485ConfigStruct Pointer to a UART1_RS485_CTRLCFG_Type structure
1220 * that contains the configuration information for specified UART
1221 * in RS485 mode.
1222 * @return None
1223 **********************************************************************/
UART_RS485Config(LPC_UART_TypeDef * UARTx,UART1_RS485_CTRLCFG_Type * RS485ConfigStruct)1224 void UART_RS485Config(LPC_UART_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct)
1225 {
1226 uint32_t tmp;
1227
1228 tmp = 0;
1229
1230 // If Auto Direction Control is enabled - This function is used in Master mode
1231 if (RS485ConfigStruct->AutoDirCtrl_State == ENABLE)
1232 {
1233 tmp |= UART1_RS485CTRL_DCTRL_EN;
1234
1235 // Set polar
1236 if (RS485ConfigStruct->DirCtrlPol_Level == SET)
1237 {
1238 tmp |= UART1_RS485CTRL_OINV_1;
1239 }
1240
1241 // Set pin according to. This condition is only with UART1. The others are used
1242 // OE pin as default for control the direction of RS485 buffer IC
1243 if ((RS485ConfigStruct->DirCtrlPin == UART1_RS485_DIRCTRL_DTR)
1244 && ((LPC_UART1_TypeDef *)UARTx == LPC_UART1))
1245 {
1246 tmp |= UART1_RS485CTRL_SEL_DTR;
1247 }
1248
1249 // Fill delay time
1250 UARTx->RS485DLY = RS485ConfigStruct->DelayValue & UART1_RS485DLY_BITMASK;
1251 }
1252
1253 // MultiDrop mode is enable
1254 if (RS485ConfigStruct->NormalMultiDropMode_State == ENABLE)
1255 {
1256 tmp |= UART1_RS485CTRL_NMM_EN;
1257 }
1258
1259 // Auto Address Detect function
1260 if (RS485ConfigStruct->AutoAddrDetect_State == ENABLE)
1261 {
1262 tmp |= UART1_RS485CTRL_AADEN;
1263
1264 // Fill Match Address
1265 UARTx->ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART1_RS485ADRMATCH_BITMASK;
1266 }
1267
1268 // Receiver is disable
1269 if (RS485ConfigStruct->Rx_State == DISABLE)
1270 {
1271 tmp |= UART1_RS485CTRL_RX_DIS;
1272 }
1273
1274 // write back to RS485 control register
1275 UARTx->RS485CTRL = tmp & UART1_RS485CTRL_BITMASK;
1276
1277 // Enable Parity function and leave parity in stick '0' parity as default
1278 UARTx->LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN);
1279 }
1280
1281 /*********************************************************************//**
1282 * @brief Enable/Disable receiver in RS485 module in UART1
1283 * @param[in] UARTx LPC_UART1 (only)
1284 * @param[in] NewState New State of command, should be:
1285 * - ENABLE: Enable this function.
1286 * - DISABLE: Disable this function.
1287 * @return None
1288 **********************************************************************/
UART_RS485ReceiverCmd(LPC_UART_TypeDef * UARTx,FunctionalState NewState)1289 void UART_RS485ReceiverCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState)
1290 {
1291 if (NewState == ENABLE)
1292 {
1293 UARTx->RS485CTRL &= ~UART1_RS485CTRL_RX_DIS;
1294 }
1295 else
1296 {
1297 UARTx->RS485CTRL |= UART1_RS485CTRL_RX_DIS;
1298 }
1299 }
1300
1301 /*********************************************************************//**
1302 * @brief Send data on RS485 bus with specified parity stick value (9-bit mode).
1303 * @param[in] UARTx LPC_UART1 (only)
1304 * @param[in] pDatFrm Pointer to data frame.
1305 * @param[in] size Size of data.
1306 * @param[in] ParityStick Parity Stick value, should be 0 or 1.
1307 * @return None
1308 **********************************************************************/
UART_RS485Send(LPC_UART_TypeDef * UARTx,uint8_t * pDatFrm,uint32_t size,uint8_t ParityStick)1309 uint32_t UART_RS485Send(LPC_UART_TypeDef *UARTx, uint8_t *pDatFrm,
1310 uint32_t size, uint8_t ParityStick)
1311 {
1312 uint8_t tmp, save;
1313 uint32_t cnt;
1314
1315 if (ParityStick)
1316 {
1317 save = tmp = UARTx->LCR & UART_LCR_BITMASK;
1318
1319 tmp &= ~(UART_LCR_PARITY_EVEN);
1320
1321 UARTx->LCR = tmp;
1322
1323 cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
1324
1325 while (!(UARTx->LSR & UART_LSR_TEMT));
1326
1327 UARTx->LCR = save;
1328 }
1329 else
1330 {
1331 cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
1332
1333 while (!(UARTx->LSR & UART_LSR_TEMT));
1334 }
1335
1336 return cnt;
1337 }
1338
1339 /*********************************************************************//**
1340 * @brief Send Slave address frames on RS485 bus.
1341 * @param[in] UARTx LPC_UART1 (only)
1342 * @param[in] SlvAddr Slave Address.
1343 * @return None
1344 **********************************************************************/
UART_RS485SendSlvAddr(LPC_UART_TypeDef * UARTx,uint8_t SlvAddr)1345 void UART_RS485SendSlvAddr(LPC_UART_TypeDef *UARTx, uint8_t SlvAddr)
1346 {
1347 UART_RS485Send(UARTx, &SlvAddr, 1, 1);
1348 }
1349
1350 /*********************************************************************//**
1351 * @brief Send Data frames on RS485 bus.
1352 * @param[in] UARTx LPC_UART1 (only)
1353 * @param[in] pData Pointer to data to be sent.
1354 * @param[in] size Size of data frame to be sent.
1355 * @return None
1356 **********************************************************************/
UART_RS485SendData(LPC_UART_TypeDef * UARTx,uint8_t * pData,uint32_t size)1357 uint32_t UART_RS485SendData(LPC_UART_TypeDef *UARTx, uint8_t *pData, uint32_t size)
1358 {
1359 return (UART_RS485Send(UARTx, pData, size, 0));
1360 }
1361
1362 /**
1363 * @}
1364 */
1365
1366 /**
1367 * @}
1368 */
1369 /* --------------------------------- End Of File ------------------------------ */
1370
1371