1 /***************************************************************************** 2 * Copyright (c) 2022, Nations Technologies Inc. 3 * 4 * All rights reserved. 5 * **************************************************************************** 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * - Redistributions of source code must retain the above copyright notice, 11 * this list of conditions and the disclaimer below. 12 * 13 * Nations' name may not be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY NATIONS "AS IS" AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 19 * DISCLAIMED. IN NO EVENT SHALL NATIONS BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 22 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 23 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 24 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 25 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * ****************************************************************************/ 27 28 /** 29 * @file n32g43x_comp.h 30 * @author Nations 31 * @version v1.2.0 32 * 33 * @copyright Copyright (c) 2022, Nations Technologies Inc. All rights reserved. 34 */ 35 #ifndef __N32G43X_COMP_H__ 36 #define __N32G43X_COMP_H__ 37 38 #ifdef __cplusplus 39 extern "C" { 40 #endif 41 42 #include "n32g43x.h" 43 #include <stdbool.h> 44 45 /** @addtogroup N32G43x_StdPeriph_Driver 46 * @{ 47 */ 48 49 /** @addtogroup COMP 50 * @{ 51 */ 52 53 /** @addtogroup COMP_Exported_Constants 54 * @{ 55 */ 56 typedef enum 57 { 58 COMP1 = 0, 59 COMP2 = 1, 60 } COMPX; 61 62 // COMPx_CTRL 63 #define COMP1_CTRL_PWRMODE_MASK (0x01L << 21) 64 #define COMP1_CTRL_INPDAC_MASK (0x01L << 20) 65 #define COMP_CTRL_OUT_MASK (0x01L << 19) 66 #define COMP_CTRL_BLKING_MASK (0x03L << 16) 67 typedef enum 68 { 69 COMP_CTRL_BLKING_NO = (0x0L << 16), 70 COMP_CTRL_BLKING_TIM1_OC5 = (0x1L << 16), 71 COMP_CTRL_BLKING_TIM8_OC5 = (0x2L << 16), 72 } COMP_CTRL_BLKING; 73 #define COMPx_CTRL_HYST_MASK (0x03L << 14) 74 typedef enum 75 { 76 COMP_CTRL_HYST_NO = (0x0L << 14), 77 COMP_CTRL_HYST_LOW = (0x1L << 14), 78 COMP_CTRL_HYST_MID = (0x2L << 14), 79 COMP_CTRL_HYST_HIGH = (0x3L << 14), 80 } COMP_CTRL_HYST; 81 82 #define COMP_POL_MASK (0x01L << 13) 83 #define COMP_CTRL_OUTSEL_MASK (0x0FL << 9) 84 typedef enum 85 { 86 // comp1 out trig 87 COMP1_CTRL_OUTSEL_NC = (0x0L << 9), 88 COMP1_CTRL_OUTSEL_TIM1_BKIN = (0x1L << 9), 89 COMP1_CTRL_OUTSEL_TIM1_OCrefclear = (0x2L << 9), 90 COMP1_CTRL_OUTSEL_TIM1_IC1 = (0x3L << 9), 91 COMP1_CTRL_OUTSEL_TIM2_IC1 = (0x4L << 9), 92 COMP1_CTRL_OUTSEL_TIM2_OCrefclear = (0x5L << 9), 93 COMP1_CTRL_OUTSEL_TIM3_IC1 = (0x6L << 9), 94 COMP1_CTRL_OUTSEL_TIM3_OCrefclear = (0x7L << 9), 95 COMP1_CTRL_OUTSEL_TIM4_OCrefclear = (0x8L << 9), 96 COMP1_CTRL_OUTSEL_TIM5_IC1 = (0x9L << 9), 97 COMP1_CTRL_OUTSEL_TIM8_IC1 = (0xAL << 9), 98 COMP1_CTRL_OUTSEL_TIM8_OCrefclear = (0xBL << 9), 99 COMP1_CTRL_OUTSEL_TIM9_OCrefclear = (0xCL << 9), 100 COMP1_CTRL_OUTSEL_TIM8_BKIN = (0xDL << 9), 101 COMP1_CTRL_OUTSEL_TIM1_BKIN_TIM8_BKIN = (0xEL << 9), 102 COMP1_CTRL_OUTSEL_LPTIM_ETR = (0xFL << 9), 103 // comp2 out trig 104 COMP2_CTRL_OUTSEL_NC = (0x0L << 9), 105 COMP2_CTRL_OUTSEL_TIM1_BKIN = (0x1L << 9), 106 COMP2_CTRL_OUTSEL_TIM1_OCrefclear = (0x2L << 9), 107 COMP2_CTRL_OUTSEL_TIM1_IC1 = (0x3L << 9), 108 COMP2_CTRL_OUTSEL_TIM2_OCrefclear = (0x4L << 9), 109 COMP2_CTRL_OUTSEL_TIM3_OCrefclear = (0x5L << 9), 110 COMP2_CTRL_OUTSEL_TIM4_IC1 = (0x6L << 9), 111 COMP2_CTRL_OUTSEL_TIM4_OCrefclear = (0x7L << 9), 112 COMP2_CTRL_OUTSEL_TIM5_IC1 = (0x8L << 9), 113 COMP2_CTRL_OUTSEL_TIM8_IC1 = (0x9L << 9), 114 COMP2_CTRL_OUTSEL_TIM8_OCrefclear = (0xAL << 9), 115 COMP2_CTRL_OUTSEL_TIM9_IC1 = (0xBL << 9), 116 COMP2_CTRL_OUTSEL_TIM9_OCrefclear = (0xCL << 9), 117 COMP2_CTRL_OUTSEL_TIM8_BKIN = (0xDL << 9), 118 COMP2_CTRL_OUTSEL_TIM1_BKIN_TIM8_BKIN = (0xEL << 9), 119 COMP2_CTRL_OUTSEL_LPTIM_ETR = (0xFL << 9), 120 } COMP_CTRL_OUTTRIG; 121 122 #define COMP_CTRL_INPSEL_MASK (0x0FL<<5) 123 typedef enum { 124 //comp1 inp sel 125 COMP1_CTRL_INPSEL_FLOAT = ((uint32_t)0x00000000), 126 COMP1_CTRL_INPSEL_PA0 = ((uint32_t)0x00000100), 127 COMP1_CTRL_INPSEL_PA2 = ((uint32_t)0x00000140), 128 COMP1_CTRL_INPSEL_PA12 = ((uint32_t)0x00000160), 129 COMP1_CTRL_INPSEL_PB3 = ((uint32_t)0x00000180), 130 COMP1_CTRL_INPSEL_PB4 = ((uint32_t)0x000001A0), 131 COMP1_CTRL_INPSEL_PB10 = ((uint32_t)0x000001C0), 132 COMP1_CTRL_INPSEL_PD5 = ((uint32_t)0x000001E0), 133 COMP1_CTRL_INPSEL_PA1_DAC1 = ((uint32_t)0x00000120), 134 //comp2 inp sel 135 COMP2_CTRL_INPSEL_FLOAT = ((uint32_t)0x00000000), 136 COMP2_CTRL_INPSEL_PA1_DAC1_PA4= ((uint32_t)0x00000100), 137 COMP2_CTRL_INPSEL_PA3 = ((uint32_t)0x00000120), 138 COMP2_CTRL_INPSEL_PA6 = ((uint32_t)0x00000140), 139 COMP2_CTRL_INPSEL_PA7 = ((uint32_t)0x00000160), 140 COMP2_CTRL_INPSEL_PA11 = ((uint32_t)0x00000180), 141 COMP2_CTRL_INPSEL_PA15 = ((uint32_t)0x000001A0), 142 COMP2_CTRL_INPSEL_PB7 = ((uint32_t)0x000001C0), 143 COMP2_CTRL_INPSEL_PD7 = ((uint32_t)0x000001E0), 144 }COMP_CTRL_INPSEL; 145 146 147 #define COMP_CTRL_INMSEL_MASK (0x07L<<1) 148 typedef enum { 149 //comp1 inm sel 150 COMP1_CTRL_INMSEL_DAC1_PA4 = ((uint32_t)0x00000002), 151 COMP1_CTRL_INMSEL_PA0 = ((uint32_t)0x00000004), 152 COMP1_CTRL_INMSEL_PA5 = ((uint32_t)0x00000006), 153 COMP1_CTRL_INMSEL_PB5 = ((uint32_t)0x00000008), 154 COMP1_CTRL_INMSEL_PD4 = ((uint32_t)0x0000000A), 155 COMP1_CTRL_INMSEL_VREF_VC1 = ((uint32_t)0x0000000C), 156 COMP1_CTRL_INMSEL_VREF_VC2 = ((uint32_t)0x0000000E), 157 COMP1_CTRL_INMSEL_NC = ((uint32_t)0x00000000), 158 //comp2 inm sel 159 COMP2_CTRL_INMSEL_PA2 = ((uint32_t)0x00000002), 160 COMP2_CTRL_INMSEL_PA5 = ((uint32_t)0x00000004), 161 COMP2_CTRL_INMSEL_PA6 = ((uint32_t)0x00000006), 162 COMP2_CTRL_INMSEL_PB3 = ((uint32_t)0x00000008), 163 COMP2_CTRL_INMSEL_PD6 = ((uint32_t)0x0000000A), 164 COMP2_CTRL_INMSEL_DAC1_PA4 = ((uint32_t)0x0000000C), 165 COMP2_CTRL_INMSEL_VREF_VC2 = ((uint32_t)0x0000000E), 166 COMP2_CTRL_INMSEL_NC = ((uint32_t)0x00000000), 167 }COMP_CTRL_INMSEL; 168 169 #define COMP_CTRL_EN_MASK (0x01L << 0) 170 171 //COMPx_FILC 172 #define COMP_FILC_SAMPW_MASK (0x1FL<<6)//Low filter sample window size. Number of samples to monitor is SAMPWIN+1. 173 #define COMP_FILC_THRESH_MASK (0x1FL<<1)//For proper operation, the value of THRESH must be greater than SAMPWIN / 2. 174 #define COMP_FILC_FILEN_MASK (0x01L<<0)//Filter enable. 175 176 //COMPx_FILP 177 #define COMP_FILP_CLKPSC_MASK (0xFFFFL)//Prescale number . 178 179 //COMP_WINMODE @addtogroup COMP_WINMODE_CMPMD 180 #define COMP_WINMODE_CMP12MD (0x01L <<0)//1: Comparators 1 and 2 can be used in window mode. 181 182 //COMP_INTEN @addtogroup COMP_INTEN_CMPIEN 183 #define COMP_INTEN_CMPIEN_MSK (0x3L << 0) // This bit control Interrput enable of COMP. 184 #define COMP_INTEN_CMP2IEN (0x01L << 1) 185 #define COMP_INTEN_CMP1IEN (0x01L << 0) 186 187 //COMP_INTSTS @addtogroup COMP_INTSTS_CMPIS 188 #define COMP_INTSTS_INTSTS_MSK (0x3L << 0) // This bit control Interrput enable of COMP. 189 #define COMP_INTSTS_CMP2IS (0x01L << 1) 190 #define COMP_INTSTS_CMP1IS (0x01L << 0) 191 192 //COMP_VREFSCL @addtogroup COMP_VREFSCL 193 #define COMP_VREFSCL_VV2TRM_MSK (0x3FL << 8) // Vref2 Voltage scaler triming value. 194 #define COMP_VREFSCL_VV2EN_MSK (0x01L << 7) 195 #define COMP_VREFSCL_VV1TRM_MSK (0x3FL << 1) // Vref1 Voltage scaler triming value. 196 #define COMP_VREFSCL_VV1EN_MSK (0x01L << 0) 197 198 //COMP_LOCK @addtogroup COMP_LOCK 199 #define COMP_LOCK_CMP2LK (0x1L << 1) // Vref1 Voltage scaler triming value. 200 #define COMP_LOCK_CMP1LK (0x1L << 0) 201 202 //COMP_LPCKSEL @addtogroup COMP_LPCKSEL 203 #define COMP_LKCKSEL_LPCLKSEL (0x1L << 0) 204 205 //COMP_OSEL @addtogroup COMP_OSEL 206 #define COMP_OSEL_CMP2XO (0x1L << 0) 207 208 /** 209 * @} 210 */ 211 212 /** 213 * @brief COMP Init structure definition 214 */ 215 216 typedef struct 217 { 218 // ctrl 219 bool LowPoweMode; // only COMP1 have this bit 220 bool InpDacConnect; // only COMP1 have this bit 221 222 COMP_CTRL_BLKING Blking; /*see @ref COMP_CTRL_BLKING */ 223 224 COMP_CTRL_HYST Hyst; 225 226 bool PolRev; // out polarity reverse 227 228 COMP_CTRL_OUTTRIG OutTrig; 229 COMP_CTRL_INPSEL InpSel; 230 COMP_CTRL_INMSEL InmSel; 231 232 bool En; 233 234 // filter 235 uint8_t SampWindow; // 5bit 236 uint8_t Thresh; // 5bit ,need > SampWindow/2 237 bool FilterEn; 238 239 // filter psc 240 uint16_t ClkPsc; 241 } COMP_InitType; 242 243 /** @addtogroup COMP_Exported_Functions 244 * @{ 245 */ 246 247 void COMP_DeInit(void); 248 void COMP_StructInit(COMP_InitType* COMP_InitStruct); 249 void COMP_Init(COMPX COMPx, COMP_InitType* COMP_InitStruct); 250 void COMP_Enable(COMPX COMPx, FunctionalState en); 251 void COMP_SetInpSel(COMPX COMPx, COMP_CTRL_INPSEL VpSel); 252 void COMP_SetInmSel(COMPX COMPx, COMP_CTRL_INMSEL VmSel); 253 void COMP_SetOutTrig(COMPX COMPx, COMP_CTRL_OUTTRIG OutTrig); 254 uint32_t COMP_GetIntSts(void); // return see @COMP_INTSTS_CMPIS 255 void COMP_SetRefScl(uint8_t Vv2Trim, bool Vv2En, uint8_t Vv1Trim, bool Vv1En); // parma range see @COMP_VREFSCL 256 FlagStatus COMP_GetOutStatus(COMPX COMPx); 257 FlagStatus COMP_GetIntStsOneComp(COMPX COMPx); 258 void COMP_SetLock(uint32_t Lock); // see @COMP_LOCK_CMPLK 259 void COMP_SetIntEn(uint32_t IntEn); // see @COMP_INTEN_CMPIEN 260 void COMP_CMP2XorOut(bool En); 261 void COMP_StopOrLowpower32KClkSel(bool En); 262 void COMP_WindowModeEn(bool En); 263 void COMP_SetFilterPrescaler(COMPX COMPx , uint16_t FilPreVal); 264 void COMP_SetFilterControl(COMPX COMPx , uint8_t FilEn, uint8_t TheresNum , uint8_t SampPW); 265 void COMP_SetHyst(COMPX COMPx , COMP_CTRL_HYST HYST); 266 void COMP_SetBlanking(COMPX COMPx , COMP_CTRL_BLKING BLK); 267 268 /** 269 * @} 270 */ 271 272 #ifdef __cplusplus 273 } 274 #endif 275 276 #endif /*__N32G43X_ADC_H */ 277 /** 278 * @} 279 */ 280 /** 281 * @} 282 */ 283