1 /*****************************************************************************
2 * Copyright (c) 2022, Nations Technologies Inc.
3 *
4 * All rights reserved.
5 * ****************************************************************************
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * - Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the disclaimer below.
12 *
13 * Nations' name may not be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY NATIONS "AS IS" AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
19 * DISCLAIMED. IN NO EVENT SHALL NATIONS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
22 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
23 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
24 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
25 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * ****************************************************************************/
27
28 /**
29 * @file n32l40x_gpio.c
30 * @author Nations
31 * @version v1.2.0
32 *
33 * @copyright Copyright (c) 2022, Nations Technologies Inc. All rights reserved.
34 */
35 #include "n32l40x_gpio.h"
36 #include "n32l40x_rcc.h"
37
38 /** @addtogroup n32l40x_StdPeriph_Driver
39 * @{
40 */
41
42 /** @addtogroup GPIO
43 * @brief GPIO driver modules
44 * @{
45 */
46
47 /** @addtogroup GPIO_Private_TypesDefinitions
48 * @{
49 */
50
51 /**
52 * @}
53 */
54
55 /** @addtogroup GPIO_Private_Defines
56 * @{
57 */
58
59 /* ------------ RCC registers bit address in the alias region ----------------*/
60 #define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
61
62 /* --- Event control register -----*/
63
64 /* Alias word address of EVOE bit */
65 #define EVCR_OFFSET (AFIO_OFFSET + 0x00)
66 #define EVOE_BitNumber ((uint8_t)0x07)
67 #define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
68
69
70 #define GPIO_MODE ((uint32_t)0x00000003)
71 #define EXTI_MODE ((uint32_t)0x10000000)
72 #define GPIO_MODE_IT ((uint32_t)0x00010000)
73 #define GPIO_MODE_EVT ((uint32_t)0x00020000)
74 #define RISING_EDGE ((uint32_t)0x00100000)
75 #define FALLING_EDGE ((uint32_t)0x00200000)
76 #define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010)
77 #define GPIO_PULLUP_PULLDOWN ((uint32_t)0x00000300)
78 #define GPIO_NUMBER ((uint32_t)16)
79
80
81 /**
82 * @}
83 */
84
85 /** @addtogroup GPIO_Private_Macros
86 * @{
87 */
88
89 /**
90 * @}
91 */
92
93 /** @addtogroup GPIO_Private_Variables
94 * @{
95 */
96
97 /**
98 * @}
99 */
100
101 /** @addtogroup GPIO_Private_FunctionPrototypes
102 * @{
103 */
104
105 /**
106 * @}
107 */
108
109 /** @addtogroup GPIO_Private_Functions
110 * @{
111 */
112
113 /**
114 * @brief Deinitializes the GPIOx peripheral registers to their default reset values.
115 * @param GPIOx where x can be (A..D) to select the GPIO peripheral.
116 */
GPIO_DeInit(GPIO_Module * GPIOx)117 void GPIO_DeInit(GPIO_Module* GPIOx)
118 {
119
120 uint32_t position = 0x00U;
121 uint32_t iocurrent = 0x00U;
122 uint32_t tmp = 0x00U;
123 uint32_t GPIO_Pin = GPIO_PIN_ALL;
124 /* Check the parameters */
125 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
126 /* Check the parameters */
127 assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin));
128
129 if (GPIOx == GPIOA)
130 {
131 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOA, ENABLE);
132 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOA, DISABLE);
133 }
134 else if (GPIOx == GPIOB)
135 {
136 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOB, ENABLE);
137 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOB, DISABLE);
138 }
139 else if (GPIOx == GPIOC)
140 {
141 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOC, ENABLE);
142 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOC, DISABLE);
143 }
144 else if (GPIOx == GPIOD)
145 {
146 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOD, ENABLE);
147 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOD, DISABLE);
148 }
149 else
150 {
151 return;
152 }
153
154 /* Configure the port pins */
155 while ((GPIO_Pin >> position) != 0)
156 {
157 /* Get the IO position */
158 iocurrent = (GPIO_Pin) & ((uint32_t)0x01 << position);
159
160 if (iocurrent)
161 {
162 /*------------------------- EXTI Mode Configuration --------------------*/
163 /* Clear the External Interrupt or Event for the current IO */
164 tmp = AFIO->EXTI_CFG[position>>2];
165 tmp &= (0x0FuL << (4u*(position & 0x03u)));
166 if (tmp == (GPIO_GET_INDEX(GPIOx)<<(4u * (position & 0x03u))))
167 {
168 /* Clear EXTI line configuration */
169 EXTI->IMASK &= ~(iocurrent);
170 EXTI->EMASK &= ~(iocurrent);
171
172 /* Clear Rising Falling edge configuration */
173 EXTI->RT_CFG &= ~(iocurrent);
174 EXTI->FT_CFG &= ~(iocurrent);
175 tmp = 0x0FuL << (4u * (position & 0x03u));
176 AFIO->EXTI_CFG[position >> 2u] &= ~tmp;
177 }
178
179
180 /*------------------------- GPIO Mode Configuration --------------------*/
181 /* Configure IO Direction in Input Floting Mode */
182 GPIOx->PMODE &= ~(GPIO_PMODE0_Msk << (position * 2U));
183
184 /* Configure the default Alternate Function in current IO */
185 if (position & 0x08)
186 GPIOx->AFH |= ((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4U));
187 else
188 GPIOx->AFL |= ((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4U));
189
190 /* Configure the default value IO Output Type */
191 GPIOx->POTYPE &= ~(GPIO_POTYPE_POT_0 << position) ;
192
193 /* Deactivate the Pull-up oand Pull-down resistor for the current IO */
194 GPIOx->PUPD &= ~(GPIO_PUPD0_Msk << (position * 2U));
195
196 }
197 position++;
198 }
199 }
200
201
202 /**
203 * @brief Deinitializes the Alternate Functions (remap, event control
204 * and EXTI configuration) registers to their default reset values.
205 */
GPIO_AFIOInitDefault(void)206 void GPIO_AFIOInitDefault(void)
207 {
208 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_AFIO, ENABLE);
209 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_AFIO, DISABLE);
210 }
211
212 /**
213 * @brief Initializes the GPIOx peripheral according to the specified
214 * parameters in the GPIO_InitStruct.
215 * @param GPIOx where x can be (A..D) to select the GPIO peripheral.
216 * @param GPIO_InitStruct pointer to a GPIO_InitType structure that
217 * contains the configuration information for the specified GPIO peripheral.
218 */
219
GPIO_InitPeripheral(GPIO_Module * GPIOx,GPIO_InitType * GPIO_InitStruct)220 void GPIO_InitPeripheral(GPIO_Module* GPIOx, GPIO_InitType * GPIO_InitStruct)
221 {
222 uint32_t pinpos = 0x00U;
223 uint32_t tmp = 0x00U,tmpregister=0x00U;
224 uint32_t position = 0x00U;
225 uint32_t iocurrent = 0x00U;
226
227 /* Check the parameters */
228 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
229 assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
230 assert_param(IS_GPIO_PIN(GPIO_InitStruct->Pin));
231 assert_param(IS_GPIO_PULL(GPIO_InitStruct->GPIO_Pull));
232 assert_param(IS_GPIO_SLEW_RATE(GPIO_InitStruct->GPIO_Slew_Rate));
233
234 /*---------------------------- GPIO Mode Configuration -----------------------*/
235
236 /*---------------------------- GPIO PL_CFG Configuration ------------------------*/
237
238 while (((GPIO_InitStruct->Pin)>>position) != 0)
239 {
240 iocurrent = (GPIO_InitStruct->Pin)&(1U<<position);
241 if (iocurrent)
242 {
243 pinpos = position * 2U;
244
245 if ((GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF_PP) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF_OD) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_Input) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_Analog))
246 {
247 /* Check if the Alternate function is compliant with the GPIO in use */
248 assert_param(IS_GPIO_AF(GPIO_InitStruct->GPIO_Alternate));
249 /* Configure Alternate function mapped with the current IO */
250 if (position & 0x08)
251 {
252 tmp = GPIOx->AFH;
253 tmp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4U));
254 tmp |= ((uint32_t)(GPIO_InitStruct->GPIO_Alternate) << ((uint32_t)(position & (uint32_t)0x07) * 4U)) ;
255 GPIOx->AFH = tmp;
256 }
257 else
258 {
259 tmp = GPIOx->AFL;
260 tmp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4U)) ;
261 tmp |= ((uint32_t)(GPIO_InitStruct->GPIO_Alternate) << ((uint32_t)(position & (uint32_t)0x07) * 4U)) ;
262 GPIOx->AFL = tmp;
263 }
264 }
265 /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
266 tmpregister = GPIOx->PMODE;
267 tmp = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
268 tmpregister &= ~(((uint32_t)0x03) << pinpos);
269 tmpregister |=( tmp << pinpos);
270 GPIOx->PMODE = tmpregister;
271
272 /* Configure pull-down mode */
273 tmpregister = GPIOx->PUPD;
274 tmp = (GPIO_InitStruct->GPIO_Pull & (uint32_t)0x03);
275 tmpregister &=~(((uint32_t)0x03) << pinpos);
276 tmpregister |= (tmp <<pinpos);
277 GPIOx->PUPD = tmpregister;
278
279
280 /* Configure driver current*/
281 if ((GPIO_InitStruct->GPIO_Mode & GPIO_MODE) && (GPIO_InitStruct->GPIO_Mode != GPIO_Mode_Analog))
282 {
283 assert_param(IS_GPIO_CURRENT(GPIO_InitStruct->GPIO_Current));
284 tmpregister = GPIOx->DS;
285 tmp = (GPIO_InitStruct->GPIO_Current &((uint32_t)0x03));
286 tmpregister &= ~(((uint32_t)0x03) << pinpos);
287 tmpregister |= (tmp<<pinpos);
288 GPIOx->DS = tmpregister;
289 }
290 /* Configure slew rate*/
291 tmp = GPIOx->SR;
292 tmp &=((uint32_t)(~((uint16_t)0x01 << position)));
293 tmp |= (GPIO_InitStruct->GPIO_Slew_Rate &((uint32_t)0x01))<<position;
294 GPIOx->SR = tmp;
295 /*Configure Set/Reset register*/
296 if (GPIO_InitStruct->GPIO_Pull == GPIO_Pull_Down)
297 {
298 GPIOx->PBC |= (((uint32_t)0x01) << position);
299 }
300 else
301 {
302 /* Set the corresponding POD bit */
303 if (GPIO_InitStruct->GPIO_Pull == GPIO_Pull_Up)
304 {
305 GPIOx->PBSC |= (((uint32_t)0x01) << position);
306 }
307 }
308
309 /* In case of Output or Alternate function mode selection */
310 if ((GPIO_InitStruct->GPIO_Mode == GPIO_Mode_Out_PP) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF_PP) ||
311 (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_Out_OD) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF_OD))
312 {
313 /* Configure the IO Output Type */
314
315 tmp= GPIOx->POTYPE;
316 tmp &= ~(((uint32_t)0x01U) << position) ;
317 tmp |= (((GPIO_InitStruct->GPIO_Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
318 GPIOx->POTYPE = tmp;
319 }
320 /*--------------------- EXTI Mode Configuration ------------------------*/
321 /* Configure the External Interrupt or event for the current IO */
322 if (GPIO_InitStruct->GPIO_Mode & EXTI_MODE)
323 {
324 /* Clear EXTI line configuration */
325 tmp = EXTI->IMASK;
326 tmp &= ~((uint32_t)0x01<<position);
327 if ((GPIO_InitStruct->GPIO_Mode & GPIO_MODE_IT)== GPIO_MODE_IT)
328 {
329 tmp |= ((uint32_t)0x01 << position);
330 }
331 EXTI->IMASK = tmp;
332
333 tmp = EXTI->EMASK;
334 tmp &= ~((uint32_t)0x01<<position);
335 if ((GPIO_InitStruct->GPIO_Mode & GPIO_MODE_EVT)== GPIO_MODE_EVT)
336 {
337 tmp |= ((uint32_t)0x01 << position);
338 }
339 EXTI->EMASK = tmp;
340
341 /* Clear Rising Falling edge configuration */
342
343 tmp = EXTI->RT_CFG;
344 tmp &= ~((uint32_t)0x01<<position);
345 if ((GPIO_InitStruct->GPIO_Mode & RISING_EDGE)== RISING_EDGE)
346 {
347 tmp |= ((uint32_t)0x01 << position);
348 }
349 EXTI->RT_CFG = tmp;
350
351 tmp = EXTI->FT_CFG;
352 tmp &= ~((uint32_t)0x01<<position);
353 if ((GPIO_InitStruct->GPIO_Mode & FALLING_EDGE)== FALLING_EDGE)
354 {
355 tmp |= ((uint32_t)0x01 << position);
356 }
357 EXTI->FT_CFG = tmp;
358 }
359 }
360 position++;
361 }
362 }
363
364 /**
365 * @brief Fills each GPIO_InitStruct member with its default value.
366 * @param GPIO_InitStruct pointer to a GPIO_InitType structure which will
367 * be initialized.
368 */
GPIO_InitStruct(GPIO_InitType * GPIO_InitStruct)369 void GPIO_InitStruct(GPIO_InitType* GPIO_InitStruct)
370 {
371 /* Reset GPIO init structure parameters values */
372 GPIO_InitStruct->Pin = GPIO_PIN_ALL;
373 GPIO_InitStruct->GPIO_Slew_Rate = GPIO_Slew_Rate_High;
374 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_Input;
375 GPIO_InitStruct->GPIO_Alternate = GPIO_NO_AF;
376 GPIO_InitStruct->GPIO_Pull = GPIO_No_Pull;
377 GPIO_InitStruct->GPIO_Current = GPIO_DC_2mA;
378 }
379
380 /**
381 * @brief Reads the specified input port pin.
382 * @param GPIOx where x can be (A..D) to select the GPIO peripheral.
383 * @param Pin specifies the port bit to read.
384 * This parameter can be GPIO_Pin_x where x can be (0..15).
385 * @return The input port pin value.
386 */
GPIO_ReadInputDataBit(GPIO_Module * GPIOx,uint16_t Pin)387 uint8_t GPIO_ReadInputDataBit(GPIO_Module* GPIOx, uint16_t Pin)
388 {
389 uint8_t bitstatus = 0x00;
390
391 /* Check the parameters */
392 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
393 assert_param(IS_GET_GPIO_PIN(Pin));
394
395 if ((GPIOx->PID & Pin) != (uint32_t)Bit_RESET)
396 {
397 bitstatus = (uint8_t)Bit_SET;
398 }
399 else
400 {
401 bitstatus = (uint8_t)Bit_RESET;
402 }
403 return bitstatus;
404 }
405
406 /**
407 * @brief Reads the specified GPIO input data port.
408 * @param GPIOx where x can be (A..D) to select the GPIO peripheral.
409 * @return GPIO input data port value.
410 */
GPIO_ReadInputData(GPIO_Module * GPIOx)411 uint16_t GPIO_ReadInputData(GPIO_Module* GPIOx)
412 {
413 /* Check the parameters */
414 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
415
416 return ((uint16_t)GPIOx->PID);
417 }
418
419 /**
420 * @brief Reads the specified output data port bit.
421 * @param GPIOx where x can be (A..D) to select the GPIO peripheral.
422 * @param Pin specifies the port bit to read.
423 * This parameter can be GPIO_Pin_x where x can be (0..15).
424 * @return The output port pin value.
425 */
GPIO_ReadOutputDataBit(GPIO_Module * GPIOx,uint16_t Pin)426 uint8_t GPIO_ReadOutputDataBit(GPIO_Module* GPIOx, uint16_t Pin)
427 {
428 uint8_t bitstatus = 0x00;
429 /* Check the parameters */
430 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
431 assert_param(IS_GET_GPIO_PIN(Pin));
432
433 if ((GPIOx->POD & Pin) != (uint32_t)Bit_RESET)
434 {
435 bitstatus = (uint8_t)Bit_SET;
436 }
437 else
438 {
439 bitstatus = (uint8_t)Bit_RESET;
440 }
441 return bitstatus;
442 }
443
444 /**
445 * @brief Reads the specified GPIO output data port.
446 * @param GPIOx where x can be (A..D) to select the GPIO peripheral.
447 * @return GPIO output data port value.
448 */
GPIO_ReadOutputData(GPIO_Module * GPIOx)449 uint16_t GPIO_ReadOutputData(GPIO_Module* GPIOx)
450 {
451 /* Check the parameters */
452 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
453
454 return ((uint16_t)GPIOx->POD);
455 }
456
457 /**
458 * @brief Sets the selected data port bits.
459 * @param GPIOx where x can be (A..D) to select the GPIO peripheral.
460 * @param Pin specifies the port bits to be written.
461 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
462 */
GPIO_SetBits(GPIO_Module * GPIOx,uint16_t Pin)463 void GPIO_SetBits(GPIO_Module* GPIOx, uint16_t Pin)
464 {
465 /* Check the parameters */
466 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
467 assert_param(IS_GPIO_PIN(Pin));
468
469 GPIOx->PBSC = Pin;
470 }
GPIO_SetBitsHigh16(GPIO_Module * GPIOx,uint32_t Pin)471 void GPIO_SetBitsHigh16(GPIO_Module* GPIOx, uint32_t Pin)
472 {
473 /* Check the parameters */
474 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
475 // assert_param(IS_GPIO_PIN(Pin));
476
477 GPIOx->PBSC = Pin;
478 }
479
480 /**
481 * @brief Clears the selected data port bits.
482 * @param GPIOx where x can be (A..D) to select the GPIO peripheral.
483 * @param Pin specifies the port bits to be written.
484 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
485 */
GPIO_ResetBits(GPIO_Module * GPIOx,uint16_t Pin)486 void GPIO_ResetBits(GPIO_Module* GPIOx, uint16_t Pin)
487 {
488 /* Check the parameters */
489 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
490 assert_param(IS_GPIO_PIN(Pin));
491
492 GPIOx->PBC = Pin;
493 }
494
495 /**
496 * @brief Sets or clears the selected data port bit.
497 * @param GPIOx where x can be (A..D) to select the GPIO peripheral.
498 * @param Pin specifies the port bit to be written.
499 * This parameter can be one of GPIO_Pin_x where x can be (0..15).
500 * @param BitCmd specifies the value to be written to the selected bit.
501 * This parameter can be one of the Bit_OperateType enum values:
502 * @arg Bit_RESET to clear the port pin
503 * @arg Bit_SET to set the port pin
504 */
GPIO_WriteBit(GPIO_Module * GPIOx,uint16_t Pin,Bit_OperateType BitCmd)505 void GPIO_WriteBit(GPIO_Module* GPIOx, uint16_t Pin, Bit_OperateType BitCmd)
506 {
507 /* Check the parameters */
508 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
509 assert_param(IS_GET_GPIO_PIN(Pin));
510 assert_param(IS_GPIO_BIT_OPERATE(BitCmd));
511
512 if (BitCmd != Bit_RESET)
513 {
514 GPIOx->PBSC = Pin;
515 }
516 else
517 {
518 GPIOx->PBC = Pin;
519 }
520 }
521
522 /**
523 * @brief Writes data to the specified GPIO data port.
524 * @param GPIOx where x can be (A..D) to select the GPIO peripheral.
525 * @param PortVal specifies the value to be written to the port output data register.
526 */
GPIO_Write(GPIO_Module * GPIOx,uint16_t PortVal)527 void GPIO_Write(GPIO_Module* GPIOx, uint16_t PortVal)
528 {
529 /* Check the parameters */
530 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
531
532 GPIOx->POD = PortVal;
533 }
534
535 /**
536 * @brief Locks GPIO Pins configuration registers.
537 * @param GPIOx where x can be (A..D) to select the GPIO peripheral.
538 * @param Pin specifies the port bit to be written.
539 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
540 */
GPIO_ConfigPinLock(GPIO_Module * GPIOx,uint16_t Pin)541 void GPIO_ConfigPinLock(GPIO_Module* GPIOx, uint16_t Pin)
542 {
543 uint32_t tmp = 0x00010000;
544
545 /* Check the parameters */
546 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
547 assert_param(IS_GPIO_PIN(Pin));
548
549 tmp |= Pin;
550 /* Set LCKK bit */
551 GPIOx->PLOCK = tmp;
552 /* Reset LCKK bit */
553 GPIOx->PLOCK = Pin;
554 /* Set LCKK bit */
555 GPIOx->PLOCK = tmp;
556 /* Read LCKK bit*/
557 tmp = GPIOx->PLOCK;
558 /* Read LCKK bit*/
559 tmp = GPIOx->PLOCK;
560 }
561
562
563
564 /**
565 * @brief Changes the mapping of the specified pin.
566 * @param PortSource selects the GPIO port to be used.
567 * @param PinSource specifies the pin for the remaping.
568 * This parameter can be GPIO_PinSourcex where x can be (0..15).
569 * @param AlternateFunction specifies the alternate function for the remaping.
570 */
GPIO_ConfigPinRemap(uint8_t PortSource,uint8_t PinSource,uint32_t AlternateFunction)571 void GPIO_ConfigPinRemap(uint8_t PortSource, uint8_t PinSource, uint32_t AlternateFunction)
572 {
573 uint32_t tmp = 0x00, tmpregister = 0x00;
574 GPIO_Module *GPIOx;
575 /* Check the parameters */
576 assert_param(IS_GPIO_REMAP_PORT_SOURCE(PortSource));
577 assert_param(IS_GPIO_PIN_SOURCE(PinSource));
578 assert_param(IS_GPIO_AF(AlternateFunction));
579 /*Get Peripheral point*/
580 GPIOx = GPIO_GET_PERIPH(PortSource);
581 /**/
582 if (PinSource & (uint8_t)0x08)
583 {
584 tmp = (uint32_t)(PinSource & (uint8_t)0x07);
585 /*Read GPIO_AFH register*/
586 tmpregister = GPIOx->AFH;
587 /*Reset corresponding bits*/
588 tmpregister &=~((uint32_t)0x0F <<(tmp*4U));
589 /*Set corresponding bits*/
590 tmpregister |= AlternateFunction << (tmp*4U);
591 /*Write to the GPIO_AFH register*/
592 GPIOx->AFH = tmpregister;
593 }
594 else
595 {
596 tmp = (uint32_t)(PinSource & (uint8_t)0x07);
597 /*Read GPIO_AFL register*/
598 tmpregister = GPIOx->AFL;
599 /*Reset corresponding bits*/
600 tmpregister &=~((uint32_t)0x0F <<(tmp*4U));
601 /*Set corresponding bits*/
602 tmpregister |= AlternateFunction << (tmp*4U);
603 /*Write to the GPIO_AFL register*/
604 GPIOx->AFL = tmpregister;
605 }
606 }
607
608 /**
609 * @brief Selects the GPIO pin used as Event output.
610 * @param PortSource selects the GPIO port to be used as source
611 * for Event output.
612 * This parameter can be GPIO_PortSourceGPIOx where x can be (A..D).
613 * @param PinSource specifies the pin for the Event output.
614 * This parameter can be GPIO_PinSourcex where x can be (0..15).
615 */
GPIO_ConfigEventOutput(uint8_t PortSource,uint8_t PinSource)616 void GPIO_ConfigEventOutput(uint8_t PortSource, uint8_t PinSource)
617 {
618 uint32_t tmpregister = 0x00,tmp = 0x00;
619 GPIO_Module *GPIOx;
620 /* Check the parameters */
621 assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(PortSource));
622 assert_param(IS_GPIO_PIN_SOURCE(PinSource));
623
624 /*Get Peripheral structure point*/
625 GPIOx = GPIO_GET_PERIPH(PortSource);
626 if (PinSource & (uint8_t)0x08)
627 {
628 tmp = (uint32_t)(PinSource & (uint8_t)0x07);
629 /*Read GPIO_AFH register*/
630 tmpregister = GPIOx->AFH;
631 /*Reset corresponding bits*/
632 tmpregister &=~((uint32_t)0x0F <<(tmp*4U));
633 /*Set corresponding bits*/
634 tmpregister |= GPIO_AF3_EVENTOUT;
635 /*Write to the GPIO_AFH register*/
636 GPIOx->AFH = tmpregister;
637 }
638 else
639 {
640 tmp = (uint32_t)(PinSource & (uint8_t)0x07);
641 /*Read GPIO_AFL register*/
642 tmpregister = GPIOx->AFL;
643 /*Reset corresponding bits*/
644 tmpregister &=~((uint32_t)0x0F <<(tmp*4U));
645 /*Set corresponding bits*/
646 tmpregister |= GPIO_AF3_EVENTOUT;
647 /*Write to the GPIO_AFL register*/
648 GPIOx->AFL = tmpregister;
649 }
650 }
651
652 /**
653 * @brief Enables or disables the Event Output.
654 * @param Cmd new state of the Event output.
655 * This parameter can be: ENABLE or DISABLE.
656 */
GPIO_CtrlEventOutput(FunctionalState Cmd)657 void GPIO_CtrlEventOutput(FunctionalState Cmd)
658 {
659 /* Check the parameters */
660 assert_param(IS_FUNCTIONAL_STATE(Cmd));
661
662 *(__IO uint32_t*)EVCR_EVOE_BB = (uint32_t)Cmd;
663 }
664
665
666 /**
667 * @brief Selects the GPIO pin used as EXTI Line.
668 * @param PortSource selects the GPIO port to be used as source for EXTI lines.
669 * This parameter can be GPIO_PortSourceGPIOx where x can be (A..D).
670 * @param PinSource specifies the EXTI line to be configured.
671 * This parameter can be GPIO_PinSourcex where x can be (0..15).
672 */
GPIO_ConfigEXTILine(uint8_t PortSource,uint8_t PinSource)673 void GPIO_ConfigEXTILine(uint8_t PortSource, uint8_t PinSource)
674 {
675 uint32_t port = (uint32_t)PortSource;
676 /* Check the parameters */
677 assert_param(IS_GPIO_EXTI_PORT_SOURCE(PortSource));
678 assert_param(IS_GPIO_PIN_SOURCE(PinSource));
679
680 AFIO->EXTI_CFG[(PinSource >> 0x02)] &= ~(((uint32_t)0x03) << ((PinSource & (uint8_t)0x03)*4u));
681 AFIO->EXTI_CFG[(PinSource >> 0x02)] |= (port << ((PinSource & (uint8_t)0x03) *4u));
682 }
683
684 /**
685 * @brief Selects the alternate function SPIx NSS mode.
686 * @param AFIO_SPIx_NSS choose which SPI configuration.
687 * This parameter can be AFIO_SPI1_NSS and AFIO_SPI2_NSS.
688 * @param SpiNssType specifies the SPI_NSS mode to be configured.
689 * This parameter can be AFIO_SPI1_NSS_High_IMPEDANCE and AFIO_SPI1_NSS_High_LEVEL.
690 */
AFIO_ConfigSPINSSMode(uint32_t AFIO_SPIx_NSS,AFIO_SPI_NSSType SpiNssType)691 void AFIO_ConfigSPINSSMode(uint32_t AFIO_SPIx_NSS,AFIO_SPI_NSSType SpiNssType)
692 {
693 uint32_t tmp = 0x00;
694 /* Check the parameters */
695 assert_param(IS_AFIO_SPIX(AFIO_SPIx_NSS));
696 assert_param(IS_AFIO_SPI_NSS(SpiNssType));
697 tmp = AFIO->RMP_CFG;
698 tmp &=(~(0x01U << AFIO_SPIx_NSS));
699 tmp |=(SpiNssType << AFIO_SPIx_NSS);
700 AFIO->RMP_CFG = tmp;
701 }
702
703 /**
704 * @brief Configur ADC external trigger.
705 * @param ADCETRType choose whether to configure rule conversion or injection conversion .
706 * This parameter can be AFIO_ADC_ETRI and AFIO_ADC_ETRR.
707 * @param ADCTrigRemap specifies the external trigger line be configured.
708 * This parameter can be AFIO_ADC_TRIG_EXTI_x where x can be (0..15) or AFIO_ADC_TRIG_TIM8_CHy where y can be(3..4).
709 */
AFIO_ConfigADCExternalTrigRemap(AFIO_ADC_ETRType ADCETRType,AFIO_ADC_Trig_RemapType ADCTrigRemap)710 void AFIO_ConfigADCExternalTrigRemap(AFIO_ADC_ETRType ADCETRType,AFIO_ADC_Trig_RemapType ADCTrigRemap)
711 {
712 uint32_t tmp = 0x00;
713 /* Check the parameters */
714 assert_param(IS_AFIO_ADC_ETR(ADCETRType));
715 if (ADCETRType == AFIO_ADC_ETRI)
716 {
717 /* Check the parameters */
718 assert_param(IS_AFIO_ADC_ETRI(ADCTrigRemap));
719 tmp = AFIO->RMP_CFG;
720 /* clear AFIO_RMP_CFG register ETRI bit*/
721 tmp &= (~(0x01U << AFIO_ADC_ETRI));
722 /* if ADCETRType is AFIO_ADC_ETRI then ADCTrigRemap cannot be AFIO_ADC_TRIG_TIM8_CH3*/
723 if (ADCTrigRemap == AFIO_ADC_TRIG_TIM8_CH4)
724 {
725 /* select TIM8_CH4 line to connect*/
726 tmp |= (0x01U << AFIO_ADC_ETRI);
727 }
728 else
729 {
730 /* select which external line is connected*/
731 tmp &=(~(0x0FU<<4U));
732 tmp |= (ADCTrigRemap<<4U);
733 }
734 AFIO->RMP_CFG = tmp;
735 }
736 else
737 {
738 if (ADCETRType == AFIO_ADC_ETRR)
739 {
740 /* Check the parameters */
741 assert_param(IS_AFIO_ADC_ETRR(ADCTrigRemap));
742 tmp = AFIO->RMP_CFG;
743 /* clear AFIO_RMP_CFG register ETRR bit*/
744 tmp &= (~(0x01U << AFIO_ADC_ETRR));
745 /* if ADCETRType is AFIO_ADC_ETRR then ADCTrigRemap cannot be AFIO_ADC_TRIG_TIM8_CH4*/
746 if (ADCTrigRemap == AFIO_ADC_TRIG_TIM8_CH3)
747 {
748 /* select TIM8_CH3 line to connect*/
749 tmp |= (0x01U << AFIO_ADC_ETRR);
750 }
751 else
752 {
753 /* select which external line is connected*/
754 tmp &=(~(0x0FU<<0));
755 tmp |= ADCTrigRemap;
756 }
757 AFIO->RMP_CFG = tmp;
758 }
759 }
760 }
761
762 /**
763 * @}
764 */
765
766 /**
767 * @}
768 */
769