1 /***************************************************************************** 2 * Copyright (c) 2022, Nations Technologies Inc. 3 * 4 * All rights reserved. 5 * **************************************************************************** 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * - Redistributions of source code must retain the above copyright notice, 11 * this list of conditions and the disclaimer below. 12 * 13 * Nations' name may not be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY NATIONS "AS IS" AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 19 * DISCLAIMED. IN NO EVENT SHALL NATIONS BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 22 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 23 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 24 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 25 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * ****************************************************************************/ 27 28 /** 29 * @file n32l40x_lcd.hd 30 * @author Nations 31 * @version v1.2.0 32 * 33 * @copyright Copyright (c) 2022, Nations Technologies Inc. All rights reserved. 34 */ 35 36 #ifndef __N32L40X_LCD_H__ 37 #define __N32L40X_LCD_H__ 38 39 #ifdef __cplusplus 40 extern "C" { 41 #endif 42 43 #include "n32l40x.h" 44 /** @addtogroup N32L40x_StdPeriph_Driver 45 * @{ 46 */ 47 48 /** @addtogroup LCD 49 * @{ 50 */ 51 52 /* LCD Exported constants --------------------------------------------------------*/ 53 /** @addtogroup LCD_Exported_Constants LCD Exported Constants 54 * @{ 55 */ 56 57 /** 58 * @brief LCD error code 59 */ 60 typedef enum { 61 LCD_ERROR_OK = 0x00, /*!< No error */ 62 LCD_ERROR_FCRSF = 0x01, /*!< Synchro flag error */ 63 LCD_ERROR_UDR = 0x02, /*!< Update display request flag error */ 64 LCD_ERROR_UDD = 0x03, /*!< Update display done flag error */ 65 LCD_ERROR_ENSTS = 0x04, /*!< LCD enabled status flag error */ 66 LCD_ERROR_RDY = 0x05, /*!< LCD VLCD ready flag error */ 67 LCD_ERROR_PARAM = 0x06, /*!< LCD function parameter error */ 68 LCD_ERROR_CLK = 0x07, /*!< LCD clock source fail error */ 69 }LCD_ErrorTypeDef; 70 71 /** 72 * @brief LCD normal timeout 73 */ 74 #define LCD_TIME_OUT (0x01000000) 75 76 /** 77 * @defgroup LCD_Clock_Source 78 */ 79 #define LCD_CLK_SRC_LSI (RCC_RTCCLK_SRC_LSI) /*!< LSI*/ 80 #define LCD_CLK_SRC_LSE (RCC_LSE_ENABLE|RCC_RTCCLK_SRC_LSE) /*!< LSE */ 81 #define LCD_CLK_SRC_LSE_BYPASS (RCC_LSE_BYPASS|RCC_RTCCLK_SRC_LSE) /*!< LSE bypass */ 82 #define LCD_CLK_SRC_HSE_DIV32 (RCC_HSE_ENABLE|RCC_RTCCLK_SRC_HSE_DIV32) /*!< HSE */ 83 #define LCD_CLK_SRC_HSE_BYPASS_DIV32 (RCC_HSE_BYPASS|RCC_RTCCLK_SRC_HSE_DIV32) /*!< HSE bypass */ 84 85 /** 86 * @} 87 */ 88 89 /** 90 * @defgroup LCD_RAMRegister 91 */ 92 #define LCD_RAM1_COM0 (0x00000000U) 93 #define LCD_RAM2_COM0 (0x00000001U) 94 #define LCD_RAM1_COM1 (0x00000002U) 95 #define LCD_RAM2_COM1 (0x00000003U) 96 #define LCD_RAM1_COM2 (0x00000004U) 97 #define LCD_RAM2_COM2 (0x00000005U) 98 #define LCD_RAM1_COM3 (0x00000006U) 99 #define LCD_RAM2_COM3 (0x00000007U) 100 #define LCD_RAM1_COM4 (0x00000008U) 101 #define LCD_RAM2_COM4 (0x00000009U) 102 #define LCD_RAM1_COM5 (0x0000000AU) 103 #define LCD_RAM2_COM5 (0x0000000BU) 104 #define LCD_RAM1_COM6 (0x0000000CU) 105 #define LCD_RAM2_COM6 (0x0000000DU) 106 #define LCD_RAM1_COM7 (0x0000000EU) 107 #define LCD_RAM2_COM7 (0x0000000FU) 108 /** 109 * @} 110 */ 111 112 /** 113 * @defgroup LCD_Prescaler 114 */ 115 #define LCD_PRESCALER_1 (0x00000000U) /*!< CLKPS = LCDCLK */ 116 #define LCD_PRESCALER_2 (0x1UL << LCD_FCTRL_PRES_Pos) /*!< 0x00400000U CLKPS = LCDCLK/2 */ 117 #define LCD_PRESCALER_4 (0x2UL << LCD_FCTRL_PRES_Pos) /*!< 0x00800000U CLKPS = LCDCLK/4 */ 118 #define LCD_PRESCALER_8 (0x3UL << LCD_FCTRL_PRES_Pos) /*!< 0x00C00000U CLKPS = LCDCLK/8 */ 119 #define LCD_PRESCALER_16 (0x4UL << LCD_FCTRL_PRES_Pos) /*!< 0x01000000U CLKPS = LCDCLK/16 */ 120 #define LCD_PRESCALER_32 (0x5UL << LCD_FCTRL_PRES_Pos) /*!< 0x01400000U CLKPS = LCDCLK/32 */ 121 #define LCD_PRESCALER_64 (0x6UL << LCD_FCTRL_PRES_Pos) /*!< 0x01800000U CLKPS = LCDCLK/64 */ 122 #define LCD_PRESCALER_128 (0x7UL << LCD_FCTRL_PRES_Pos) /*!< 0x01C00000U CLKPS = LCDCLK/128 */ 123 #define LCD_PRESCALER_256 (0x8UL << LCD_FCTRL_PRES_Pos) /*!< 0x02000000U CLKPS = LCDCLK/256 */ 124 #define LCD_PRESCALER_512 (0x9UL << LCD_FCTRL_PRES_Pos) /*!< 0x02400000U CLKPS = LCDCLK/512 */ 125 #define LCD_PRESCALER_1024 (0xAUL << LCD_FCTRL_PRES_Pos) /*!< 0x02800000U CLKPS = LCDCLK/1024 */ 126 #define LCD_PRESCALER_2048 (0xBUL << LCD_FCTRL_PRES_Pos) /*!< 0x02C00000U CLKPS = LCDCLK/2048 */ 127 #define LCD_PRESCALER_4096 (0xCUL << LCD_FCTRL_PRES_Pos) /*!< 0x03000000U CLKPS = LCDCLK/4096 */ 128 #define LCD_PRESCALER_8192 (0xDUL << LCD_FCTRL_PRES_Pos) /*!< 0x03400000U CLKPS = LCDCLK/8192 */ 129 #define LCD_PRESCALER_16384 (0xEUL << LCD_FCTRL_PRES_Pos) /*!< 0x03800000U CLKPS = LCDCLK/16384 */ 130 #define LCD_PRESCALER_32768 (0xFUL << LCD_FCTRL_PRES_Pos) /*!< 0x03C00000U CLKPS = LCDCLK/32768 */ 131 /** 132 * @} 133 */ 134 135 /** 136 * @defgroup LCD_Divider 137 */ 138 #define LCD_DIV_16 (0x00000000U) /*!< CLKDIV = CLKPS/(16) */ 139 #define LCD_DIV_17 (0x1UL << LCD_FCTRL_DIV_Pos) /*!< 0x00040000U CLKDIV = CLKPS/(17) */ 140 #define LCD_DIV_18 (0x2UL << LCD_FCTRL_DIV_Pos) /*!< 0x00080000U CLKDIV = CLKPS/(18) */ 141 #define LCD_DIV_19 (0x3UL << LCD_FCTRL_DIV_Pos) /*!< 0x000C0000U CLKDIV = CLKPS/(19) */ 142 #define LCD_DIV_20 (0x4UL << LCD_FCTRL_DIV_Pos) /*!< 0x00100000U CLKDIV = CLKPS/(20) */ 143 #define LCD_DIV_21 (0x5UL << LCD_FCTRL_DIV_Pos) /*!< 0x00140000U CLKDIV = CLKPS/(21) */ 144 #define LCD_DIV_22 (0x6UL << LCD_FCTRL_DIV_Pos) /*!< 0x00180000U CLKDIV = CLKPS/(22) */ 145 #define LCD_DIV_23 (0x7UL << LCD_FCTRL_DIV_Pos) /*!< 0x001C0000U CLKDIV = CLKPS/(23) */ 146 #define LCD_DIV_24 (0x8UL << LCD_FCTRL_DIV_Pos) /*!< 0x00200000U CLKDIV = CLKPS/(24) */ 147 #define LCD_DIV_25 (0x9UL << LCD_FCTRL_DIV_Pos) /*!< 0x00240000U CLKDIV = CLKPS/(25) */ 148 #define LCD_DIV_26 (0xAUL << LCD_FCTRL_DIV_Pos) /*!< 0x00280000U CLKDIV = CLKPS/(26) */ 149 #define LCD_DIV_27 (0xBUL << LCD_FCTRL_DIV_Pos) /*!< 0x002C0000U CLKDIV = CLKPS/(27) */ 150 #define LCD_DIV_28 (0xCUL << LCD_FCTRL_DIV_Pos) /*!< 0x00300000U CLKDIV = CLKPS/(28) */ 151 #define LCD_DIV_29 (0xDUL << LCD_FCTRL_DIV_Pos) /*!< 0x00340000U CLKDIV = CLKPS/(29) */ 152 #define LCD_DIV_30 (0xEUL << LCD_FCTRL_DIV_Pos) /*!< 0x00380000U CLKDIV = CLKPS/(30) */ 153 #define LCD_DIV_31 (0xFUL << LCD_FCTRL_DIV_Pos) /*!< 0x003C0000U CLKDIV = CLKPS/(31) */ 154 /** 155 * @} 156 */ 157 158 /** 159 * @defgroup LCD_Duty 160 */ 161 #define LCD_DUTY_STATIC (0x00000000U) /*!< Static duty */ 162 #define LCD_DUTY_1_2 (0x1UL << LCD_CTRL_DUTY_Pos) /*!< 0x00000004U 1/2 duty */ 163 #define LCD_DUTY_1_3 (0x2UL << LCD_CTRL_DUTY_Pos) /*!< 0x00000004U 1/3 duty */ 164 #define LCD_DUTY_1_4 (0x3UL << LCD_CTRL_DUTY_Pos) /*!< 0x00000004U 1/4 duty */ 165 #define LCD_DUTY_1_8 (0x4UL << LCD_CTRL_DUTY_Pos) /*!< 0x00000004U 1/8 duty */ 166 /** 167 * @} 168 */ 169 170 /** 171 * @defgroup LCD_Bias 172 */ 173 #define LCD_BIAS_1_2 (0x00000000U) /*!< 1/2 Bias */ 174 #define LCD_BIAS_1_3 (0x1UL << LCD_CTRL_BIAS_Pos) /*!< 0x00000020U 1/3 Bias */ 175 #define LCD_BIAS_1_4 (0x2UL << LCD_CTRL_BIAS_Pos) /*!< 0x00000040U 1/4 Bias */ 176 /** 177 * @} 178 */ 179 180 /** 181 * @defgroup LCD_Voltage_source 182 */ 183 #define LCD_VOLTAGESOURCE_INTERNAL (0x00000000U) /*!< Internal voltage source for the LCD */ 184 #define LCD_VOLTAGESOURCE_EXTERNAL (LCD_CTRL_VSEL) /*!< External voltage source for the LCD */ 185 /** 186 * @} 187 */ 188 189 /** 190 * @defgroup LCD_Contrast 191 */ 192 #define LCD_CONTRASTLEVEL_0 (0x00000000U) /*!< Maximum Voltage = 2.60V */ 193 #define LCD_CONTRASTLEVEL_1 (0x1UL << LCD_FCTRL_CONTRAST_Pos) /*!< 0x00000400U Maximum Voltage = 2.73V */ 194 #define LCD_CONTRASTLEVEL_2 (0x2UL << LCD_FCTRL_CONTRAST_Pos) /*!< 0x00000800U Maximum Voltage = 2.86V */ 195 #define LCD_CONTRASTLEVEL_3 (0x3UL << LCD_FCTRL_CONTRAST_Pos) /*!< 0x00000C00U Maximum Voltage = 2.99V */ 196 #define LCD_CONTRASTLEVEL_4 (0x4UL << LCD_FCTRL_CONTRAST_Pos) /*!< 0x00001000U Maximum Voltage = 3.12V */ 197 #define LCD_CONTRASTLEVEL_5 (0x5UL << LCD_FCTRL_CONTRAST_Pos) /*!< 0x00001400U Maximum Voltage = 3.26V */ 198 #define LCD_CONTRASTLEVEL_6 (0x6UL << LCD_FCTRL_CONTRAST_Pos) /*!< 0x00001800U Maximum Voltage = 3.40V */ 199 #define LCD_CONTRASTLEVEL_7 (0x7UL << LCD_FCTRL_CONTRAST_Pos) /*!< 0x00001C00U Maximum Voltage = 3.55V */ 200 /** 201 * @} 202 */ 203 204 /** 205 * @defgroup LCD_DeadTime 206 */ 207 #define LCD_DEADTIME_0 (0x00000000U) /*!< No dead Time */ 208 #define LCD_DEADTIME_1 (0x1UL << LCD_FCTRL_DEAD_Pos) /*!< 0x00000080U One Phase between different couple of Frame */ 209 #define LCD_DEADTIME_2 (0x2UL << LCD_FCTRL_DEAD_Pos) /*!< 0x00000100U Two Phase between different couple of Frame */ 210 #define LCD_DEADTIME_3 (0x3UL << LCD_FCTRL_DEAD_Pos) /*!< 0x00000180UThree Phase between different couple of Frame */ 211 #define LCD_DEADTIME_4 (0x4UL << LCD_FCTRL_DEAD_Pos) /*!< 0x00000200UFour Phase between different couple of Frame */ 212 #define LCD_DEADTIME_5 (0x5UL << LCD_FCTRL_DEAD_Pos) /*!< 0x00000280UFive Phase between different couple of Frame */ 213 #define LCD_DEADTIME_6 (0x6UL << LCD_FCTRL_DEAD_Pos) /*!< 0x00000300USix Phase between different couple of Frame */ 214 #define LCD_DEADTIME_7 (0x7UL << LCD_FCTRL_DEAD_Pos) /*!< 0x00000380USeven Phase between different couple of Frame */ 215 /** 216 * @} 217 */ 218 219 /** 220 * @defgroup LCD_PulseOnDuration 221 */ 222 #define LCD_PULSEONDURATION_0 (0x00000000U) /*!< Pulse ON duration = 0 pulse */ 223 #define LCD_PULSEONDURATION_1 (0x1U << LCD_FCTRL_PULSEON_Pos) /*!< 0x00000010U Pulse ON duration = 1/CK_PS */ 224 #define LCD_PULSEONDURATION_2 (0x2U << LCD_FCTRL_PULSEON_Pos) /*!< 0x00000020U Pulse ON duration = 2/CK_PS */ 225 #define LCD_PULSEONDURATION_3 (0x3U << LCD_FCTRL_PULSEON_Pos) /*!< 0x00000030U Pulse ON duration = 3/CK_PS */ 226 #define LCD_PULSEONDURATION_4 (0x4U << LCD_FCTRL_PULSEON_Pos) /*!< 0x00000040U Pulse ON duration = 4/CK_PS */ 227 #define LCD_PULSEONDURATION_5 (0x5U << LCD_FCTRL_PULSEON_Pos) /*!< 0x00000050U Pulse ON duration = 5/CK_PS */ 228 #define LCD_PULSEONDURATION_6 (0x6U << LCD_FCTRL_PULSEON_Pos) /*!< 0x00000060U Pulse ON duration = 6/CK_PS */ 229 #define LCD_PULSEONDURATION_7 (0x7U << LCD_FCTRL_PULSEON_Pos) /*!< 0x00000070U Pulse ON duration = 7/CK_PS */ 230 /** 231 * @} 232 */ 233 234 /** 235 * @defgroup LCD_HighDrive 236 */ 237 #define LCD_HIGHDRIVE_DISABLE (0x00000000U) /*!< High drive disabled */ 238 #define LCD_HIGHDRIVE_ENABLE (LCD_FCTRL_HDEN) /*!< High drive enabled */ 239 /** 240 * @} 241 */ 242 243 /** 244 * @defgroup LCD_HighDrive_Buffer 245 */ 246 #define LCD_HIGHDRIVEBUFFER_DISABLE (0x00000000U) /*!< High drive buffer disabled */ 247 #define LCD_HIGHDRIVEBUFFER_ENABLE (LCD_CTRL_BUFEN) /*!< High drive buffer enabled */ 248 /** 249 * @} 250 */ 251 252 /** 253 * @defgroup LCD_Blink_Mode 254 */ 255 #define LCD_BLINKMODE_OFF (0x00000000U) /*!< Blink disable */ 256 #define LCD_BLINKMODE_SEG0_COM0 (0x1UL << LCD_FCTRL_BLINK_Pos) /*!< 0x00010000U Blink enabled on SEG[0], COM[0] (1 pixel) */ 257 #define LCD_BLINKMODE_SEG0_ALLCOM (0x2UL << LCD_FCTRL_BLINK_Pos) /*!< 0x00020000U Blink enabled on SEG[0], all COM (up to 8 pixels according to the programmed duty) */ 258 #define LCD_BLINKMODE_ALLSEG_ALLCOM (0x3UL << LCD_FCTRL_BLINK_Pos) /*!< 0x00030000U Blink enabled on all SEG and all COM (all pixels) */ 259 /** 260 * @} 261 */ 262 263 /** 264 * @defgroup LCD_Blink_Frequency 265 */ 266 #define LCD_BLINKFREQ_DIV_8 (0x00000000U) /*!< The Blink frequency = fck_div/8 */ 267 #define LCD_BLINKFREQ_DIV_16 (0x1UL << LCD_FCTRL_BLINKF_Pos) /*!< 0x00002000U The Blink frequency = fck_div/16 */ 268 #define LCD_BLINKFREQ_DIV_32 (0x2UL << LCD_FCTRL_BLINKF_Pos) /*!< 0x00004000U The Blink frequency = fck_div/32 */ 269 #define LCD_BLINKFREQ_DIV_64 (0x3UL << LCD_FCTRL_BLINKF_Pos) /*!< 0x00006000U The Blink frequency = fck_div/64 */ 270 #define LCD_BLINKFREQ_DIV_128 (0x4UL << LCD_FCTRL_BLINKF_Pos) /*!< 0x00008000U The Blink frequency = fck_div/128 */ 271 #define LCD_BLINKFREQ_DIV_256 (0x5UL << LCD_FCTRL_BLINKF_Pos) /*!< 0x0000A000U The Blink frequency = fck_div/256 */ 272 #define LCD_BLINKFREQ_DIV_512 (0x6UL << LCD_FCTRL_BLINKF_Pos) /*!< 0x0000C000U The Blink frequency = fck_div/512 */ 273 #define LCD_BLINKFREQ_DIV_1024 (0x7UL << LCD_FCTRL_BLINKF_Pos) /*!< 0x0000E000U The Blink frequency = fck_div/1024 */ 274 /** 275 * @} 276 */ 277 278 /** 279 * @defgroup LCD_MuxSegment 280 */ 281 #define LCD_MUXSEGMENT_DISABLE (0x00000000U) /*!< Mux segment disabled */ 282 #define LCD_MUXSEGMENT_ENABLE (LCD_CTRL_MUXSEG) /*!< Mux segment enabled */ 283 /** 284 * @} 285 */ 286 287 /** 288 * @defgroup LCD_Interrupt 289 */ 290 #define LCD_IT_UDD (LCD_FCTRL_UDDIE) /*!< Update display done interrupt */ 291 #define LCD_IT_SOF (LCD_FCTRL_SOFIE) /*!< Start of frame interrupt */ 292 /** 293 * @} 294 */ 295 296 /** 297 * @defgroup LCD_Flag 298 */ 299 #define LCD_FLAG_ENSTS (LCD_STS_ENSTS) /*!< LCD enable flag*/ 300 #define LCD_FLAG_SOF (LCD_STS_SOF) /*!< LCD start of frame event flag*/ 301 #define LCD_FLAG_UDR (LCD_STS_UDR) /*!< Update display request Flag*/ 302 #define LCD_FLAG_UDD (LCD_STS_UDD) /*!< Update display done event flag */ 303 #define LCD_FLAG_RDY (LCD_STS_RDY) /*!< Ready flag */ 304 #define LCD_FLAG_FCRSF (LCD_STS_FCRSF) /*!< LCD frame control register synchronization flag */ 305 /** 306 * @} 307 */ 308 309 /** 310 * @defgroup LCD_Flag_Clear 311 */ 312 #define LCD_FLAG_SOF_CLEAR (LCD_CLR_SOFCLR) /*!< Clear LCD start of frame event flag*/ 313 #define LCD_FLAG_UDD_CLEAR (LCD_CLR_UDDCLR) /*!< Clear Update display done event flag */ 314 /** 315 * @} 316 */ 317 318 319 /* LCD Exported macros -----------------------------------------------------------*/ 320 /** @defgroup LCD_Exported_Macros LCD Exported Macros 321 * @{ 322 */ 323 324 /** @brief Enable the LCD peripheral. 325 * @param None 326 * @retval None 327 */ 328 #define __LCD_ENABLE() SET_BIT(LCD->CTRL, LCD_CTRL_LCDEN) 329 330 /** @brief Disable the LCD peripheral. 331 * @param None 332 * @retval None 333 */ 334 #define __LCD_DISABLE() CLEAR_BIT(LCD->CTRL, LCD_CTRL_LCDEN) 335 336 /** @brief Enable the LCD voltage output buffer. 337 * @param None 338 * @retval None 339 */ 340 #define __LCD_HIGHDRIVE_BUF_ENABLE() SET_BIT(LCD->CTRL, LCD_CTRL_BUFEN) 341 342 /** @brief Disable the LCD voltage output buffer. 343 * @param None 344 * @retval None 345 */ 346 #define __LCD_HIGHDRIVE_BUF_DISABLE() CLEAR_BIT(LCD->CTRL, LCD_CTRL_BUFEN) 347 348 /** @brief Enable the LCD mux segment. 349 * @param None 350 * @retval None 351 */ 352 #define __LCD_MUXSEG_ENABLE() SET_BIT(LCD->CTRL, LCD_CTRL_MUXSEG) 353 354 /** @brief Disable the LCD mux segment. 355 * @param None 356 * @retval None 357 */ 358 #define __LCD_MUXSEG_DISABLE() CLEAR_BIT(LCD->CTRL, LCD_CTRL_MUXSEG) 359 360 /** @brief Select internal VLCD as LCD voltage source 361 * @param None 362 * @retval None 363 */ 364 #define __LCD_SELECT_INTERNAL_VLCD() CLEAR_BIT(LCD->CTRL, LCD_CTRL_VSEL) 365 366 /** @brief Select external VLCD as LCD voltage source 367 * @param None 368 * @retval None 369 */ 370 #define __LCD_SELECT_EXTERNAL_VLCD() SET_BIT(LCD->CTRL, LCD_CTRL_VSEL) 371 372 /** @brief Enable the LCD high driver mode. 373 * @param None 374 * @retval None 375 */ 376 #define __LCD_HIGHDRIVE_ENABLE() SET_BIT(LCD->FCTRL, LCD_FCTRL_HDEN) 377 378 /** @brief Disable the LCD high driver mode. 379 * @param None 380 * @retval None 381 */ 382 #define __LCD_HIGHDRIVE_DISABLE() CLEAR_BIT(LCD->FCTRL, LCD_FCTRL_HDEN) 383 384 /** @brief Config the prescaler factor 385 * @param __PRES__ specifies the LCD prescaler 386 * This parameter can be one of the following values: 387 * @arg LCD_PRESCALER_1: CLKPS = LCDCLK 388 * @arg LCD_PRESCALER_2: CLKPS = LCDCLK/2 389 * @arg LCD_PRESCALER_4: CLKPS = LCDCLK/4 390 * @arg LCD_PRESCALER_8: CLKPS = LCDCLK/8 391 * @arg LCD_PRESCALER_16: CLKPS = LCDCLK/16 392 * @arg LCD_PRESCALER_32: CLKPS = LCDCLK/32 393 * @arg LCD_PRESCALER_64: CLKPS = LCDCLK/64 394 * @arg LCD_PRESCALER_128: CLKPS = LCDCLK/128 395 * @arg LCD_PRESCALER_256: CLKPS = LCDCLK/256 396 * @arg LCD_PRESCALER_512: CLKPS = LCDCLK/512 397 * @arg LCD_PRESCALER_1024: CLKPS = LCDCLK/1024 398 * @arg LCD_PRESCALER_2048: CLKPS = LCDCLK/2048 399 * @arg LCD_PRESCALER_4096: CLKPS = LCDCLK/4096 400 * @arg LCD_PRESCALER_8192: CLKPS = LCDCLK/8192 401 * @arg LCD_PRESCALER_16384: CLKPS = LCDCLK/16384 402 * @arg LCD_PRESCALER_32768: CLKPS = LCDCLK/32768 403 * @retval None 404 */ 405 #define __LCD_PRESCALER_CONFIG(__PRES__) MODIFY_REG(LCD->FCTRL, LCD_FCTRL_PRES,__PRES__) 406 407 /** @brief Config the divider factor 408 * @param __DIV__ specifies the LCD divider 409 * This parameter can be one of the following values: 410 * @arg LCD_DIV_16: CLKDIV = CLKPS/(16) 411 * @arg LCD_DIV_17: CLKDIV = CLKPS/(17) 412 * @arg LCD_DIV_18: CLKDIV = CLKPS/(18) 413 * @arg LCD_DIV_19: CLKDIV = CLKPS/(19) 414 * @arg LCD_DIV_20: CLKDIV = CLKPS/(20) 415 * @arg LCD_DIV_21: CLKDIV = CLKPS/(21) 416 * @arg LCD_DIV_22: CLKDIV = CLKPS/(22) 417 * @arg LCD_DIV_23: CLKDIV = CLKPS/(23) 418 * @arg LCD_DIV_24: CLKDIV = CLKPS/(24) 419 * @arg LCD_DIV_25: CLKDIV = CLKPS/(25) 420 * @arg LCD_DIV_26: CLKDIV = CLKPS/(26) 421 * @arg LCD_DIV_27: CLKDIV = CLKPS/(27) 422 * @arg LCD_DIV_28: CLKDIV = CLKPS/(28) 423 * @arg LCD_DIV_29: CLKDIV = CLKPS/(29) 424 * @arg LCD_DIV_30: CLKDIV = CLKPS/(30) 425 * @arg LCD_DIV_31: CLKDIV = CLKPS/(31) 426 * @retval None 427 */ 428 #define __LCD_DIVIDER_CONFIG(__DIV__) MODIFY_REG(LCD->FCTRL, LCD_FCTRL_DIV,__DIV__) 429 430 /** @brief Config the blink mode and frequency 431 * @param __BLINKMODE__ specifies the LCD blink mode 432 * This parameter can be one of the following values: 433 * @arg LCD_DIV_16: CLKDIV = CLKPS/(16) 434 * @arg LCD_BLINKMODE_OFF: Blink disable 435 * @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel) 436 * @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8 pixels according to the programmed duty) 437 * @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM (all pixels) 438 * @param __BLINKFREQUENCY__ specifies the LCD blink frequency 439 * This parameter can be one of the following values: 440 * @arg LCD_BLINKFREQ_DIV_8: The Blink frequency = fck_div/8 441 * @arg LCD_BLINKFREQ_DIV_16: The Blink frequency = fck_div/16 442 * @arg LCD_BLINKFREQ_DIV_32: The Blink frequency = fck_div/32 443 * @arg LCD_BLINKFREQ_DIV_64: The Blink frequency = fck_div/64 444 * @arg LCD_BLINKFREQ_DIV_128: The Blink frequency = fck_div/128 445 * @arg LCD_BLINKFREQ_DIV_256: The Blink frequency = fck_div/256 446 * @arg LCD_BLINKFREQ_DIV_512: The Blink frequency = fck_div/512 447 * @arg LCD_BLINKFREQ_DIV_1024: The Blink frequency = fck_div/1024 448 * @retval None 449 */ 450 #define __LCD_BLINK_CONFIG(__BLINKMODE__,__BLINKFREQUENCY__) MODIFY_REG(LCD->FCTRL, (LCD_FCTRL_BLINK|LCD_FCTRL_BLINKF),(__BLINKMODE__|__BLINKFREQUENCY__)) 451 452 453 /** @brief Config the contrast 454 * @param __CONTRAST__ specifies the LCD contrast 455 * This parameter can be one of the following values: 456 * @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V 457 * @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V 458 * @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V 459 * @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V 460 * @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V 461 * @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.26V 462 * @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.40V 463 * @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.55V 464 * @retval None 465 */ 466 #define __LCD_CONTRAST_CONFIG(__CONTRAST__) MODIFY_REG(LCD->FCTRL, LCD_FCTRL_CONTRAST,__CONTRAST__) 467 468 /** @brief Config the dead time 469 * @param __CONTRAST__ specifies the LCD dead time 470 * This parameter can be one of the following values: 471 * @arg LCD_DEADTIME_0: No dead Time 472 * @arg LCD_DEADTIME_1: One Phase between different couple of Frame 473 * @arg LCD_DEADTIME_2: Two Phase between different couple of Frame 474 * @arg LCD_DEADTIME_3: Three Phase between different couple of Frame 475 * @arg LCD_DEADTIME_4: Four Phase between different couple of Frame 476 * @arg LCD_DEADTIME_5: Five Phase between different couple of Frame 477 * @arg LCD_DEADTIME_6: Six Phase between different couple of Frame 478 * @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame 479 * @retval None 480 */ 481 #define __LCD_DEADTIME_CONFIG(__DEADTIME__) MODIFY_REG(LCD->FCTRL, LCD_FCTRL_DEAD,__DEADTIME__) 482 483 /** @brief Config the pulse on duration 484 * @param __PULSEON__ specifies the LCD pulse on duration in terms of 485 * CK_PS (prescaled LCD clock period) pulses. 486 * This parameter can be one of the following values: 487 * @arg LCD_PULSEONDURATION_0: 0 pulse 488 * @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS 489 * @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS 490 * @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS 491 * @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS 492 * @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS 493 * @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS 494 * @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS 495 * @retval None 496 */ 497 #define __LCD_PULSEONDURATION_CONFIG(__PULSEON__) MODIFY_REG(LCD->FCTRL, LCD_FCTRL_PULSEON,__PULSEON__) 498 499 /** @brief Enable the specified LCD interrupt. 500 * @param __INTERRUPT__ specifies the LCD interrupt source to be enabled. 501 * This parameter can be one of the following values: 502 * @arg LCD_IT_SOF: Start of Frame Interrupt 503 * @arg LCD_IT_UDD: Update Display Done Interrupt 504 * @retval None 505 */ 506 #define __LCD_ENABLE_IT(__INTERRUPT__) SET_BIT(LCD->FCTRL, __INTERRUPT__) 507 508 /** @brief Disable the specified LCD interrupt. 509 * @param __INTERRUPT__ specifies the LCD interrupt source to be disabled. 510 * This parameter can be one of the following values: 511 * @arg LCD_IT_SOF: Start of Frame Interrupt 512 * @arg LCD_IT_UDD: Update Display Done Interrupt 513 * @retval None 514 */ 515 #define __LCD_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(LCD->FCTRL, __INTERRUPT__) 516 517 /** @brief Check whether the specified LCD interrupt source is enabled or not. 518 * @param __INTERRUPT__ specifies the LCD interrupt source to check. 519 * This parameter can be one of the following values: 520 * @arg LCD_IT_SOF: Start of Frame Interrupt 521 * @arg LCD_IT_UDD: Update Display Done Interrupt. 522 * @retval The state of __INTERRUPT__ 523 */ 524 #define __LCD_GET_IT_SOURCE(__INTERRUPT__) ((LCD->FCTRL) & (__INTERRUPT__)) 525 526 /** @brief Set LCD UDR flag for update dispaly request 527 * @param None 528 * @retval None 529 */ 530 #define __LCD_UPDATE_REQUEST() SET_BIT(LCD->STS, LCD_FLAG_UDR) 531 532 /** @brief Check whether the specified LCD flag is set or not. 533 * @param __FLAG__ specifies the flag to check. 534 * This parameter can be one of the following values: 535 * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status. 536 * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR 537 * goes from 0 to 1. On deactivation it reflects the real status of 538 * LCD so it becomes 0 at the end of the last displayed frame. 539 * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at 540 * the beginning of a new frame, at the same time as the display data is 541 * updated. 542 * @arg LCD_FLAG_UDR: Update Display Request flag. 543 * @arg LCD_FLAG_UDD: Update Display Done flag. 544 * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status 545 * of the step-up converter. 546 * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag. 547 * This flag is set by hardware each time the LCD_FCR register is updated 548 * in the LCDCLK domain. 549 * @retval The new state of __FLAG__ 550 */ 551 #define __LCD_GET_FLAG(__FLAG__) (((LCD->STS) & (__FLAG__)) == (__FLAG__)) 552 553 /** @brief Clear the specified LCD pending flag. 554 * @param __FLAG__ specifies the flag to clear. 555 * This parameter can be any combination of the following values: 556 * @arg LCD_FLAG_SOF_CLEAR: Start of Frame Interrupt 557 * @arg LCD_FLAG_UDD_CLEAR: Update Display Done Interrupt 558 * @retval None 559 */ 560 #define __LCD_CLEAR_FLAG(__FLAG__) \ 561 do { \ 562 SET_BIT((LCD->CLR), (__FLAG__)); \ 563 CLEAR_BIT((LCD->CLR), (__FLAG__)); \ 564 }while (0) 565 566 /** @brief Config LCD to keep display in STOP2 mode. 567 * @param None 568 * @retval None 569 */ 570 #define __LCD_DISPLAY_IN_STOP2() \ 571 do { \ 572 SET_BIT(*(__IO uint32_t *)(PWR_BASE+0x08), (0x1UL << 21)); \ 573 CLEAR_BIT(*(__IO uint32_t *)(PWR_BASE+0x1c), (0x1UL << 7)); \ 574 }while (0) 575 576 /* Private macros ------------------------------------------------------------*/ 577 /** @defgroup LCD_Private_Macros LCD Private Macros 578 * @{ 579 */ 580 #define IS_LCD_RAM_REGISTER_INDEX(__RAMRegIndex__) ((__RAMRegIndex__)<=LCD_RAM2_COM7) 581 582 #define IS_LCD_PRESCALER(_PRESCALER_) \ 583 (((_PRESCALER_)==LCD_PRESCALER_1) ||((_PRESCALER_)==LCD_PRESCALER_2) \ 584 ||((_PRESCALER_)==LCD_PRESCALER_4) ||((_PRESCALER_)==LCD_PRESCALER_8) \ 585 ||((_PRESCALER_)==LCD_PRESCALER_16) ||((_PRESCALER_)==LCD_PRESCALER_32) \ 586 ||((_PRESCALER_)==LCD_PRESCALER_64) ||((_PRESCALER_)==LCD_PRESCALER_128) \ 587 ||((_PRESCALER_)==LCD_PRESCALER_256) ||((_PRESCALER_)==LCD_PRESCALER_512) \ 588 ||((_PRESCALER_)==LCD_PRESCALER_1024)||((_PRESCALER_)==LCD_PRESCALER_2048) \ 589 ||((_PRESCALER_)==LCD_PRESCALER_4096)||((_PRESCALER_)==LCD_PRESCALER_8192) \ 590 ||((_PRESCALER_)==LCD_PRESCALER_16384)||((_PRESCALER_)==LCD_PRESCALER_32768)) 591 592 #define IS_LCD_DIVIDER(__DIVIDER__) \ 593 (((__DIVIDER__)==LCD_DIV_16)||((__DIVIDER__)==LCD_DIV_17)||((__DIVIDER__)==LCD_DIV_18) \ 594 ||((__DIVIDER__)==LCD_DIV_19)||((__DIVIDER__)==LCD_DIV_20)||((__DIVIDER__)==LCD_DIV_21) \ 595 ||((__DIVIDER__)==LCD_DIV_22)||((__DIVIDER__)==LCD_DIV_23)||((__DIVIDER__)==LCD_DIV_24) \ 596 ||((__DIVIDER__)==LCD_DIV_25)||((__DIVIDER__)==LCD_DIV_26)||((__DIVIDER__)==LCD_DIV_27) \ 597 ||((__DIVIDER__)==LCD_DIV_28)||((__DIVIDER__)==LCD_DIV_29)||((__DIVIDER__)==LCD_DIV_30) \ 598 ||((__DIVIDER__)==LCD_DIV_31)) 599 600 #define IS_LCD_DUTY(__DUTY__) \ 601 (((__DUTY__)==LCD_DUTY_STATIC)||((__DUTY__)==LCD_DUTY_1_2) \ 602 ||((__DUTY__)==LCD_DUTY_1_3) ||((__DUTY__)==LCD_DUTY_1_4) \ 603 ||((__DUTY__)==LCD_DUTY_1_8) ) 604 605 #define IS_LCD_BIAS(__BIAS__) \ 606 (((__BIAS__)==LCD_BIAS_1_2)||((__BIAS__)==LCD_BIAS_1_3)||((__BIAS__)==LCD_BIAS_1_4)) 607 608 #define IS_LCD_VOLTAGESOURCE(__SOURCE__) \ 609 (((__SOURCE__)==LCD_VOLTAGESOURCE_INTERNAL)||((__SOURCE__)==LCD_VOLTAGESOURCE_EXTERNAL)) 610 611 #define IS_LCD_CONTRASTLEVEL(__CONTRAST__) \ 612 (((__CONTRAST__)==LCD_CONTRASTLEVEL_0) ||((__CONTRAST__)==LCD_CONTRASTLEVEL_1) \ 613 ||((__CONTRAST__)==LCD_CONTRASTLEVEL_2) ||((__CONTRAST__)==LCD_CONTRASTLEVEL_3) \ 614 ||((__CONTRAST__)==LCD_CONTRASTLEVEL_4) ||((__CONTRAST__)==LCD_CONTRASTLEVEL_5) \ 615 ||((__CONTRAST__)==LCD_CONTRASTLEVEL_6) ||((__CONTRAST__)==LCD_CONTRASTLEVEL_7)) 616 617 #define IS_LCD_DEADTIME(__DEADTIME__) \ 618 (((__DEADTIME__)==LCD_DEADTIME_0) ||((__DEADTIME__)==LCD_DEADTIME_1) \ 619 ||((__DEADTIME__)==LCD_DEADTIME_2) ||((__DEADTIME__)==LCD_DEADTIME_3) \ 620 ||((__DEADTIME__)==LCD_DEADTIME_4) ||((__DEADTIME__)==LCD_DEADTIME_5) \ 621 ||((__DEADTIME__)==LCD_DEADTIME_6) ||((__DEADTIME__)==LCD_DEADTIME_7)) 622 623 #define IS_LCD_PULSEONDURATION(__PULSE__) \ 624 (((__PULSE__)==LCD_PULSEONDURATION_0) ||((__PULSE__)==LCD_PULSEONDURATION_1) \ 625 ||((__PULSE__)==LCD_PULSEONDURATION_2) ||((__PULSE__)==LCD_PULSEONDURATION_3) \ 626 ||((__PULSE__)==LCD_PULSEONDURATION_4) ||((__PULSE__)==LCD_PULSEONDURATION_5) \ 627 ||((__PULSE__)==LCD_PULSEONDURATION_6) ||((__PULSE__)==LCD_PULSEONDURATION_7)) 628 629 #define IS_LCD_HIGHDRIVE(__HIGHDRIVE__) \ 630 ((((__HIGHDRIVE__))==LCD_HIGHDRIVE_DISABLE)||(((__HIGHDRIVE__))==LCD_HIGHDRIVE_ENABLE)) 631 632 #define IS_LCD_HIGHDRIVEBUFFER(__HIGHDRIVEBUF__) \ 633 (((__HIGHDRIVEBUF__)==LCD_HIGHDRIVEBUFFER_DISABLE)||((__HIGHDRIVEBUF__)==LCD_HIGHDRIVEBUFFER_ENABLE)) 634 635 #define IS_LCD_BLINKMODE(__BLINKMODE__) \ 636 (((__BLINKMODE__)==LCD_BLINKMODE_OFF) ||((__BLINKMODE__)==LCD_BLINKMODE_SEG0_COM0) \ 637 ||((__BLINKMODE__)==LCD_BLINKMODE_SEG0_ALLCOM) ||((__BLINKMODE__)==LCD_BLINKMODE_ALLSEG_ALLCOM)) 638 639 #define IS_LCD_BLINKFREQ(__BLINKFREQ__) \ 640 (((__BLINKFREQ__)==LCD_BLINKFREQ_DIV_8) ||((__BLINKFREQ__)==LCD_BLINKFREQ_DIV_16) \ 641 ||((__BLINKFREQ__)==LCD_BLINKFREQ_DIV_32) ||((__BLINKFREQ__)==LCD_BLINKFREQ_DIV_64) \ 642 ||((__BLINKFREQ__)==LCD_BLINKFREQ_DIV_128) ||((__BLINKFREQ__)==LCD_BLINKFREQ_DIV_256) \ 643 ||((__BLINKFREQ__)==LCD_BLINKFREQ_DIV_512) ||((__BLINKFREQ__)==LCD_BLINKFREQ_DIV_1024)) 644 645 #define IS_LCD_MUXSEGMENT(__MUXSEG__) \ 646 (((__MUXSEG__)==LCD_MUXSEGMENT_DISABLE)||((__MUXSEG__)==LCD_MUXSEGMENT_ENABLE)) 647 648 #define IS_LCD_FLAG(__FLAG__) \ 649 (((__FLAG__)==LCD_FLAG_ENSTS)||((__FLAG__)==LCD_FLAG_SOF) \ 650 ||((__FLAG__)==LCD_FLAG_UDR)||((__FLAG__)==LCD_FLAG_UDD) \ 651 ||((__FLAG__)==LCD_FLAG_RDY)||((__FLAG__)==LCD_FLAG_FCRSF)) 652 653 #define IS_LCD_CLR_FLAG(__CLEARFLAG__) (((__CLEARFLAG__)==LCD_FLAG_SOF_CLEAR)||((__CLEARFLAG__)==LCD_FLAG_UDD_CLEAR) 654 655 656 /** 657 * @brief LCD Init structure definition 658 */ 659 660 typedef struct 661 { 662 uint32_t Prescaler; /*!< Configures the LCD Prescaler. 663 This parameter can be one value of @ref LCD_Prescaler */ 664 uint32_t Divider; /*!< Configures the LCD Divider. 665 This parameter can be one value of @ref LCD_Divider */ 666 uint32_t Duty; /*!< Configures the LCD Duty. 667 This parameter can be one value of @ref LCD_Duty */ 668 uint32_t Bias; /*!< Configures the LCD Bias. 669 This parameter can be one value of @ref LCD_Bias */ 670 uint32_t VoltageSource; /*!< Selects the LCD Voltage source. 671 This parameter can be one value of @ref LCD_Voltage_source */ 672 uint32_t Contrast; /*!< Configures the LCD Contrast. 673 This parameter can be one value of @ref LCD_Contrast */ 674 uint32_t DeadTime; /*!< Configures the LCD Dead Time. 675 This parameter can be one value of @ref LCD_DeadTime */ 676 uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration. 677 This parameter can be one value of @ref LCD_PulseOnDuration */ 678 uint32_t HighDrive; /*!< Enable or disable the permanent high driver. 679 This parameter can be one value of @ref LCD_HighDrive */ 680 uint32_t HighDriveBuffer; /*!< Enable or disable the high driver buffer. 681 This parameter can be one value of @ref LCD_HighDrive_Buffer */ 682 uint32_t BlinkMode; /*!< Configures the LCD Blink Mode. 683 This parameter can be one value of @ref LCD_Blink_Mode */ 684 uint32_t BlinkFreq; /*!< Configures the LCD Blink frequency. 685 This parameter can be one value of @ref LCD_Blink_Frequency */ 686 uint32_t MuxSegment; /*!< Enable or disable mux segment. 687 This parameter can be one value of @ref LCD_MuxSegment */ 688 }LCD_InitType; 689 690 691 /** @addtogroup LCD_Exported_Functions 692 * @{ 693 */ 694 LCD_ErrorTypeDef LCD_Init(LCD_InitType *LCD_InitStructure ); 695 void LCD_DeInit(void); 696 697 LCD_ErrorTypeDef LCD_ClockConfig(uint32_t LCD_ClkSource); 698 699 void LCD_RamClear(void); 700 701 LCD_ErrorTypeDef LCD_UpdateDisplayRequest(void); 702 703 LCD_ErrorTypeDef LCD_Write(uint32_t RAMRegisterIndex,uint32_t RAMRegisterMask,uint32_t RAMData); 704 705 706 LCD_ErrorTypeDef LCD_SetBit(uint32_t RAMRegisterIndex,uint32_t RAMData); 707 708 LCD_ErrorTypeDef LCD_ClearBit(uint32_t RAMRegisterIndex,uint32_t RAMData); 709 710 LCD_ErrorTypeDef LCD_WaitForSynchro(void); 711 712 /** 713 * @} 714 */ 715 716 717 718 #ifdef __cplusplus 719 } 720 #endif 721 722 #endif /* __N32L40X_LCD_H__ */ 723 /** 724 * @} 725 */ 726 727 /** 728 * @} 729 */ 730 731 /** 732 * @} 733 */ 734 735 736