1 /*****************************************************************************
2 * Copyright (c) 2019, Nations Technologies Inc.
3 *
4 * All rights reserved.
5 * ****************************************************************************
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * - Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the disclaimer below.
12 *
13 * Nations' name may not be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY NATIONS "AS IS" AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
19 * DISCLAIMED. IN NO EVENT SHALL NATIONS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
22 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
23 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
24 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
25 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * ****************************************************************************/
27
28 /**
29 * @file n32wb452_gpio.c
30 * @author Nations
31 * @version v1.0.2
32 *
33 * @copyright Copyright (c) 2019, Nations Technologies Inc. All rights reserved.
34 */
35 #include "n32wb452_gpio.h"
36 #include "n32wb452_rcc.h"
37
38 /** @addtogroup N32WB452_StdPeriph_Driver
39 * @{
40 */
41
42 /** @addtogroup GPIO
43 * @brief GPIO driver modules
44 * @{
45 */
46
47 /** @addtogroup GPIO_Private_TypesDefinitions
48 * @{
49 */
50
51 /**
52 * @}
53 */
54
55 /** @addtogroup GPIO_Private_Defines
56 * @{
57 */
58
59 /* ------------ RCC registers bit address in the alias region ----------------*/
60 #define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
61
62 /* --- Event control register -----*/
63
64 /* Alias word address of EVOE bit */
65 #define EVCR_OFFSET (AFIO_OFFSET + 0x00)
66 #define EVOE_BitNumber ((uint8_t)0x07)
67 #define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
68
69 /* --- RMP_CFG Register ---*/
70 /* Alias word address of MII_RMII_SEL bit */
71 #define MAPR_OFFSET (AFIO_OFFSET + 0x04)
72 #define MII_RMII_SEL_BitNumber ((u8)0x17)
73 #define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
74
75 #define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80)
76 #define LSB_MASK ((uint16_t)0xFFFF)
77 #define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
78 #define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF)
79 #define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
80 #define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
81 #define DBGAFR_NUMBITS_MAPR3_MASK ((uint32_t)0x40000000)
82 #define DBGAFR_NUMBITS_MAPR4_MASK ((uint32_t)0x20000000)
83 #define DBGAFR_NUMBITS_MAPR5_MASK ((uint32_t)0x10000000)
84 #define DBGAFR_NUMBITS_SPI1_MASK ((uint32_t)0x01000000)
85 #define DBGAFR_NUMBITS_USART2_MASK ((uint32_t)0x04000000)
86
87 /**
88 * @}
89 */
90
91 /** @addtogroup GPIO_Private_Macros
92 * @{
93 */
94
95 /**
96 * @}
97 */
98
99 /** @addtogroup GPIO_Private_Variables
100 * @{
101 */
102
103 /**
104 * @}
105 */
106
107 /** @addtogroup GPIO_Private_FunctionPrototypes
108 * @{
109 */
110
111 /**
112 * @}
113 */
114
115 /** @addtogroup GPIO_Private_Functions
116 * @{
117 */
118
119 /**
120 * @brief Deinitializes the GPIOx peripheral registers to their default reset values.
121 * @param GPIOx where x can be (A..G) to select the GPIO peripheral.
122 */
GPIO_DeInit(GPIO_Module * GPIOx)123 void GPIO_DeInit(GPIO_Module* GPIOx)
124 {
125 /* Check the parameters */
126 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
127
128 if (GPIOx == GPIOA)
129 {
130 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOA, ENABLE);
131 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOA, DISABLE);
132 }
133 else if (GPIOx == GPIOB)
134 {
135 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOB, ENABLE);
136 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOB, DISABLE);
137 }
138 else if (GPIOx == GPIOC)
139 {
140 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOC, ENABLE);
141 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOC, DISABLE);
142 }
143 else if (GPIOx == GPIOD)
144 {
145 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOD, ENABLE);
146 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOD, DISABLE);
147 }
148 else if (GPIOx == GPIOE)
149 {
150 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOE, ENABLE);
151 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_GPIOE, DISABLE);
152 }
153 else
154 {
155 }
156 }
157
158 /**
159 * @brief Deinitializes the Alternate Functions (remap, event control
160 * and EXTI configuration) registers to their default reset values.
161 */
GPIO_AFIOInitDefault(void)162 void GPIO_AFIOInitDefault(void)
163 {
164 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_AFIO, ENABLE);
165 RCC_EnableAPB2PeriphReset(RCC_APB2_PERIPH_AFIO, DISABLE);
166 }
167
168 /**
169 * @brief Initializes the GPIOx peripheral according to the specified
170 * parameters in the GPIO_InitStruct.
171 * @param GPIOx where x can be (A..G) to select the GPIO peripheral.
172 * @param GPIO_InitStruct pointer to a GPIO_InitType structure that
173 * contains the configuration information for the specified GPIO peripheral.
174 */
GPIO_InitPeripheral(GPIO_Module * GPIOx,GPIO_InitType * GPIO_InitStruct)175 void GPIO_InitPeripheral(GPIO_Module* GPIOx, GPIO_InitType* GPIO_InitStruct)
176 {
177 uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
178 uint32_t tmpregister = 0x00, pinmask = 0x00;
179 /* Check the parameters */
180 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
181 assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
182 assert_param(IS_GPIO_PIN(GPIO_InitStruct->Pin));
183
184 /*---------------------------- GPIO Mode Configuration -----------------------*/
185 currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
186 if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
187 {
188 /* Check the parameters */
189 assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
190 /* Output mode */
191 currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
192 }
193 /*---------------------------- GPIO PL_CFG Configuration ------------------------*/
194 /* Configure the eight low port pins */
195 if (((uint32_t)GPIO_InitStruct->Pin & ((uint32_t)0x00FF)) != 0x00)
196 {
197 tmpregister = GPIOx->PL_CFG;
198 for (pinpos = 0x00; pinpos < 0x08; pinpos++)
199 {
200 pos = ((uint32_t)0x01) << pinpos;
201 /* Get the port pins position */
202 currentpin = (GPIO_InitStruct->Pin) & pos;
203 if (currentpin == pos)
204 {
205 pos = pinpos << 2;
206 /* Clear the corresponding low control register bits */
207 pinmask = ((uint32_t)0x0F) << pos;
208 tmpregister &= ~pinmask;
209 /* Write the mode configuration in the corresponding bits */
210 tmpregister |= (currentmode << pos);
211 /* Reset the corresponding POD bit */
212 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
213 {
214 GPIOx->PBC = (((uint32_t)0x01) << pinpos);
215 }
216 else
217 {
218 /* Set the corresponding POD bit */
219 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
220 {
221 GPIOx->PBSC = (((uint32_t)0x01) << pinpos);
222 }
223 }
224 }
225 }
226 GPIOx->PL_CFG = tmpregister;
227 }
228 /*---------------------------- GPIO PH_CFG Configuration ------------------------*/
229 /* Configure the eight high port pins */
230 if (GPIO_InitStruct->Pin > 0x00FF)
231 {
232 tmpregister = GPIOx->PH_CFG;
233 for (pinpos = 0x00; pinpos < 0x08; pinpos++)
234 {
235 pos = (((uint32_t)0x01) << (pinpos + 0x08));
236 /* Get the port pins position */
237 currentpin = ((GPIO_InitStruct->Pin) & pos);
238 if (currentpin == pos)
239 {
240 pos = pinpos << 2;
241 /* Clear the corresponding high control register bits */
242 pinmask = ((uint32_t)0x0F) << pos;
243 tmpregister &= ~pinmask;
244 /* Write the mode configuration in the corresponding bits */
245 tmpregister |= (currentmode << pos);
246 /* Reset the corresponding POD bit */
247 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
248 {
249 GPIOx->PBC = (((uint32_t)0x01) << (pinpos + 0x08));
250 }
251 /* Set the corresponding POD bit */
252 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
253 {
254 GPIOx->PBSC = (((uint32_t)0x01) << (pinpos + 0x08));
255 }
256 }
257 }
258 GPIOx->PH_CFG = tmpregister;
259 }
260 }
261
262 /**
263 * @brief Fills each GPIO_InitStruct member with its default value.
264 * @param GPIO_InitStruct pointer to a GPIO_InitType structure which will
265 * be initialized.
266 */
GPIO_InitStruct(GPIO_InitType * GPIO_InitStruct)267 void GPIO_InitStruct(GPIO_InitType* GPIO_InitStruct)
268 {
269 /* Reset GPIO init structure parameters values */
270 GPIO_InitStruct->Pin = GPIO_PIN_ALL;
271 GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
272 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
273 }
274
275 /**
276 * @brief Reads the specified input port pin.
277 * @param GPIOx where x can be (A..G) to select the GPIO peripheral.
278 * @param Pin specifies the port bit to read.
279 * This parameter can be GPIO_Pin_x where x can be (0..15).
280 * @return The input port pin value.
281 */
GPIO_ReadInputDataBit(GPIO_Module * GPIOx,uint16_t Pin)282 uint8_t GPIO_ReadInputDataBit(GPIO_Module* GPIOx, uint16_t Pin)
283 {
284 uint8_t bitstatus = 0x00;
285
286 /* Check the parameters */
287 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
288 assert_param(IS_GET_GPIO_PIN(Pin));
289
290 if ((GPIOx->PID & Pin) != (uint32_t)Bit_RESET)
291 {
292 bitstatus = (uint8_t)Bit_SET;
293 }
294 else
295 {
296 bitstatus = (uint8_t)Bit_RESET;
297 }
298 return bitstatus;
299 }
300
301 /**
302 * @brief Reads the specified GPIO input data port.
303 * @param GPIOx where x can be (A..G) to select the GPIO peripheral.
304 * @return GPIO input data port value.
305 */
GPIO_ReadInputData(GPIO_Module * GPIOx)306 uint16_t GPIO_ReadInputData(GPIO_Module* GPIOx)
307 {
308 /* Check the parameters */
309 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
310
311 return ((uint16_t)GPIOx->PID);
312 }
313
314 /**
315 * @brief Reads the specified output data port bit.
316 * @param GPIOx where x can be (A..G) to select the GPIO peripheral.
317 * @param Pin specifies the port bit to read.
318 * This parameter can be GPIO_Pin_x where x can be (0..15).
319 * @return The output port pin value.
320 */
GPIO_ReadOutputDataBit(GPIO_Module * GPIOx,uint16_t Pin)321 uint8_t GPIO_ReadOutputDataBit(GPIO_Module* GPIOx, uint16_t Pin)
322 {
323 uint8_t bitstatus = 0x00;
324 /* Check the parameters */
325 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
326 assert_param(IS_GET_GPIO_PIN(Pin));
327
328 if ((GPIOx->POD & Pin) != (uint32_t)Bit_RESET)
329 {
330 bitstatus = (uint8_t)Bit_SET;
331 }
332 else
333 {
334 bitstatus = (uint8_t)Bit_RESET;
335 }
336 return bitstatus;
337 }
338
339 /**
340 * @brief Reads the specified GPIO output data port.
341 * @param GPIOx where x can be (A..G) to select the GPIO peripheral.
342 * @return GPIO output data port value.
343 */
GPIO_ReadOutputData(GPIO_Module * GPIOx)344 uint16_t GPIO_ReadOutputData(GPIO_Module* GPIOx)
345 {
346 /* Check the parameters */
347 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
348
349 return ((uint16_t)GPIOx->POD);
350 }
351
352 /**
353 * @brief Sets the selected data port bits.
354 * @param GPIOx where x can be (A..G) to select the GPIO peripheral.
355 * @param Pin specifies the port bits to be written.
356 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
357 */
GPIO_SetBits(GPIO_Module * GPIOx,uint16_t Pin)358 void GPIO_SetBits(GPIO_Module* GPIOx, uint16_t Pin)
359 {
360 /* Check the parameters */
361 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
362 assert_param(IS_GPIO_PIN(Pin));
363
364 GPIOx->PBSC = Pin;
365 }
GPIO_SetBitsHigh16(GPIO_Module * GPIOx,uint32_t Pin)366 void GPIO_SetBitsHigh16(GPIO_Module* GPIOx, uint32_t Pin)
367 {
368 /* Check the parameters */
369 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
370 // assert_param(IS_GPIO_PIN(Pin));
371
372 GPIOx->PBSC = Pin;
373 }
374
375 /**
376 * @brief Clears the selected data port bits.
377 * @param GPIOx where x can be (A..G) to select the GPIO peripheral.
378 * @param Pin specifies the port bits to be written.
379 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
380 */
GPIO_ResetBits(GPIO_Module * GPIOx,uint16_t Pin)381 void GPIO_ResetBits(GPIO_Module* GPIOx, uint16_t Pin)
382 {
383 /* Check the parameters */
384 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
385 assert_param(IS_GPIO_PIN(Pin));
386
387 GPIOx->PBC = Pin;
388 }
389
390 /**
391 * @brief Sets or clears the selected data port bit.
392 * @param GPIOx where x can be (A..G) to select the GPIO peripheral.
393 * @param Pin specifies the port bit to be written.
394 * This parameter can be one of GPIO_Pin_x where x can be (0..15).
395 * @param BitCmd specifies the value to be written to the selected bit.
396 * This parameter can be one of the Bit_OperateType enum values:
397 * @arg Bit_RESET to clear the port pin
398 * @arg Bit_SET to set the port pin
399 */
GPIO_WriteBit(GPIO_Module * GPIOx,uint16_t Pin,Bit_OperateType BitCmd)400 void GPIO_WriteBit(GPIO_Module* GPIOx, uint16_t Pin, Bit_OperateType BitCmd)
401 {
402 /* Check the parameters */
403 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
404 assert_param(IS_GET_GPIO_PIN(Pin));
405 assert_param(IS_GPIO_BIT_OPERATE(BitCmd));
406
407 if (BitCmd != Bit_RESET)
408 {
409 GPIOx->PBSC = Pin;
410 }
411 else
412 {
413 GPIOx->PBC = Pin;
414 }
415 }
416
417 /**
418 * @brief Writes data to the specified GPIO data port.
419 * @param GPIOx where x can be (A..G) to select the GPIO peripheral.
420 * @param PortVal specifies the value to be written to the port output data register.
421 */
GPIO_Write(GPIO_Module * GPIOx,uint16_t PortVal)422 void GPIO_Write(GPIO_Module* GPIOx, uint16_t PortVal)
423 {
424 /* Check the parameters */
425 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
426
427 GPIOx->POD = PortVal;
428 }
429
430 /**
431 * @brief Locks GPIO Pins configuration registers.
432 * @param GPIOx where x can be (A..G) to select the GPIO peripheral.
433 * @param Pin specifies the port bit to be written.
434 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
435 */
GPIO_ConfigPinLock(GPIO_Module * GPIOx,uint16_t Pin)436 void GPIO_ConfigPinLock(GPIO_Module* GPIOx, uint16_t Pin)
437 {
438 uint32_t tmp = 0x00010000;
439
440 /* Check the parameters */
441 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
442 assert_param(IS_GPIO_PIN(Pin));
443
444 tmp |= Pin;
445 /* Set LCKK bit */
446 GPIOx->PLOCK_CFG = tmp;
447 /* Reset LCKK bit */
448 GPIOx->PLOCK_CFG = Pin;
449 /* Set LCKK bit */
450 GPIOx->PLOCK_CFG = tmp;
451 /* Read LCKK bit*/
452 tmp = GPIOx->PLOCK_CFG;
453 /* Read LCKK bit*/
454 tmp = GPIOx->PLOCK_CFG;
455 }
456
457 /**
458 * @brief Selects the GPIO pin used as Event output.
459 * @param PortSource selects the GPIO port to be used as source
460 * for Event output.
461 * This parameter can be GPIO_PortSourceGPIOx where x can be (A..E).
462 * @param PinSource specifies the pin for the Event output.
463 * This parameter can be GPIO_PinSourcex where x can be (0..15).
464 */
GPIO_ConfigEventOutput(uint8_t PortSource,uint8_t PinSource)465 void GPIO_ConfigEventOutput(uint8_t PortSource, uint8_t PinSource)
466 {
467 uint32_t tmpregister = 0x00;
468 /* Check the parameters */
469 assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(PortSource));
470 assert_param(IS_GPIO_PIN_SOURCE(PinSource));
471
472 tmpregister = AFIO->ECTRL;
473 /* Clear the PORT[6:4] and PIN[3:0] bits */
474 tmpregister &= EVCR_PORTPINCONFIG_MASK;
475 tmpregister |= (uint32_t)PortSource << 0x04;
476 tmpregister |= PinSource;
477 AFIO->ECTRL = tmpregister;
478 }
479
480 /**
481 * @brief Enables or disables the Event Output.
482 * @param Cmd new state of the Event output.
483 * This parameter can be: ENABLE or DISABLE.
484 */
GPIO_CtrlEventOutput(FunctionalState Cmd)485 void GPIO_CtrlEventOutput(FunctionalState Cmd)
486 {
487 /* Check the parameters */
488 assert_param(IS_FUNCTIONAL_STATE(Cmd));
489
490 *(__IO uint32_t*)EVCR_EVOE_BB = (uint32_t)Cmd;
491 }
492
493 /**
494 * @brief Changes the mapping of the specified pin.
495 * @param RmpPin selects the pin to remap.
496 * This parameter can be one of the following values:
497 * @arg GPIO_RMP_SPI1 SPI1 Alternate Function mapping
498 * @arg GPIO_RMP_I2C1 I2C1 Alternate Function mapping
499 * @arg GPIO_RMP_USART1 USART1 Alternate Function mapping
500 * @arg GPIO_RMP_USART2 USART2 Alternate Function mapping
501 * @arg GPIO_PART_RMP_USART3 USART3 Partial Alternate Function mapping
502 * @arg GPIO_ALL_RMP_USART3 USART3 Full Alternate Function mapping
503 * @arg GPIO_PART1_RMP_TIM1 TIM1 Partial Alternate Function mapping
504 * @arg GPIO_PART2_RMP_TIM1 TIM1 Partial Alternate Function mapping
505 * @arg GPIO_ALL_RMP_TIM1 TIM1 Full Alternate Function mapping
506 * @arg GPIO_PartialRemap1_TIM2 TIM2 Partial1 Alternate Function mapping
507 * @arg GPIO_PART2_RMP_TIM2 TIM2 Partial2 Alternate Function mapping
508 * @arg GPIO_ALL_RMP_TIM2 TIM2 Full Alternate Function mapping
509 * @arg GPIO_PART1_RMP_TIM3 TIM3 Partial Alternate Function mapping
510 * @arg GPIO_ALL_RMP_TIM3 TIM3 Full Alternate Function mapping
511 * @arg GPIO_RMP_TIM4 TIM4 Alternate Function mapping
512 * @arg GPIO_RMP1_CAN1 CAN1 Alternate Function mapping
513 * @arg GPIO_RMP2_CAN1 CAN1 Alternate Function mapping
514 * @arg GPIO_RMP3_CAN1 CAN1 Alternate Function mapping
515 * @arg GPIO_RMP_PD01 PD01 Alternate Function mapping
516 * @arg GPIO_RMP_TIM5CH4 LSI connected to TIM5 Channel4 input capture for calibration
517 * @arg GPIO_RMP_ADC1_ETRI ADC1 External Trigger Injected Conversion remapping
518 * @arg GPIO_RMP_ADC1_ETRR ADC1 External Trigger Regular Conversion remapping
519 * @arg GPIO_RMP_ADC2_ETRI ADC2 External Trigger Injected Conversion remapping
520 * @arg GPIO_RMP_ADC2_ETRR ADC2 External Trigger Regular Conversion remapping
521 * @arg GPIO_RMP_SW_JTAG_NO_NJTRST Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST
522 * @arg GPIO_RMP_SW_JTAG_SW_ENABLE JTAG-DP Disabled and SW-DP Enabled
523 * @arg GPIO_RMP_SW_JTAG_DISABLE Full SWJ Disabled (JTAG-DP + SW-DP)
524 * @arg GPIO_RMP_SDIO SDIO Alternate Function mapping
525 * @arg GPIO_RMP1_CAN2 CAN2 Alternate Function mapping
526 * @arg GPIO_RMP3_CAN2 CAN2 Alternate Function mapping
527 * @arg GPIO_RMP1_I2C2 I2C2 Alternate Function mapping
528 * @arg GPIO_RMP3_I2C2 I2C2 Alternate Function mapping
529 * @arg GPIO_RMP2_I2C3 I2C3 Alternate Function mapping
530 * @arg GPIO_RMP3_I2C3 I2C3 Alternate Function mapping
531 * @arg GPIO_RMP1_I2C4 I2C4 Alternate Function mapping
532 * @arg GPIO_RMP3_I2C4 I2C4 Alternate Function mapping
533 * @arg GPIO_RMP1_SPI2 SPI2 Alternate Function mapping
534 * @arg GPIO_RMP2_SPI2 SPI2 Alternate Function mapping
535 * @arg GPIO_RMP1_SPI3 SPI3 Alternate Function mapping
536 * @arg GPIO_RMP2_SPI3 SPI3 Alternate Function mapping
537 * @arg GPIO_RMP1_ETH ETH Alternate Function mapping
538 * @arg GPIO_RMP2_ETH ETH Alternate Function mapping
539 * @arg GPIO_RMP3_ETH ETH Alternate Function mapping
540 * @arg GPIO_RMP1_SPI1 SPI1 Alternate Function mapping
541 * @arg GPIO_RMP2_SPI1 SPI1 Alternate Function mapping
542 * @arg GPIO_RMP3_SPI1 SPI1 Alternate Function mapping
543 * @arg GPIO_RMP1_USART2 USART2 Alternate Function mapping
544 * @arg GPIO_RMP2_USART2 USART2 Alternate Function mapping
545 * @arg GPIO_RMP3_USART2 USART2 Alternate Function mapping
546 * @arg GPIO_RMP1_UART4 UART4 Alternate Function mapping
547 * @arg GPIO_RMP2_UART4 UART4 Alternate Function mapping
548 * @arg GPIO_RMP3_UART4 UART4 Alternate Function mapping
549 * @arg GPIO_RMP1_UART5 UART5 Alternate Function mapping
550 * @arg GPIO_RMP2_UART5 UART5 Alternate Function mapping
551 * @arg GPIO_RMP3_UART5 UART5 Alternate Function mapping
552 * @arg GPIO_RMP2_UART6 UART6 Alternate Function mapping
553 * @arg GPIO_RMP3_UART6 UART6 Alternate Function mapping
554 * @arg GPIO_RMP1_UART7 UART7 Alternate Function mapping
555 * @arg GPIO_RMP3_UART7 UART7 Alternate Function mapping
556 * @arg GPIO_RMP1_TIM8 TIM8 Alternate Function mapping
557 * @arg GPIO_RMP3_TIM8 TIM8 Alternate Function mapping
558 * @arg GPIO_RMP1_COMP1 COMP1 Alternate Function mapping
559 * @arg GPIO_RMP2_COMP1 COMP1 Alternate Function mapping
560 * @arg GPIO_RMP3_COMP1 COMP1 Alternate Function mapping
561 * @arg GPIO_RMP1_COMP2 COMP2 Alternate Function mapping
562 * @arg GPIO_RMP2_COMP2 COMP2 Alternate Function mapping
563 * @arg GPIO_RMP3_COMP2 COMP2 Alternate Function mapping
564 * @arg GPIO_RMP1_COMP3 COMP3 Alternate Function mapping
565 * @arg GPIO_RMP3_COMP3 COMP3 Alternate Function mapping
566 * @arg GPIO_RMP1_COMP4 COMP4 Alternate Function mapping
567 * @arg GPIO_RMP3_COMP4 COMP4 Alternate Function mapping
568 * @arg GPIO_RMP1_COMP5 COMP5 Alternate Function mapping
569 * @arg GPIO_RMP2_COMP5 COMP5 Alternate Function mapping
570 * @arg GPIO_RMP3_COMP5 COMP5 Alternate Function mapping
571 * @arg GPIO_RMP3_UART5 UART5 Alternate Function mapping
572 * @arg GPIO_RMP1_COMP6 COMP6 Alternate Function mapping
573 * @arg GPIO_RMP3_COMP6 COMP6 Alternate Function mapping
574 * @arg GPIO_RMP_COMP7 COMP7 Alternate Function mapping
575 * @arg GPIO_RMP_TSC_OUT_CTRL TSC_OUT_CTRL Alternate Function mapping
576 * @arg GPIO_RMP1_DVP DVP Alternate Function mapping
577 * @arg GPIO_RMP3_DVP DVP Alternate Function mapping
578 * @arg GPIO_Remap_SPI1_NSS SPI1 NSS Alternate Function mapping
579 * @arg GPIO_Remap_SPI2_NSS SPI2 NSS Alternate Function mapping
580 * @arg GPIO_Remap_SPI3_NSS SPI3 NSS Alternate Function mapping
581 * @arg GPIO_Remap_DET_EN_EGB4 EGB4 Detect Alternate Function mapping
582 * @arg GPIO_Remap_DET_EN_EGB3 EGB3 Detect Alternate Function mapping
583 * @arg GPIO_Remap_DET_EN_EGB2 EGB2 Detect Alternate Function mapping
584 * @arg GPIO_Remap_DET_EN_EGB1 EGB1 Detect Alternate Function mapping
585 * @arg GPIO_Remap_DET_EN_EGBN4 EGBN4 Detect Alternate Function mapping
586 * @arg GPIO_Remap_DET_EN_EGBN3 EGBN3 Detect Alternate Function mapping
587 * @arg GPIO_Remap_DET_EN_EGBN2 EGBN2 Detect Alternate Function mapping
588 * @arg GPIO_Remap_DET_EN_EGBN1 EGBN1 Detect Alternate Function mapping
589 * @arg GPIO_Remap_DET_EN_ECLAMP4 ECLAMP4 Detect Alternate Function mapping
590 * @arg GPIO_Remap_DET_EN_ECLAMP3 ECLAMP3 Detect Alternate Function mapping
591 * @arg GPIO_Remap_DET_EN_ECLAMP2 ECLAMP2 Detect Alternate Function mapping
592 * @arg GPIO_Remap_DET_EN_ECLAMP1 ECLAMP1 Detect Alternate Function mapping
593 * @arg GPIO_Remap_RST_EN_EGB4 EGB4 Reset Alternate Function mapping
594 * @arg GPIO_Remap_RST_EN_EGB3 EGB3 Reset Alternate Function mapping
595 * @arg GPIO_Remap_RST_EN_EGB2 EGB2 Reset Alternate Function mapping
596 * @arg GPIO_Remap_RST_EN_EGB1 EGB1 Reset Alternate Function mapping
597 * @arg GPIO_Remap_RST_EN_EGBN4 EGBN4 Reset Alternate Function mapping
598 * @arg GPIO_Remap_RST_EN_EGBN3 EGBN3 Reset Alternate Function mapping
599 * @arg GPIO_Remap_RST_EN_EGBN2 EGBN2 Reset Alternate Function mapping
600 * @arg GPIO_Remap_RST_EN_EGBN1 EGBN1 Reset Alternate Function mapping
601 * @arg GPIO_Remap_RST_EN_ECLAMP4 ECLAMP4 Reset Alternate Function mapping
602 * @arg GPIO_Remap_RST_EN_ECLAMP3 ECLAMP3 Reset Alternate Function mapping
603 * @arg GPIO_Remap_RST_EN_ECLAMP2 ECLAMP2 Reset Alternate Function mapping
604 * @arg GPIO_Remap_RST_EN_ECLAMP1 ECLAMP1 Reset Alternate Function mapping
605 * @param Cmd new state of the port pin remapping.
606 * This parameter can be: ENABLE or DISABLE.
607 */
GPIO_ConfigPinRemap(uint32_t RmpPin,FunctionalState Cmd)608 void GPIO_ConfigPinRemap(uint32_t RmpPin, FunctionalState Cmd)
609 {
610 uint32_t tmp = 0x00, tmp1 = 0x00, tmpregister = 0x00, tmpmask = 0x00, tmp2 = 0x00;
611
612 /* Check the parameters */
613 assert_param(IS_GPIO_REMAP(RmpPin));
614 assert_param(IS_FUNCTIONAL_STATE(Cmd));
615
616 /* Check RmpPin relate AFIO RMP_CFG */
617 if ((RmpPin & 0x40000000) == 0x40000000)
618 {
619 tmpregister = AFIO->RMP_CFG3;
620 }
621 else if ((RmpPin & 0x20000000) == 0x20000000)
622 {
623 tmpregister = AFIO->RMP_CFG4;
624 }
625 else if ((RmpPin & 0x10000000) == 0x10000000)
626 {
627 tmpregister = AFIO->RMP_CFG5;
628 }
629 else
630 {
631 tmpregister = AFIO->RMP_CFG;
632 }
633
634 tmpmask = (RmpPin & DBGAFR_POSITION_MASK) >> 16;
635 tmp = RmpPin & LSB_MASK;
636
637 if ((RmpPin
638 & (DBGAFR_NUMBITS_MAPR5_MASK | DBGAFR_NUMBITS_MAPR4_MASK | DBGAFR_NUMBITS_MAPR3_MASK | DBGAFR_LOCATION_MASK
639 | DBGAFR_NUMBITS_MASK))
640 == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
641 {
642 tmpregister &= DBGAFR_SWJCFG_MASK;
643 AFIO->RMP_CFG &= DBGAFR_SWJCFG_MASK;
644 }
645 else if ((RmpPin & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
646 {
647 if ((RmpPin & DBGAFR_LOCATION_MASK) == DBGAFR_LOCATION_MASK)
648 {
649 tmp1 = (((uint32_t)0x03) << tmpmask) << 16;
650 }
651 else
652 {
653 tmp1 = ((uint32_t)0x03) << tmpmask;
654 }
655 tmpregister &= ~tmp1;
656 if ((RmpPin & 0x70000000) == 0x00000000)
657 {
658 tmpregister |= ~DBGAFR_SWJCFG_MASK;
659 }
660 }
661 else
662 {/*configuration AFIO RMP_CFG*/
663 if ((RmpPin & DBGAFR_NUMBITS_SPI1_MASK) == DBGAFR_NUMBITS_SPI1_MASK)
664 {
665 if ((RmpPin & 0x00000004) == 0x00000004)
666 {
667 if ((RmpPin & 0x02000000) == 0x02000000) // GPIO_RMP3_SPI1
668 {
669 tmpregister &= ~(tmp << (((RmpPin & 0x00200000) >> 21) * 16));
670 if (Cmd != DISABLE)
671 {
672 tmp2 = AFIO->RMP_CFG;
673 tmp2 |= 0x00000001;
674 tmp2 |= ~DBGAFR_SWJCFG_MASK;
675 AFIO->RMP_CFG = tmp2; // Remap_SPI1 ENABLE
676 }
677 else
678 {
679 tmp2 = AFIO->RMP_CFG;
680 tmp2 &= 0xFFFFFFFE;
681 tmp2 |= ~DBGAFR_SWJCFG_MASK;
682 AFIO->RMP_CFG = tmp2; // Remap_SPI1 DISABLE
683 }
684 }
685 else
686 {
687 tmpregister &= ~(tmp << (((RmpPin & 0x00200000) >> 21) * 16)); // GPIO_RMP2_SPI1
688
689 tmp2 = AFIO->RMP_CFG;
690 tmp2 &= 0xFFFFFFFE;
691 tmp2 |= ~DBGAFR_SWJCFG_MASK;
692 AFIO->RMP_CFG = tmp2; // Remap_SPI1 DISABLE
693 }
694 }
695 else
696 {
697 tmpregister &= ~((tmp | 0x00000004) << (((RmpPin & 0x00200000) >> 21) * 16)); // clear
698 if (Cmd != DISABLE) // GPIO_RMP1_SPI1
699 {
700 tmp2 = AFIO->RMP_CFG;
701 tmp2 |= 0x00000001;
702 tmp2 |= ~DBGAFR_SWJCFG_MASK;
703 AFIO->RMP_CFG = tmp2; // Remap_SPI1 ENABLE
704 }
705 else
706 {
707 tmp2 = AFIO->RMP_CFG;
708 tmp2 &= 0xFFFFFFFE;
709 tmp2 |= ~DBGAFR_SWJCFG_MASK;
710 AFIO->RMP_CFG = tmp2; // Remap_SPI1 DISABLE
711 }
712 }
713 }
714 else if ((RmpPin & DBGAFR_NUMBITS_USART2_MASK) == DBGAFR_NUMBITS_USART2_MASK)
715 {
716 if ((RmpPin & 0x00000008) == 0x00000008)
717 {
718 if ((RmpPin & 0x02000000) == 0x02000000) // GPIO_RMP3_USART2
719 {
720 tmpregister &= ~(tmp << (((RmpPin & 0x00200000) >> 21) * 16));
721 if (Cmd != DISABLE)
722 {
723 tmp2 = AFIO->RMP_CFG;
724 tmp2 |= 0x00000008;
725 tmp2 |= ~DBGAFR_SWJCFG_MASK;
726 AFIO->RMP_CFG = tmp2; // Remap_USART2 ENABLE
727 }
728 else
729 {
730 tmp2 = AFIO->RMP_CFG;
731 tmp2 &= 0xFFFFFFF7;
732 tmp2 |= ~DBGAFR_SWJCFG_MASK;
733 AFIO->RMP_CFG = tmp2; // Remap_USART2 DISABLE
734 }
735 }
736 else
737 {
738 tmpregister &= ~(tmp << (((RmpPin & 0x00200000) >> 21) * 16)); // GPIO_RMP2_USART2
739
740 tmp2 = AFIO->RMP_CFG;
741 tmp2 &= 0xFFFFFFF7;
742 tmp2 |= ~DBGAFR_SWJCFG_MASK;
743 AFIO->RMP_CFG = tmp2; // Remap_USART2 DISABLE
744 }
745 }
746 else // GPIO_RMP1_USART2
747 {
748 tmpregister &= ~((tmp | 0x00000008) << (((RmpPin & 0x00200000) >> 21) * 16)); // clear
749 if (Cmd != DISABLE)
750 {
751 tmp2 = AFIO->RMP_CFG;
752 tmp2 |= 0x00000008;
753 tmp2 |= ~DBGAFR_SWJCFG_MASK;
754 AFIO->RMP_CFG = tmp2; // Remap_USART2 ENABLE
755 }
756 else
757 {
758 tmp2 = AFIO->RMP_CFG;
759 tmp2 &= 0xFFFFFFF7;
760 tmp2 |= ~DBGAFR_SWJCFG_MASK;
761 AFIO->RMP_CFG = tmp2; // Remap_USART2 DISABLE
762 }
763 }
764 }
765 else
766 {
767 tmpregister &= ~(tmp << (((RmpPin & 0x00200000) >> 21) * 16));
768 if ((RmpPin & 0x70000000) == 0x00000000)
769 {
770 tmpregister |= ~DBGAFR_SWJCFG_MASK;
771 }
772 }
773 }
774
775 /*configuration AFIO RMP_CFG~RMP_CFG5*/
776 if (Cmd != DISABLE)
777 {
778 tmpregister |= (tmp << (((RmpPin & 0x00200000) >> 21) * 16));
779 }
780
781 if ((RmpPin & 0x40000000) == 0x40000000)
782 {
783 AFIO->RMP_CFG3 = tmpregister;
784 }
785 else if ((RmpPin & 0x20000000) == 0x20000000)
786 {
787 AFIO->RMP_CFG4 = tmpregister;
788 }
789 else if ((RmpPin & 0x10000000) == 0x10000000)
790 {
791 AFIO->RMP_CFG5 = tmpregister;
792 }
793 else
794 {
795 AFIO->RMP_CFG = tmpregister;
796 }
797 }
798
799 /**
800 * @brief Selects the GPIO pin used as EXTI Line.
801 * @param PortSource selects the GPIO port to be used as source for EXTI lines.
802 * This parameter can be GPIO_PortSourceGPIOx where x can be (A..G).
803 * @param PinSource specifies the EXTI line to be configured.
804 * This parameter can be GPIO_PinSourcex where x can be (0..15).
805 */
GPIO_ConfigEXTILine(uint8_t PortSource,uint8_t PinSource)806 void GPIO_ConfigEXTILine(uint8_t PortSource, uint8_t PinSource)
807 {
808 uint32_t tmp = 0x00;
809 /* Check the parameters */
810 assert_param(IS_GPIO_EXTI_PORT_SOURCE(PortSource));
811 assert_param(IS_GPIO_PIN_SOURCE(PinSource));
812
813 tmp = ((uint32_t)0x0F) << (0x04 * (PinSource & (uint8_t)0x03));
814 AFIO->EXTI_CFG[PinSource >> 0x02] &= ~tmp;
815 AFIO->EXTI_CFG[PinSource >> 0x02] |= (((uint32_t)PortSource) << (0x04 * (PinSource & (uint8_t)0x03)));
816 }
817
818 /**
819 * @}
820 */
821
822 /**
823 * @}
824 */
825
826 /**
827 * @}
828 */
829