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2 * Copyright (c) 2019, Nations Technologies Inc.
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27
28 /**
29 * @file n32wb452_wwdg.c
30 * @author Nations
31 * @version v1.0.0
32 *
33 * @copyright Copyright (c) 2019, Nations Technologies Inc. All rights reserved.
34 */
35 #include "n32wb452_wwdg.h"
36 #include "n32wb452_rcc.h"
37
38 /** @addtogroup N32WB452_StdPeriph_Driver
39 * @{
40 */
41
42 /** @addtogroup WWDG
43 * @brief WWDG driver modules
44 * @{
45 */
46
47 /** @addtogroup WWDG_Private_TypesDefinitions
48 * @{
49 */
50
51 /**
52 * @}
53 */
54
55 /** @addtogroup WWDG_Private_Defines
56 * @{
57 */
58
59 /* ----------- WWDG registers bit address in the alias region ----------- */
60 #define WWDG_OFFADDR (WWDG_BASE - PERIPH_BASE)
61
62 /* Alias word address of EWI bit */
63 #define CFG_OFFADDR (WWDG_OFFADDR + 0x04)
64 #define EWINT_BIT 0x09
65 #define CFG_EWINT_BB (PERIPH_BB_BASE + (CFG_OFFADDR * 32) + (EWINT_BIT * 4))
66
67 /* --------------------- WWDG registers bit mask ------------------------ */
68
69 /* CTRL register bit mask */
70 #define CTRL_ACTB_SET ((uint32_t)0x00000080)
71
72 /* CFG register bit mask */
73 #define CFG_TIMERB_MASK ((uint32_t)0xFFFFFE7F)
74 #define CFG_W_MASK ((uint32_t)0xFFFFFF80)
75 #define BIT_MASK ((uint8_t)0x7F)
76
77 /**
78 * @}
79 */
80
81 /** @addtogroup WWDG_Private_Macros
82 * @{
83 */
84
85 /**
86 * @}
87 */
88
89 /** @addtogroup WWDG_Private_Variables
90 * @{
91 */
92
93 /**
94 * @}
95 */
96
97 /** @addtogroup WWDG_Private_FunctionPrototypes
98 * @{
99 */
100
101 /**
102 * @}
103 */
104
105 /** @addtogroup WWDG_Private_Functions
106 * @{
107 */
108
109 /**
110 * @brief Deinitializes the WWDG peripheral registers to their default reset values.
111 */
WWDG_DeInit(void)112 void WWDG_DeInit(void)
113 {
114 RCC_EnableAPB1PeriphReset(RCC_APB1_PERIPH_WWDG, ENABLE);
115 RCC_EnableAPB1PeriphReset(RCC_APB1_PERIPH_WWDG, DISABLE);
116 }
117
118 /**
119 * @brief Sets the WWDG Prescaler.
120 * @param WWDG_Prescaler specifies the WWDG Prescaler.
121 * This parameter can be one of the following values:
122 * @arg WWDG_PRESCALER_DIV1 WWDG counter clock = (PCLK1/4096)/1
123 * @arg WWDG_PRESCALER_DIV2 WWDG counter clock = (PCLK1/4096)/2
124 * @arg WWDG_PRESCALER_DIV4 WWDG counter clock = (PCLK1/4096)/4
125 * @arg WWDG_PRESCALER_DIV8 WWDG counter clock = (PCLK1/4096)/8
126 */
WWDG_SetPrescalerDiv(uint32_t WWDG_Prescaler)127 void WWDG_SetPrescalerDiv(uint32_t WWDG_Prescaler)
128 {
129 uint32_t tmpregister = 0;
130 /* Check the parameters */
131 assert_param(IS_WWDG_PRESCALER_DIV(WWDG_Prescaler));
132 /* Clear WDGTB[1:0] bits */
133 tmpregister = WWDG->CFG & CFG_TIMERB_MASK;
134 /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
135 tmpregister |= WWDG_Prescaler;
136 /* Store the new value */
137 WWDG->CFG = tmpregister;
138 }
139
140 /**
141 * @brief Sets the WWDG window value.
142 * @param WindowValue specifies the window value to be compared to the downcounter.
143 * This parameter value must be lower than 0x80.
144 */
WWDG_SetWValue(uint8_t WindowValue)145 void WWDG_SetWValue(uint8_t WindowValue)
146 {
147 __IO uint32_t tmpregister = 0;
148
149 /* Check the parameters */
150 assert_param(IS_WWDG_WVALUE(WindowValue));
151 /* Clear W[6:0] bits */
152
153 tmpregister = WWDG->CFG & CFG_W_MASK;
154
155 /* Set W[6:0] bits according to WindowValue value */
156 tmpregister |= WindowValue & (uint32_t)BIT_MASK;
157
158 /* Store the new value */
159 WWDG->CFG = tmpregister;
160 }
161
162 /**
163 * @brief Enables the WWDG Early Wakeup interrupt(EWI).
164 */
WWDG_EnableInt(void)165 void WWDG_EnableInt(void)
166 {
167 *(__IO uint32_t*)CFG_EWINT_BB = (uint32_t)ENABLE;
168 }
169
170 /**
171 * @brief Sets the WWDG counter value.
172 * @param Counter specifies the watchdog counter value.
173 * This parameter must be a number between 0x40 and 0x7F.
174 */
WWDG_SetCnt(uint8_t Counter)175 void WWDG_SetCnt(uint8_t Counter)
176 {
177 /* Check the parameters */
178 assert_param(IS_WWDG_CNT(Counter));
179 /* Write to T[6:0] bits to configure the counter value, no need to do
180 a read-modify-write; writing a 0 to WDGA bit does nothing */
181 WWDG->CTRL = Counter & BIT_MASK;
182 }
183
184 /**
185 * @brief Enables WWDG and load the counter value.
186 * @param Counter specifies the watchdog counter value.
187 * This parameter must be a number between 0x40 and 0x7F.
188 */
WWDG_Enable(uint8_t Counter)189 void WWDG_Enable(uint8_t Counter)
190 {
191 /* Check the parameters */
192 assert_param(IS_WWDG_CNT(Counter));
193 WWDG->CTRL = CTRL_ACTB_SET | Counter;
194 }
195
196 /**
197 * @brief Checks whether the Early Wakeup interrupt flag is set or not.
198 * @return The new state of the Early Wakeup interrupt flag (SET or RESET)
199 */
WWDG_GetEWINTF(void)200 FlagStatus WWDG_GetEWINTF(void)
201 {
202 return (FlagStatus)(WWDG->STS);
203 }
204
205 /**
206 * @brief Clears Early Wakeup interrupt flag.
207 */
WWDG_ClrEWINTF(void)208 void WWDG_ClrEWINTF(void)
209 {
210 WWDG->STS = (uint32_t)RESET;
211 }
212
213 /**
214 * @}
215 */
216
217 /**
218 * @}
219 */
220
221 /**
222 * @}
223 */
224