1 /* 2 * Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. 3 * 4 * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in 5 * the the People's Republic of China and other countries. 6 * All Allwinner Technology Co.,Ltd. trademarks are used with permission. 7 * 8 * DISCLAIMER 9 * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. 10 * IF YOU NEED TO INTEGRATE THIRD PARTY¡¯S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) 11 * IN ALLWINNERS¡¯SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN 12 * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. 13 * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS 14 * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. 15 * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY¡¯S TECHNOLOGY. 16 * 17 * 18 * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT 19 * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, 20 * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING 21 * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE 22 * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. 23 * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 26 * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 28 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 30 * OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef __MBUS_SUN20IW1_H__ 34 #define __MBUS_SUN20IW1_H__ 35 36 typedef struct { 37 uint32_t MC_MCGCR; 38 uint32_t MC_CPU_BWCR; 39 uint32_t MC_RV_SYS_BWCR; 40 uint32_t MC_MAHB_BWCR; 41 uint32_t MC_DMA_BWCR; 42 uint32_t MC_VE_BWCR; 43 uint32_t MC_CE_BWCR; 44 uint32_t MC_TVD_BWCR; 45 uint32_t MC_CSI_BWCR; 46 uint32_t MC_DSP_SYS_BWCR; 47 uint32_t MC_G2D_BWCR; 48 uint32_t MC_DI_BWCR; 49 uint32_t MC_DE_BWCR; 50 uint32_t MC_IOMMU_BWCR; 51 uint32_t MC_XXX_BWCR; 52 uint32_t MC_OTHER_BWCR; 53 uint32_t MC_TOTAL_BWCR; 54 }MBUS_PMU_REGISTER_T; 55 56 57 #define MBUS_CTRL_BASE 0x03102000 58 #define MBUS_PMU_BASE (MBUS_CTRL_BASE + 0x009c) 59 60 #define MBUS_PMU ((MBUS_PMU_REGISTER_T *)(MBUS_PMU_BASE)) 61 62 #endif 63