1 /*
2  * Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #include <aic_core.h>
8 #include <aic_hal.h>
9 #include <hal_syscfg.h>
10 #include "usbd_core.h"
11 #include "usb_dc_aic_reg.h"
12 
13 extern irqreturn_t USBD_IRQHandler(int irq, void * data);
14 
15 uint32_t usbd_clk;
16 static unsigned char dma_sync_buffer[CACHE_LINE_SIZE] __attribute__((aligned(CACHE_LINE_SIZE)));
17 
usb_dc_sync_dma(void)18 void usb_dc_sync_dma(void)
19 {
20     asm volatile("sw t0, (%0)" : : "r"(dma_sync_buffer));
21     csi_dcache_clean_range((phy_addr_t)(ptr_t)dma_sync_buffer, CACHE_LINE_SIZE);
22 }
23 
usb_dc_low_level_init(void)24 void usb_dc_low_level_init(void)
25 {
26     /* set usb0 phy switch: Host/Device */
27 #if defined(AIC_USING_USB0_DEVICE) || defined(AIC_USING_USB0_OTG)
28     hal_syscfg_usb_phy0_sw_host(0);
29 #endif
30     /* set pin-mux */
31 
32     /* enable clock */
33     hal_clk_enable(CONFIG_USB_AIC_DC_PHY_CLK);
34     hal_clk_enable(CONFIG_USB_AIC_DC_CLK);
35     aicos_udelay(300);
36     hal_reset_assert(CONFIG_USB_AIC_DC_PHY_RESET);
37     hal_reset_assert(CONFIG_USB_AIC_DC_RESET);
38     aicos_udelay(300);
39     hal_reset_deassert(CONFIG_USB_AIC_DC_PHY_RESET);
40     hal_reset_deassert(CONFIG_USB_AIC_DC_RESET);
41     aicos_udelay(300);
42 
43     usbd_clk = hal_clk_get_freq(CONFIG_USB_AIC_DC_CLK);
44 
45     /* register interrupt callback */
46     aicos_request_irq(CONFIG_USB_AIC_DC_IRQ_NUM, USBD_IRQHandler,
47                       0, "usb_device", NULL);
48     aicos_irq_enable(CONFIG_USB_AIC_DC_IRQ_NUM);
49 }
50 
usb_dc_low_level_deinit(void)51 void usb_dc_low_level_deinit(void)
52 {
53     aicos_irq_disable(CONFIG_USB_AIC_DC_IRQ_NUM);
54 
55     hal_reset_assert(CONFIG_USB_AIC_DC_PHY_RESET);
56     hal_reset_assert(CONFIG_USB_AIC_DC_RESET);
57     hal_clk_disable(CONFIG_USB_AIC_DC_PHY_CLK);
58     hal_clk_disable(CONFIG_USB_AIC_DC_CLK);
59 }
60 
61