1 /*
2  * Copyright (c) 2024, sakumisu
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 #include "usbd_core.h"
7 #include "usbh_core.h"
8 #include "usb_dwc2_param.h"
9 
10 extern unsigned int system_core_clock;
11 
12 uint32_t SystemCoreClock;
13 
14 const struct dwc2_user_params param_pa11_pa12 = {
15     .phy_type = DWC2_PHY_TYPE_PARAM_FS,
16     .device_dma_enable = false,
17     .device_dma_desc_enable = false,
18     .device_rx_fifo_size = (320 - 16 - 16 - 16 - 16),
19     .device_tx_fifo_size = {
20         [0] = 16, // 64 byte
21         [1] = 16, // 64 byte
22         [2] = 16, // 64 byte
23         [3] = 16, // 64 byte
24         [4] = 0,
25         [5] = 0,
26         [6] = 0,
27         [7] = 0,
28         [8] = 0,
29         [9] = 0,
30         [10] = 0,
31         [11] = 0,
32         [12] = 0,
33         [13] = 0,
34         [14] = 0,
35         [15] = 0 },
36 #ifdef AT32F415xx
37     .device_gccfg = ((1 << 16) | (1 << 18) | (1 << 19) | (1 << 21)),
38 #else
39     .device_gccfg = ((1 << 16) | (1 << 21)),
40 #endif
41     .total_fifo_size = 320 // 1280 byte
42 };
43 
44 #if __has_include("at32f402_405.h")
45 #include "at32f402_405.h"
46 
47 const struct dwc2_user_params param_pb14_pb15 = {
48     .phy_type = DWC2_PHY_TYPE_PARAM_UTMI,
49     .device_dma_enable = true,
50     .device_dma_desc_enable = false,
51     .device_rx_fifo_size = (1008 - 16 - 256 - 128 - 128 - 128 - 128),
52     .device_tx_fifo_size = {
53         [0] = 16,  // 64 byte
54         [1] = 256, // 1024 byte
55         [2] = 128, // 512 byte
56         [3] = 128, // 512 byte
57         [4] = 128, // 512 byte
58         [5] = 128, // 512 byte
59         [6] = 0,
60         [7] = 0,
61         [8] = 0,
62         [9] = 0,
63         [10] = 0,
64         [11] = 0,
65         [12] = 0,
66         [13] = 0,
67         [14] = 0,
68         [15] = 0 },
69 
70     .host_dma_desc_enable = false,
71     .host_rx_fifo_size = 624,
72     .host_nperio_tx_fifo_size = 128, // 512 byte
73     .host_perio_tx_fifo_size = 256,  // 1024 byte
74 
75     .device_gccfg = ((1 << 16) | (1 << 21)),
76     .host_gccfg = ((1 << 16) | (1 << 21))
77 };
78 #endif
79 
80 #ifndef CONFIG_USB_DWC2_CUSTOM_PARAM
dwc2_get_user_params(uint32_t reg_base,struct dwc2_user_params * params)81 void dwc2_get_user_params(uint32_t reg_base, struct dwc2_user_params *params)
82 {
83     SystemCoreClock = system_core_clock;
84 
85 #if __has_include("at32f402_405.h")
86     if (reg_base == OTGHS_BASE) {
87         memcpy(params, &param_pb14_pb15, sizeof(struct dwc2_user_params));
88     } else {
89         memcpy(params, &param_pa11_pa12, sizeof(struct dwc2_user_params));
90     }
91 #else
92     memcpy(params, &param_pa11_pa12, sizeof(struct dwc2_user_params));
93 #endif
94 #ifdef CONFIG_USB_DWC2_CUSTOM_FIFO
95     struct usb_dwc2_user_fifo_config s_dwc2_fifo_config;
96 
97     dwc2_get_user_fifo_config(reg_base, &s_dwc2_fifo_config);
98 
99     params->device_rx_fifo_size = s_dwc2_fifo_config.device_rx_fifo_size;
100     for (uint8_t i = 0; i < MAX_EPS_CHANNELS; i++) {
101         params->device_tx_fifo_size[i] = s_dwc2_fifo_config.device_tx_fifo_size[i];
102     }
103 #endif
104 }
105 #endif
106 
usbd_dwc2_delay_ms(uint8_t ms)107 void usbd_dwc2_delay_ms(uint8_t ms)
108 {
109     uint32_t count = SystemCoreClock / 1000 * ms;
110     while (count--) {
111         __asm volatile("nop");
112     }
113 }
114