1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2010-11-13 weety first version 9 */ 10 11 #ifndef __DM36X_PSC_H 12 #define __DM36X_PSC_H 13 14 #ifdef __cplusplus 15 extern "C" { 16 #endif 17 18 19 /* PSC register offsets */ 20 #define EPCPR 0x070 21 #define PTCMD 0x120 22 #define PTSTAT 0x128 23 #define PDSTAT 0x200 24 #define PDCTL1 0x304 25 #define MDSTAT(n) (0x800 + (n) * 4) 26 #define MDCTL(n) (0xA00 + (n) * 4) 27 28 /* Power and Sleep Controller (PSC) Domains */ 29 #define DAVINCI_GPSC_ARMDOMAIN 0 30 #define DAVINCI_GPSC_DSPDOMAIN 1 31 32 33 #define DAVINCI_DM365_LPSC_TPCC 0 34 #define DAVINCI_DM365_LPSC_TPTC0 1 35 #define DAVINCI_DM365_LPSC_TPTC1 2 36 #define DAVINCI_DM365_LPSC_TPTC2 3 37 #define DAVINCI_DM365_LPSC_TPTC3 4 38 #define DAVINCI_DM365_LPSC_TIMER3 5 39 #define DAVINCI_DM365_LPSC_SPI1 6 40 #define DAVINCI_DM365_LPSC_MMC_SD1 7 41 #define DAVINCI_DM365_LPSC_McBSP 8 42 #define DAVINCI_DM365_LPSC_USB 9 43 #define DAVINCI_DM365_LPSC_PWM3 10 44 #define DAVINCI_DM365_LPSC_SPI2 11 45 #define DAVINCI_DM365_LPSC_RTO 12 46 #define DAVINCI_DM365_LPSC_DDR_EMIF 13 47 #define DAVINCI_DM365_LPSC_AEMIF 14 48 #define DAVINCI_DM365_LPSC_MMC_SD 15 49 #define DAVINCI_DM365_LPSC_MMC_SD0 15 50 #define DAVINCI_DM365_LPSC_MEMSTICK 16 51 #define DAVINCI_DM365_LPSC_TIMER4 17 52 #define DAVINCI_DM365_LPSC_I2C 18 53 #define DAVINCI_DM365_LPSC_UART0 19 54 #define DAVINCI_DM365_LPSC_UART1 20 55 #define DAVINCI_DM365_LPSC_UHPI 21 56 #define DAVINCI_DM365_LPSC_SPI0 22 57 #define DAVINCI_DM365_LPSC_PWM0 23 58 #define DAVINCI_DM365_LPSC_PWM1 24 59 #define DAVINCI_DM365_LPSC_PWM2 25 60 #define DAVINCI_DM365_LPSC_GPIO 26 61 #define DAVINCI_DM365_LPSC_TIMER0 27 62 #define DAVINCI_DM365_LPSC_TIMER1 28 63 #define DAVINCI_DM365_LPSC_TIMER2 29 64 #define DAVINCI_DM365_LPSC_SYSTEM_SUBSYS 30 65 #define DAVINCI_DM365_LPSC_ARM 31 66 #define DAVINCI_DM365_LPSC_SCR0 33 67 #define DAVINCI_DM365_LPSC_SCR1 34 68 #define DAVINCI_DM365_LPSC_EMU 35 69 #define DAVINCI_DM365_LPSC_CHIPDFT 36 70 #define DAVINCI_DM365_LPSC_PBIST 37 71 #define DAVINCI_DM365_LPSC_SPI3 38 72 #define DAVINCI_DM365_LPSC_SPI4 39 73 #define DAVINCI_DM365_LPSC_CPGMAC 40 74 #define DAVINCI_DM365_LPSC_RTC 41 75 #define DAVINCI_DM365_LPSC_KEYSCAN 42 76 #define DAVINCI_DM365_LPSC_ADCIF 43 77 #define DAVINCI_DM365_LPSC_VOICE_CODEC 44 78 #define DAVINCI_DM365_LPSC_DAC_CLKRES 45 79 #define DAVINCI_DM365_LPSC_DAC_CLK 46 80 #define DAVINCI_DM365_LPSC_VPSSMSTR 47 81 #define DAVINCI_DM365_LPSC_IMCOP 50 82 #define DAVINCI_DM365_LPSC_KALEIDO 51 83 84 #define PSC_ENABLE 3 85 #define PSC_DISABLE 2 86 #define PSC_SYNCRESET 1 87 #define PSC_RESET 0 88 89 void psc_change_state(int id, int state); 90 91 #ifdef __cplusplus 92 } 93 #endif 94 95 #endif 96