1 /*
2  * Copyright (c) 2006-2022, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2021-09-09     GuEe-GUI     The first version
9  */
10 
11 #ifndef __PSCI_H__
12 #define __PSCI_H__
13 
14 #include <rtdef.h>
15 
16 /*
17  * Non-Confidential PSCI 1.0 release (30 January 2015), and errata fix for PSCI 0.2, unsupport PSCI 0.1
18  */
19 
20 /* PSCI 0.2 interface */
21 #define PSCI_0_2_FN_BASE                    0x84000000
22 #define PSCI_0_2_FN(n)                      (PSCI_0_2_FN_BASE + (n))
23 #define PSCI_0_2_FN_END                     0x8400001F
24 
25 #define PSCI_0_2_FN64_BASE                  0xC4000000
26 #define PSCI_0_2_FN64(n)                    (PSCI_0_2_FN64_BASE + (n))
27 #define PSCI_0_2_FN64_END                   0xC400001F
28 
29 #define PSCI_0_2_FN_PSCI_VERSION            PSCI_0_2_FN(0)
30 #define PSCI_0_2_FN_CPU_SUSPEND             PSCI_0_2_FN(1)
31 #define PSCI_0_2_FN_CPU_OFF                 PSCI_0_2_FN(2)
32 #define PSCI_0_2_FN_CPU_ON                  PSCI_0_2_FN(3)
33 #define PSCI_0_2_FN_AFFINITY_INFO           PSCI_0_2_FN(4)
34 #define PSCI_0_2_FN_MIGRATE                 PSCI_0_2_FN(5)
35 #define PSCI_0_2_FN_MIGRATE_INFO_TYPE       PSCI_0_2_FN(6)
36 #define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU     PSCI_0_2_FN(7)
37 #define PSCI_0_2_FN_SYSTEM_OFF              PSCI_0_2_FN(8)
38 #define PSCI_0_2_FN_SYSTEM_RESET            PSCI_0_2_FN(9)
39 
40 #define PSCI_0_2_FN64_CPU_SUSPEND           PSCI_0_2_FN64(1)
41 #define PSCI_0_2_FN64_CPU_ON                PSCI_0_2_FN64(3)
42 #define PSCI_0_2_FN64_AFFINITY_INFO         PSCI_0_2_FN64(4)
43 #define PSCI_0_2_FN64_MIGRATE               PSCI_0_2_FN64(5)
44 #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU   PSCI_0_2_FN64(7)
45 
46 /* PSCI 1.0 interface */
47 #define PSCI_1_0_FN_PSCI_FEATURES           PSCI_0_2_FN(10)
48 #define PSCI_1_0_FN_CPU_FREEZE              PSCI_0_2_FN(11)
49 #define PSCI_1_0_FN_CPU_DEFAULT_SUSPEND     PSCI_0_2_FN(12)
50 #define PSCI_1_0_FN_NODE_HW_STATE           PSCI_0_2_FN(13)
51 #define PSCI_1_0_FN_SYSTEM_SUSPEND          PSCI_0_2_FN(14)
52 #define PSCI_1_0_FN_SET_SUSPEND_MODE        PSCI_0_2_FN(15)
53 #define PSCI_1_0_FN_STAT_RESIDENCY          PSCI_0_2_FN(16)
54 #define PSCI_1_0_FN_STAT_COUNT              PSCI_0_2_FN(17)
55 #define PSCI_1_1_FN_SYSTEM_RESET2           PSCI_0_2_FN(18)
56 
57 #define PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND   PSCI_0_2_FN64(12)
58 #define PSCI_1_0_FN64_NODE_HW_STATE         PSCI_0_2_FN64(13)
59 #define PSCI_1_0_FN64_SYSTEM_SUSPEND        PSCI_0_2_FN64(14)
60 #define PSCI_1_0_FN64_STAT_RESIDENCY        PSCI_0_2_FN64(16)
61 #define PSCI_1_0_FN64_STAT_COUNT            PSCI_0_2_FN64(17)
62 #define PSCI_1_1_FN64_SYSTEM_RESET2         PSCI_0_2_FN64(18)
63 
64 /* PSCI version decoding (independent of PSCI version) */
65 #define PSCI_VERSION_MAJOR_SHIFT            16
66 #define PSCI_VERSION_MINOR_MASK             ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1)
67 #define PSCI_VERSION_MAJOR_MASK             ~PSCI_VERSION_MINOR_MASK
68 #define PSCI_VERSION_MAJOR(version)         (((version) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT)
69 #define PSCI_VERSION_MINOR(version)         ((version) & PSCI_VERSION_MINOR_MASK)
70 #define PSCI_VERSION(major, min)            ((((major) << PSCI_VERSION_MAJOR_SHIFT) & PSCI_VERSION_MAJOR_MASK) | \
71                                                     ((min) & PSCI_VERSION_MINOR_MASK))
72 
73 /* PSCI affinity level state returned by AFFINITY_INFO */
74 #define PSCI_AFFINITY_LEVEL_ON              0
75 #define PSCI_AFFINITY_LEVEL_OFF             1
76 #define PSCI_AFFINITY_LEVEL_ON_PENDING      2
77 
78 /*
79  * PSCI power state
80  *  power_level:
81  *      Level 0: cores
82  *      Level 1: clusters
83  *      Level 2: system
84  *  state_type:
85  *      value 0: standby or retention state
86  *      value 1: powerdown state(entry and context_id is valid)
87  *  state_id:
88  *      StateID
89  */
90 #define PSCI_POWER_STATE_LEVEL_CORES        0
91 #define PSCI_POWER_STATE_LEVEL_CLUSTERS     1
92 #define PSCI_POWER_STATE_LEVEL_SYSTEM       2
93 
94 #define PSCI_POWER_STATE_TYPE_STANDBY       0
95 #define PSCI_POWER_STATE_TYPE_POWER_DOWN    1
96 
97 #define PSCI_POWER_LEVEL_SHIFT              24
98 #define PSCI_POWER_STATE_TYPE_SHIFT         16
99 #define PSCI_POWER_STATE_ID_SHIFT           0
100 #define PSCI_POWER_STATE(power_level, state_type, state_id) \
101 ( \
102     ((power_level) << PSCI_POWER_LEVEL_SHIFT) | \
103     ((state_type) << PSCI_POWER_STATE_TYPE_SHIFT)  | \
104     ((state_id) << PSCI_POWER_STATE_ID_SHIFT) \
105 )
106 #define PSCI_POWER_LEVEL_VAL(state)         (((state) >> PSCI_POWER_LEVEL_SHIFT) & 0x3)
107 #define PSCI_POWER_STATE_TYPE_VAL(state)    (((state) >> PSCI_POWER_STATE_TYPE_SHIFT) & 0x1)
108 #define PSCI_POWER_STATE_ID_VAL(state)      (((state) >> PSCI_POWER_STATE_ID_SHIFT) & 0xffff)
109 
110 /*
111  * For system, cluster, core
112  *  0: run
113  *  1: standby(only core)
114  *  2: retention
115  *  3: powerdown
116  */
117 #define PSCI_POWER_STATE_ID_RUN         0
118 #define PSCI_POWER_STATE_ID_STANDBY     1
119 #define PSCI_POWER_STATE_ID_RETENTION   2
120 #define PSCI_POWER_STATE_ID_POWERDOWN   3
121 
122 #define PSCI_POWER_STATE_ID(state_id_power_level, system, cluster, core) \
123 ( \
124     ((state_id_power_level) << 12) | \
125     ((system) << 8)  | \
126     ((cluster) << 4) | \
127     (core) \
128 )
129 
130 #define PSCI_RET_SUCCESS                    0
131 #define PSCI_RET_NOT_SUPPORTED              (-1)
132 #define PSCI_RET_INVALID_PARAMETERS         (-2)
133 #define PSCI_RET_DENIED                     (-3)
134 #define PSCI_RET_ALREADY_ON                 (-4)
135 #define PSCI_RET_ON_PENDING                 (-5)
136 #define PSCI_RET_INTERNAL_FAILURE           (-6)
137 #define PSCI_RET_NOT_PRESENT                (-7)
138 #define PSCI_RET_DISABLED                   (-8)
139 #define PSCI_RET_INVALID_ADDRESS            (-9)
140 
141 void psci_system_off(void);
142 void psci_system_reboot(void);
143 rt_uint32_t rt_psci_get_version(void);
144 rt_uint32_t rt_psci_cpu_on(int cpuid, rt_ubase_t entry_point);
145 rt_uint32_t rt_psci_cpu_off(rt_uint32_t state);
146 rt_uint32_t rt_psci_cpu_suspend(rt_uint32_t power_state, rt_ubase_t entry_point);
147 rt_uint32_t rt_psci_migrate(int cpuid);
148 rt_uint32_t rt_psci_get_affinity_info(rt_ubase_t target_affinity, rt_ubase_t lowest_affinity_level);
149 rt_uint32_t rt_psci_migrate_info_type(void);
150 
151 #endif  /* __PSCI_H__ */
152