1 /*""FILE COMMENT""******************************************************* 2 * System Name : API for RX62Nxx 3 * File Name : r_pdl_common_defs_RX62Nxx.h 4 * Version : 1.02 5 * Contents : API common definitions 6 * Customer : 7 * Model : 8 * Order : 9 * CPU : RX 10 * Compiler : RXC 11 * OS : Nothing 12 * Programmer : 13 * Note : 14 ************************************************************************ 15 * Copyright, 2011. Renesas Electronics Corporation 16 * and Renesas Solutions Corporation 17 ************************************************************************ 18 * History : 2011.04.08 19 * : Ver 1.02 20 * : CS-5 release. 21 *""FILE COMMENT END""**************************************************/ 22 23 #ifndef R_PDL_COMMON_DEFS_RX62Nxx_H 24 #define R_PDL_COMMON_DEFS_RX62Nxx_H 25 26 #include <stdint.h> 27 #include <stdbool.h> 28 #include <machine.h> 29 #include <stddef.h> 30 #include <iorx62n.h> 31 32 /* Callback function type */ 33 typedef void (* VoidCallBackFunc)(void); 34 35 /* The supported MCU group */ 36 #define PDL_MCU_GROUP RX62N 37 38 /* The highest interrupt priority level */ 39 #define IPL_MAX 15 40 41 /* Use the I/O register area to indicate that a callback function pointer is not to be used */ 42 #define PDL_NO_FUNC (VoidCallBackFunc)0x00080000ul 43 /* Use the ROM area to indicate that a data pointer is not to be used */ 44 #define PDL_NO_PTR (void *)0xFFFFFFFCul 45 /* When no parameters options are required */ 46 #define PDL_NO_DATA 0 47 48 /* Shared global variables */ 49 extern volatile uint32_t rpdl_CGC_f_pclk; 50 extern volatile uint32_t rpdl_CGC_f_iclk; 51 extern volatile uint32_t rpdl_CGC_f_bclk; 52 extern volatile uint8_t rpdl_INTC_brk_command; 53 extern volatile uint8_t rpdl_INTC_brk_data8; 54 extern volatile uint32_t rpdl_INTC_saved_isp; 55 56 /* Shared functions */ 57 uint8_t rpdl_DMAC_get_channel(const uint8_t); 58 59 /* Utility functions */ 60 uint8_t rpdl_BCD8_to_dec(const uint8_t); 61 uint16_t rpdl_BCD16_to_dec(const uint16_t); 62 bool rpdl_common_BCD8_check(const uint8_t); 63 bool rpdl_common_BCD16_check(const uint16_t); 64 bool rpdl_common_BCD32_check(const uint32_t); 65 66 /* BRK handler command options */ 67 typedef enum { 68 BRK_NO_COMMAND, 69 BRK_START_ADC_10, 70 BRK_START_ADC_10_AND_SLEEP, 71 BRK_SLEEP, 72 BRK_ALL_MODULE_CLOCK_STOP, 73 BRK_STANDBY, 74 BRK_DEEP_STANDBY, 75 BRK_LOAD_FINTV_REGISTER, 76 BRK_WRITE_IPL, 77 BRK_CMT_START, 78 BRK_CMT_STOP 79 } brk_commands; 80 81 /* Bit definitions */ 82 #define BIT_0 0x00000001ul 83 #define BIT_1 0x00000002ul 84 #define BIT_2 0x00000004ul 85 #define BIT_3 0x00000008ul 86 #define BIT_4 0x00000010ul 87 #define BIT_5 0x00000020ul 88 #define BIT_6 0x00000040ul 89 #define BIT_7 0x00000080ul 90 #define BIT_8 0x00000100ul 91 #define BIT_9 0x00000200ul 92 #define BIT_10 0x00000400ul 93 #define BIT_11 0x00000800ul 94 #define BIT_12 0x00001000ul 95 #define BIT_13 0x00002000ul 96 #define BIT_14 0x00004000ul 97 #define BIT_15 0x00008000ul 98 #define BIT_16 0x00010000ul 99 #define BIT_17 0x00020000ul 100 #define BIT_18 0x00040000ul 101 #define BIT_19 0x00080000ul 102 #define BIT_20 0x00100000ul 103 #define BIT_21 0x00200000ul 104 #define BIT_22 0x00400000ul 105 #define BIT_23 0x00800000ul 106 #define BIT_24 0x01000000ul 107 #define BIT_25 0x02000000ul 108 #define BIT_26 0x04000000ul 109 #define BIT_27 0x08000000ul 110 #define BIT_28 0x10000000ul 111 #define BIT_29 0x20000000ul 112 #define BIT_30 0x40000000ul 113 #define BIT_31 0x80000000ul 114 115 #define INV_BIT_0 0xFFFFFFFEul 116 #define INV_BIT_1 0xFFFFFFFDul 117 #define INV_BIT_2 0xFFFFFFFBul 118 #define INV_BIT_3 0xFFFFFFF7ul 119 #define INV_BIT_4 0xFFFFFFEFul 120 #define INV_BIT_5 0xFFFFFFDFul 121 #define INV_BIT_6 0xFFFFFFBFul 122 #define INV_BIT_7 0xFFFFFF7Ful 123 #define INV_BIT_8 0xFFFFFEFFul 124 #define INV_BIT_9 0xFFFFFDFFul 125 #define INV_BIT_10 0xFFFFFBFFul 126 #define INV_BIT_11 0xFFFFF7FFul 127 #define INV_BIT_12 0xFFFFEFFFul 128 #define INV_BIT_13 0xFFFFDFFFul 129 #define INV_BIT_14 0xFFFFBFFFul 130 #define INV_BIT_15 0xFFFF7FFFul 131 #define INV_BIT_16 0xFFFEFFFFul 132 #define INV_BIT_17 0xFFFDFFFFul 133 #define INV_BIT_18 0xFFFBFFFFul 134 #define INV_BIT_19 0xFFF7FFFFul 135 #define INV_BIT_20 0xFFEFFFFFul 136 #define INV_BIT_21 0xFFDFFFFFul 137 #define INV_BIT_22 0xFFBFFFFFul 138 #define INV_BIT_23 0xFF7FFFFFul 139 #define INV_BIT_24 0xFEFFFFFFul 140 #define INV_BIT_25 0xFDFFFFFFul 141 #define INV_BIT_26 0xFBFFFFFFul 142 #define INV_BIT_27 0xF7FFFFFFul 143 #define INV_BIT_28 0xEFFFFFFFul 144 #define INV_BIT_29 0xDFFFFFFFul 145 #define INV_BIT_30 0xBFFFFFFFul 146 #define INV_BIT_31 0x7FFFFFFFul 147 148 /* Interrupt vector numbers */ 149 #define PDL_INTC_VECTOR_BUSERR VECT_BSC_BUSERR 150 #define PDL_INTC_VECTOR_FIFERR VECT_FCU_FIFERR 151 #define PDL_INTC_VECTOR_FRDYI VECT_FCU_FRDYI 152 #define PDL_INTC_VECTOR_SWINT VECT_ICU_SWINT 153 #define PDL_INTC_VECTOR_CMT0 VECT_CMT0_CMI0 154 #define PDL_INTC_VECTOR_CMT1 VECT_CMT1_CMI1 155 #define PDL_INTC_VECTOR_CMT2 VECT_CMT2_CMI2 156 #define PDL_INTC_VECTOR_CMT3 VECT_CMT3_CMI3 157 #define PDL_INTC_VECTOR_EINT VECT_ETHER_EINT 158 #define PDL_INTC_VECTOR_D0FIFO0 VECT_USB0_D0FIFO0 159 #define PDL_INTC_VECTOR_D1FIFO0 VECT_USB0_D1FIFO0 160 #define PDL_INTC_VECTOR_USBI0 VECT_USB0_USBI0 161 #define PDL_INTC_VECTOR_USBR0 VECT_USB_USBR0 162 #define PDL_INTC_VECTOR_D0FIFO1 VECT_USB1_D0FIFO1 163 #define PDL_INTC_VECTOR_D1FIFO1 VECT_USB1_D1FIFO1 164 #define PDL_INTC_VECTOR_USBI1 VECT_USB1_USBI1 165 #define PDL_INTC_VECTOR_USBR1 VECT_USB_USBR1 166 #define PDL_INTC_VECTOR_SPEI0 VECT_RSPI0_SPEI0 167 #define PDL_INTC_VECTOR_SPRI0 VECT_RSPI0_SPRI0 168 #define PDL_INTC_VECTOR_SPTI0 VECT_RSPI0_SPTI0 169 #define PDL_INTC_VECTOR_SPII0 VECT_RSPI0_SPII0 170 #define PDL_INTC_VECTOR_SPEI1 VECT_RSPI1_SPEI1 171 #define PDL_INTC_VECTOR_SPRI1 VECT_RSPI1_SPRI1 172 #define PDL_INTC_VECTOR_SPTI1 VECT_RSPI1_SPTI1 173 #define PDL_INTC_VECTOR_SPII1 VECT_RSPI1_SPII1 174 #define PDL_INTC_VECTOR_ERS0 VECT_CAN0_ERS0 175 #define PDL_INTC_VECTOR_RXF0 VECT_CAN0_RXF0 176 #define PDL_INTC_VECTOR_TXF0 VECT_CAN0_TXF0 177 #define PDL_INTC_VECTOR_RXM0 VECT_CAN0_RXM0 178 #define PDL_INTC_VECTOR_TXM0 VECT_CAN0_TXM0 179 #define PDL_INTC_VECTOR_PRD VECT_RTC_PRD 180 #define PDL_INTC_VECTOR_CUP VECT_RTC_CUP 181 #define PDL_INTC_VECTOR_ALM VECT_RTC_ALM 182 #define PDL_INTC_VECTOR_IRQ0 VECT_ICU_IRQ0 183 #define PDL_INTC_VECTOR_IRQ1 VECT_ICU_IRQ1 184 #define PDL_INTC_VECTOR_IRQ2 VECT_ICU_IRQ2 185 #define PDL_INTC_VECTOR_IRQ3 VECT_ICU_IRQ3 186 #define PDL_INTC_VECTOR_IRQ4 VECT_ICU_IRQ4 187 #define PDL_INTC_VECTOR_IRQ5 VECT_ICU_IRQ5 188 #define PDL_INTC_VECTOR_IRQ6 VECT_ICU_IRQ6 189 #define PDL_INTC_VECTOR_IRQ7 VECT_ICU_IRQ7 190 #define PDL_INTC_VECTOR_IRQ8 VECT_ICU_IRQ8 191 #define PDL_INTC_VECTOR_IRQ9 VECT_ICU_IRQ9 192 #define PDL_INTC_VECTOR_IRQ10 VECT_ICU_IRQ10 193 #define PDL_INTC_VECTOR_IRQ11 VECT_ICU_IRQ11 194 #define PDL_INTC_VECTOR_IRQ12 VECT_ICU_IRQ12 195 #define PDL_INTC_VECTOR_IRQ13 VECT_ICU_IRQ13 196 #define PDL_INTC_VECTOR_IRQ14 VECT_ICU_IRQ14 197 #define PDL_INTC_VECTOR_IRQ15 VECT_ICU_IRQ15 198 #define PDL_INTC_VECTOR_WOVI VECT_WDT_WOVI 199 #define PDL_INTC_VECTOR_ADI0 VECT_AD0_ADI0 200 #define PDL_INTC_VECTOR_ADI1 VECT_AD1_ADI1 201 #define PDL_INTC_VECTOR_ADI12_0 VECT_S12AD_ADI 202 #define PDL_INTC_VECTOR_TGIA0 VECT_MTU0_TGIA0 203 #define PDL_INTC_VECTOR_TGIB0 VECT_MTU0_TGIB0 204 #define PDL_INTC_VECTOR_TGIC0 VECT_MTU0_TGIC0 205 #define PDL_INTC_VECTOR_TGID0 VECT_MTU0_TGID0 206 #define PDL_INTC_VECTOR_TCIV0 VECT_MTU0_TCIV0 207 #define PDL_INTC_VECTOR_TGIE0 VECT_MTU0_TGIE0 208 #define PDL_INTC_VECTOR_TGIF0 VECT_MTU0_TGIF0 209 #define PDL_INTC_VECTOR_TGIA1 VECT_MTU1_TGIA1 210 #define PDL_INTC_VECTOR_TGIB1 VECT_MTU1_TGIB1 211 #define PDL_INTC_VECTOR_TCIV1 VECT_MTU1_TCIV1 212 #define PDL_INTC_VECTOR_TCIU1 VECT_MTU1_TCIU1 213 #define PDL_INTC_VECTOR_TGIA2 VECT_MTU2_TGIA2 214 #define PDL_INTC_VECTOR_TGIB2 VECT_MTU2_TGIB2 215 #define PDL_INTC_VECTOR_TCIV2 VECT_MTU2_TCIV2 216 #define PDL_INTC_VECTOR_TCIU2 VECT_MTU2_TCIU2 217 #define PDL_INTC_VECTOR_TGIA3 VECT_MTU3_TGIA3 218 #define PDL_INTC_VECTOR_TGIB3 VECT_MTU3_TGIB3 219 #define PDL_INTC_VECTOR_TGIC3 VECT_MTU3_TGIC3 220 #define PDL_INTC_VECTOR_TGID3 VECT_MTU3_TGID3 221 #define PDL_INTC_VECTOR_TCIV3 VECT_MTU3_TCIV3 222 #define PDL_INTC_VECTOR_TGIA4 VECT_MTU4_TGIA4 223 #define PDL_INTC_VECTOR_TGIB4 VECT_MTU4_TGIB4 224 #define PDL_INTC_VECTOR_TGIC4 VECT_MTU4_TGIC4 225 #define PDL_INTC_VECTOR_TGID4 VECT_MTU4_TGID4 226 #define PDL_INTC_VECTOR_TCIV4 VECT_MTU4_TCIV4 227 #define PDL_INTC_VECTOR_TGIU5 VECT_MTU5_TGIU5 228 #define PDL_INTC_VECTOR_TGIV5 VECT_MTU5_TGIV5 229 #define PDL_INTC_VECTOR_TGIW5 VECT_MTU5_TGIW5 230 #define PDL_INTC_VECTOR_TGIA6 VECT_MTU6_TGIA6 231 #define PDL_INTC_VECTOR_TGIB6 VECT_MTU6_TGIB6 232 #define PDL_INTC_VECTOR_TGIC6 VECT_MTU6_TGIC6 233 #define PDL_INTC_VECTOR_TGID6 VECT_MTU6_TGID6 234 #define PDL_INTC_VECTOR_TCIV6 VECT_MTU6_TCIV6 235 #define PDL_INTC_VECTOR_TGIE6 VECT_MTU6_TGIE6 236 #define PDL_INTC_VECTOR_TGIF6 VECT_MTU6_TGIF6 237 #define PDL_INTC_VECTOR_TGIA7 VECT_MTU7_TGIA7 238 #define PDL_INTC_VECTOR_TGIB7 VECT_MTU7_TGIB7 239 #define PDL_INTC_VECTOR_TCIV7 VECT_MTU7_TCIV7 240 #define PDL_INTC_VECTOR_TCIU7 VECT_MTU7_TCIU7 241 #define PDL_INTC_VECTOR_TGIA8 VECT_MTU8_TGIA8 242 #define PDL_INTC_VECTOR_TGIB8 VECT_MTU8_TGIB8 243 #define PDL_INTC_VECTOR_TCIV8 VECT_MTU8_TCIV8 244 #define PDL_INTC_VECTOR_TCIU8 VECT_MTU8_TCIU8 245 #define PDL_INTC_VECTOR_TGIA9 VECT_MTU9_TGIA9 246 #define PDL_INTC_VECTOR_TGIB9 VECT_MTU9_TGIB9 247 #define PDL_INTC_VECTOR_TGIC9 VECT_MTU9_TGIC9 248 #define PDL_INTC_VECTOR_TGID9 VECT_MTU9_TGID9 249 #define PDL_INTC_VECTOR_TCIV9 VECT_MTU9_TCIV9 250 #define PDL_INTC_VECTOR_TGIA10 VECT_MTU10_TGIA10 251 #define PDL_INTC_VECTOR_TGIB10 VECT_MTU10_TGIB10 252 #define PDL_INTC_VECTOR_TGIC10 VECT_MTU10_TGIC10 253 #define PDL_INTC_VECTOR_TGID10 VECT_MTU10_TGID10 254 #define PDL_INTC_VECTOR_TCIV10 VECT_MTU10_TCIV10 255 #define PDL_INTC_VECTOR_TGIU11 VECT_MTU11_TGIU11 256 #define PDL_INTC_VECTOR_TGIV11 VECT_MTU11_TGIV11 257 #define PDL_INTC_VECTOR_TGIW11 VECT_MTU11_TGIW11 258 #define PDL_INTC_VECTOR_OEI1 VECT_POE_OEI1 259 #define PDL_INTC_VECTOR_OEI2 VECT_POE_OEI2 260 #define PDL_INTC_VECTOR_OEI3 VECT_POE_OEI3 261 #define PDL_INTC_VECTOR_OEI4 VECT_POE_OEI4 262 #define PDL_INTC_VECTOR_CMIA0 VECT_TMR0_CMIA0 263 #define PDL_INTC_VECTOR_CMIB0 VECT_TMR0_CMIB0 264 #define PDL_INTC_VECTOR_OVI0 VECT_TMR0_OVI0 265 #define PDL_INTC_VECTOR_CMIA1 VECT_TMR1_CMIA1 266 #define PDL_INTC_VECTOR_CMIB1 VECT_TMR1_CMIB1 267 #define PDL_INTC_VECTOR_OVI1 VECT_TMR1_OVI1 268 #define PDL_INTC_VECTOR_CMIA2 VECT_TMR2_CMIA2 269 #define PDL_INTC_VECTOR_CMIB2 VECT_TMR2_CMIB2 270 #define PDL_INTC_VECTOR_OVI2 VECT_TMR2_OVI2 271 #define PDL_INTC_VECTOR_CMIA3 VECT_TMR3_CMIA3 272 #define PDL_INTC_VECTOR_CMIB3 VECT_TMR3_CMIB3 273 #define PDL_INTC_VECTOR_OVI3 VECT_TMR3_OVI3 274 #define PDL_INTC_VECTOR_DMAC0I VECT_DMAC_DMAC0I 275 #define PDL_INTC_VECTOR_DMAC1I VECT_DMAC_DMAC1I 276 #define PDL_INTC_VECTOR_DMAC2I VECT_DMAC_DMAC2I 277 #define PDL_INTC_VECTOR_DMAC3I VECT_DMAC_DMAC3I 278 #define PDL_INTC_VECTOR_EXDMAC0I VECT_EXDMAC_EXDMAC0I 279 #define PDL_INTC_VECTOR_EXDMAC1I VECT_EXDMAC_EXDMAC1I 280 #define PDL_INTC_VECTOR_ERI0 VECT_SCI0_ERI0 281 #define PDL_INTC_VECTOR_RXI0 VECT_SCI0_RXI0 282 #define PDL_INTC_VECTOR_TXI0 VECT_SCI0_TXI0 283 #define PDL_INTC_VECTOR_TEI0 VECT_SCI0_TEI0 284 #define PDL_INTC_VECTOR_ERI1 VECT_SCI1_ERI1 285 #define PDL_INTC_VECTOR_RXI1 VECT_SCI1_RXI1 286 #define PDL_INTC_VECTOR_TXI1 VECT_SCI1_TXI1 287 #define PDL_INTC_VECTOR_TEI1 VECT_SCI1_TEI1 288 #define PDL_INTC_VECTOR_ERI2 VECT_SCI2_ERI2 289 #define PDL_INTC_VECTOR_RXI2 VECT_SCI2_RXI2 290 #define PDL_INTC_VECTOR_TXI2 VECT_SCI2_TXI2 291 #define PDL_INTC_VECTOR_TEI2 VECT_SCI2_TEI2 292 #define PDL_INTC_VECTOR_ERI3 VECT_SCI3_ERI3 293 #define PDL_INTC_VECTOR_RXI3 VECT_SCI3_RXI3 294 #define PDL_INTC_VECTOR_TXI3 VECT_SCI3_TXI3 295 #define PDL_INTC_VECTOR_TEI3 VECT_SCI3_TEI3 296 #define PDL_INTC_VECTOR_ERI5 VECT_SCI5_ERI5 297 #define PDL_INTC_VECTOR_RXI5 VECT_SCI5_RXI5 298 #define PDL_INTC_VECTOR_TXI5 VECT_SCI5_TXI5 299 #define PDL_INTC_VECTOR_TEI5 VECT_SCI5_TEI5 300 #define PDL_INTC_VECTOR_ERI6 VECT_SCI6_ERI6 301 #define PDL_INTC_VECTOR_RXI6 VECT_SCI6_RXI6 302 #define PDL_INTC_VECTOR_TXI6 VECT_SCI6_TXI6 303 #define PDL_INTC_VECTOR_TEI6 VECT_SCI6_TEI6 304 #define PDL_INTC_VECTOR_ICEEI0 VECT_RIIC0_ICEEI0 305 #define PDL_INTC_VECTOR_ICRXI0 VECT_RIIC0_ICRXI0 306 #define PDL_INTC_VECTOR_ICTXI0 VECT_RIIC0_ICTXI0 307 #define PDL_INTC_VECTOR_ICTEI0 VECT_RIIC0_ICTEI0 308 #define PDL_INTC_VECTOR_ICEEI1 VECT_RIIC1_ICEEI1 309 #define PDL_INTC_VECTOR_ICRXI1 VECT_RIIC1_ICRXI1 310 #define PDL_INTC_VECTOR_ICTXI1 VECT_RIIC1_ICTXI1 311 #define PDL_INTC_VECTOR_ICTEI1 VECT_RIIC1_ICTEI1 312 313 #endif 314 315 /* End of file */ 316