1 /*
2  * Copyright (c) 2022 OpenLuat & AirM2M
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a copy of
5  * this software and associated documentation files (the "Software"), to deal in
6  * the Software without restriction, including without limitation the rights to
7  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
8  * the Software, and to permit persons to whom the Software is furnished to do so,
9  * subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in all
12  * copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
16  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
17  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
18  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20  */
21 
22 #ifndef __RESOURCE_MAP_H__
23 #define __RESOURCE_MAP_H__
24 #include "io_map.h"
25 #define CORE_TICK_TIM 7
26 #define CORE_TICK_IRQ TIM0_7_IRQn
27 #define CORE_TICK_1US   (48)
28 #define CORE_TICK_1MS   (48000)
29 #define CORE_TICK_1S        (48000000)
30 #define CORE_TICK_IRQ_LEVEL 1
31 #define HWTIMER_IRQ_LEVEL   0
32 
33 #define SYS_TIMER_TIM 6
34 #define SYS_TIMER_IRQ TIM0_6_IRQn
35 #define SYS_TIMER_1US   (48)
36 #define SYS_TIMER_1MS   (48000)
37 #define SYS_TIMER_1S    (48000000)
38 #define SYS_TIMER_IRQ_LEVEL 6
39 
40 #define DBG_UART_ID UART_ID0
41 #define DBG_UART_BR 1500000
42 #define BL_UART_BR 3000000
43 #define DBG_UART_IRQ_LEVEL 6
44 #define DBG_UART_TX_DMA_STREAM  DMA1_STREAM_2
45 #define DBG_UART_RX_DMA_STREAM  DMA1_STREAM_2
46 #define DBG_UART_TX_DMA_CHANNEL SYSCTRL_PHER_CTRL_DMA_CHx_IF_UART0_TX
47 #define DBG_UART_RX_DMA_CHANNEL SYSCTRL_PHER_CTRL_DMA_CHx_IF_UART0_RX
48 
49 #define EFLASH_QSPI_TX_DMA_STREAM DMA1_STREAM_1
50 #define DAC_TX_DMA_STREAM       DMA1_STREAM_0
51 #define DCMI_RX_DMA_STREAM      DMA1_STREAM_3
52 #define FLASH_SPI_TX_DMA_STREAM DMA1_STREAM_4
53 #define FLASH_SPI_RX_DMA_STREAM DMA1_STREAM_5
54 #define LCD_SPI_TX_DMA_STREAM   DMA1_STREAM_6
55 #define LCD_SPI_RX_DMA_STREAM   DMA1_STREAM_7
56 
57 #define LUATOS_TASK_PRO     (configMAX_PRIORITIES - 2)
58 #define HW_TASK_PRO     (configMAX_PRIORITIES - 1)
59 #define SERVICE_TASK_PRO        (configMAX_PRIORITIES - 4)
60 #endif
61