1 /** 2 **************************************************************************************** 3 * 4 * @file rwip_config.h 5 * 6 * @brief Configuration of the RW IP SW 7 * 8 * Copyright (C) RivieraWaves 2009-2015 9 * 10 * 11 **************************************************************************************** 12 */ 13 14 #ifndef RWIP_CONFIG_H_ 15 #define RWIP_CONFIG_H_ 16 /** 17 **************************************************************************************** 18 * @addtogroup ROOT 19 * @{ 20 * 21 * Information about RW SW IP options and flags 22 * 23 * BT_DUAL_MODE BT/BLE Dual Mode 24 * BT_STD_MODE BT Only 25 * BLE_STD_MODE BLE Only 26 * 27 * BT_EMB_PRESENT BT controller exists 28 * BLE_EMB_PRESENT BLE controller exists 29 * BLE_HOST_PRESENT BLE host exists 30 * 31 * @name RW Stack Configuration 32 * @{ 33 **************************************************************************************** 34 */ 35 #define CFG_HOST 36 #define CFG_BLE 37 #define CFG_AHITLx 38 #define CFG_HCITL 39 #define CFG_APP 40 #define CFG_NVDS 41 #define CFG_DBGx 42 #define CFG_ALLROLESx //CFG_BROADCASTER//CFG_PERIPHERAL 43 #define CFG_PERIPHERAL 44 #define CFG_ATTS 45 #define CFG_ATTC 46 47 #define CFG_SLEEP 48 #define CFG_UART_ENABLE 49 50 51 #define CFG_APP_SEC 52 #define CFG_APP_USER 53 //#define CFG_PRF_BASS 54 //#define CFG_APP_BATT 55 #define CFG_PRF_HTPTx 56 /*支持的最大连接数*/ 57 #define CFG_CON 1 58 59 60 #define CFG_APP_HTx 61 #define CFG_PRF 62 #define CFG_NB_PRF 1 //1 63 64 65 66 #if defined(CFG_DBG) 67 #define PLF_DEBUG 1 68 #else //CFG_DBG 69 #define PLF_DEBUG 0 70 #endif //CFG_DBG 71 72 /* 73 * DEFINES 74 **************************************************************************************** 75 */ 76 77 /******************************************************************************************/ 78 /* ------------------------- QUALIFICATION FLAG ------------------------------------*/ 79 /******************************************************************************************/ 80 //Downgrade the stack to version 4.0 /*harry modify: if only support bt4.0, let it be 1*/ 81 #define BLE_QUALIF 0 82 83 84 /******************************************************************************************/ 85 /* -------------------------- GENERAL SETUP --------------------------------------*/ 86 /******************************************************************************************/ 87 88 /// Flag indicating if stack is compiled in dual or single mode 89 #if defined(CFG_BT) 90 #define BLE_STD_MODE 0 91 #if defined(CFG_BLE) 92 #define BT_DUAL_MODE 1 93 #define BT_STD_MODE 0 94 #else // CFG_BLE 95 #define BT_DUAL_MODE 0 96 #define BT_STD_MODE 1 97 #endif // CFG_BLE 98 #elif defined(CFG_BLE) 99 #define BT_DUAL_MODE 0 100 #define BT_STD_MODE 0 101 #define BLE_STD_MODE 1 102 #endif // CFG_BT 103 104 /******************************************************************************************/ 105 /* ------------------------- STACK PARTITIONING -----------------------------------*/ 106 /******************************************************************************************/ 107 108 #if (BT_DUAL_MODE) 109 #define BT_EMB_PRESENT 1 110 #define BLE_EMB_PRESENT 1 111 #define HCI_PRESENT 1 112 #define BLE_HOST_PRESENT 0 113 #define BLE_APP_PRESENT 0 114 #elif (BT_STD_MODE) 115 #define BT_EMB_PRESENT 1 116 #define BLE_EMB_PRESENT 0 117 #define HCI_PRESENT 1 118 #define BLE_HOST_PRESENT 0 119 #define BLE_APP_PRESENT 0 120 #elif (BLE_STD_MODE) 121 #define BT_EMB_PRESENT 0 122 #define HCI_PRESENT 1 123 #if defined(CFG_EMB) 124 #define BLE_EMB_PRESENT 1 125 #else 126 #define BLE_EMB_PRESENT 0 127 #endif //CFG_EMB 128 #if defined(CFG_HOST) 129 #define BLE_HOST_PRESENT 1 130 #else 131 #define BLE_HOST_PRESENT 0 132 #endif //CFG_HOST 133 #if defined(CFG_APP) 134 #define BLE_APP_PRESENT 1 135 #else 136 #define BLE_APP_PRESENT 0 137 #endif //CFG_APP 138 #endif // BT_DUAL_MODE / BT_STD_MODE / BLE_STD_MODE 139 140 #define EA_PRESENT (BT_EMB_PRESENT || BLE_EMB_PRESENT) 141 142 /******************************************************************************************/ 143 /* ------------------------- INTERFACES DEFINITIONS -------------------------------*/ 144 /******************************************************************************************/ 145 146 /// Application Host Interface 147 #if defined(CFG_AHITL) 148 #define AHI_TL_SUPPORT 1 149 #else // defined(CFG_AHITL) 150 #define AHI_TL_SUPPORT 0 151 #endif // defined(CFG_AHITL) 152 153 154 /// Host Controller Interface Support (defines if HCI parser is present or not) 155 #if defined(CFG_HCITL) 156 #define HCI_TL_SUPPORT 1 157 #else //defined(CFG_HCITL) 158 #define HCI_TL_SUPPORT 0 159 #endif //defined(CFG_HCITL) 160 161 162 #if BLE_HOST_PRESENT 163 #if BLE_EMB_PRESENT 164 #define H4TL_SUPPORT (AHI_TL_SUPPORT) 165 #else // !BLE_EMB_PRESENT 166 #define H4TL_SUPPORT ((AHI_TL_SUPPORT) + (HCI_TL_SUPPORT)) 167 #endif // BLE_EMB_PRESENT 168 #else // !BLE_HOST_PRESENT 169 #define H4TL_SUPPORT (HCI_TL_SUPPORT) 170 #endif // BLE_HOST_PRESENT 171 172 /// TCI LMP trace support 173 #define TCI_LMP_ENABLED 0 174 175 /******************************************************************************************/ 176 /* -------------------------- BLE COMMON DEFINITIONS ------------------------------*/ 177 /******************************************************************************************/ 178 /// Kernel Heap memory sized reserved for allocate dynamically connection environment 179 #define KE_HEAP_MEM_RESERVED (4) 180 181 #if defined(CFG_BLE) 182 /// Application role definitions 183 #define BLE_BROADCASTER (defined(CFG_BROADCASTER) || defined(CFG_ALLROLES)) 184 #define BLE_OBSERVER (defined(CFG_OBSERVER) || defined(CFG_ALLROLES)) 185 #define BLE_PERIPHERAL (defined(CFG_PERIPHERAL) || defined(CFG_ALLROLES)) 186 #define BLE_CENTRAL (defined(CFG_CENTRAL) || defined(CFG_ALLROLES)) 187 188 #if (!BLE_BROADCASTER) && (!BLE_OBSERVER) && (!BLE_PERIPHERAL) && (!BLE_CENTRAL) 189 #error "No application role defined" 190 #endif /* #if (!BLE_BROADCASTER) && (!BLE_OBSERVER) && (!BLE_PERIPHERAL) && (!BLE_CENTRAL) */ 191 192 193 /// Maximum number of simultaneous connections 194 #if (BLE_CENTRAL) 195 #define BLE_CONNECTION_MAX (CFG_CON) 196 #elif (BLE_PERIPHERAL) 197 #define BLE_CONNECTION_MAX (1) 198 #else 199 #define BLE_CONNECTION_MAX (0) 200 #endif /* #if (BLE_CENTRAL) */ 201 202 /// Maximum number of audio connections 203 #if defined(CFG_AUDIO) 204 #if (BLE_CENTRAL || BLE_PERIPHERAL) 205 #define BLE_AUDIO (1) 206 #define BLE_AUDIO_CONNECT_MAX (CFG_AUDIO_CON) 207 #else 208 #define BLE_AUDIO (0) 209 #endif /*(BLE_CENTRAL || BLE_PERIPHERAL)*/ 210 #else 211 #define BLE_AUDIO (0) 212 #endif /*defined(CFG_AUDIO)*/ 213 214 /// Number of TX data buffer 215 #if ((BLE_CONNECTION_MAX == 1) || (BLE_CONNECTION_MAX == 0)) 216 #if (BLE_CENTRAL || BLE_PERIPHERAL) 217 #define BLE_TX_BUFF_DATA (3) 218 #else 219 #define BLE_TX_BUFF_DATA (0) 220 #endif //(BLE_CENTRAL || BLE_PERIPHERAL) 221 #else 222 #define BLE_TX_BUFF_DATA (BLE_CONNECTION_MAX) // Worst case (one way 251 bytes every 7.5ms) 223 #endif //((BLE_CONNECTION_MAX == 1) || (BLE_CONNECTION_MAX == 0)) 224 225 #if (BLE_CENTRAL || BLE_PERIPHERAL) 226 /// Number of TX advertising buffer 227 #define BLE_TX_BUFF_ADV (3) // Worst case (1 for CONNECT_REQ, 1 for ADV_DATA and 1 for SCAN_RESP_DATA) 228 /// Number of TX control buffer 229 #define BLE_TX_BUFF_CNTL (BLE_CONNECTION_MAX) // Worst case (1 dedicated packet by link) 230 #else 231 /// Margin used for LL fragmentation (DLE feature) 232 //#define BLE_TX_DESC_MARGING_DLE (0) 233 #if (BLE_BROADCASTER) 234 /// Number of TX advertising descriptors 235 #define BLE_TX_BUFF_ADV (2) 236 /// Number of TX control descriptors 237 #define BLE_TX_BUFF_CNTL (0) 238 #else 239 /// Number of TX advertising descriptors 240 #define BLE_TX_BUFF_ADV (1) 241 /// Number of TX control descriptors 242 #define BLE_TX_BUFF_CNTL (0) 243 #endif // BLE_BROADCASTER 244 #endif //(BLE_CENTRAL || BLE_PERIPHERAL) 245 246 /// Number of elements in the TX Descriptor pool 247 // Dedicated for DATA 248 // Worst case (1 packets (251 bytes) fragmented into 27 byte = 10) 249 #define BLE_TX_DESC_DATA ((BLE_TX_BUFF_DATA) * 10) 250 // Dedicated for CONTROL 251 #define BLE_TX_DESC_CNTL (BLE_TX_BUFF_CNTL) 252 // Dedicated for ADVERTISING 253 #define BLE_TX_DESC_ADV (BLE_TX_BUFF_ADV) 254 255 /// Number of TX Buffers 256 #define BLE_TX_BUFFER_CNT (BLE_TX_BUFF_DATA) 257 258 /// Total number of elements in the TX Descriptor pool 259 #define BLE_TX_DESC_CNT (BLE_TX_DESC_CNTL + BLE_TX_DESC_ADV + BLE_TX_DESC_DATA) 260 261 262 /// Number of receive buffers in the RX ring. This number defines the interrupt 263 /// rate during a connection event. An interrupt is asserted every BLE_RX_BUFFER_CNT/2 264 /// reception. This number has an impact on the size of the exchange memory. This number 265 /// may have to be increased when CPU is very slow to free the received data, in order not 266 /// to overflow the RX ring of buffers. 267 268 #if (BLE_CENTRAL || BLE_PERIPHERAL) 269 /// Number of RX Descriptors 270 #define BLE_RX_DESC_CNT (8) 271 #elif (BLE_BROADCASTER) 272 #define BLE_RX_DESC_CNT (1) 273 #else 274 #define BLE_RX_DESC_CNT (4) 275 #endif //(BLE_CENTRAL || BLE_PERIPHERAL) 276 /// Number of RX Buffers 277 #define BLE_RX_BUFFER_CNT (BLE_RX_DESC_CNT) 278 279 /// Max advertising reports before sending the info to the host 280 #define BLE_ADV_REPORTS_MAX 1 281 282 283 /// Define Number of AUDIO TX/RX buffers per voice channel 284 #if (BLE_AUDIO) 285 #if defined(CFG_AUDIO_AOAHI) 286 // 3 buffers per connection using audio over AHI TL 287 #define BLE_NB_INPUT_BUFF_PER_VC (3) 288 #define BLE_NB_OUTPUT_BUFF_PER_VC (3) 289 #else // defined(CFG_AUDIO_AOAHI) 290 // 2 buffers if a codec is available 291 #define BLE_NB_INPUT_BUFF_PER_VC (2) 292 #define BLE_NB_OUTPUT_BUFF_PER_VC (2) 293 #endif // defined(CFG_AUDIO_AOAHI) 294 // add one more buffer for fake reception and fake transmit 295 #define BLE_TX_AUDIO_BUFFER_CNT ((BLE_AUDIO_CONNECT_MAX * BLE_NB_INPUT_BUFF_PER_VC) + 1) 296 #define BLE_RX_AUDIO_BUFFER_CNT ((BLE_AUDIO_CONNECT_MAX * BLE_NB_OUTPUT_BUFF_PER_VC) + 1) 297 #endif // (BLE_AUDIO) 298 #endif //defined(CFG_BLE) 299 300 301 /******************************************************************************************/ 302 /* -------------------------- DISPLAY SETUP -------------------------------------*/ 303 /******************************************************************************************/ 304 305 /// Display controller enable/disable 306 #if defined(CFG_DISPLAY) 307 #define DISPLAY_SUPPORT 1 308 #else 309 #define DISPLAY_SUPPORT 0 310 #endif //CFG_DISPLAY 311 312 313 /******************************************************************************************/ 314 /* -------------------------- RTC SETUP -------------------------------------*/ 315 /******************************************************************************************/ 316 317 /// RTC enable/disable 318 #if defined(CFG_RTC) 319 #define RTC_SUPPORT 1 320 #else 321 #define RTC_SUPPORT 0 322 #endif //CFG_DISPLAY 323 324 /******************************************************************************************/ 325 /* -------------------------- PS2 SETUP -------------------------------------*/ 326 /******************************************************************************************/ 327 328 /// PS2 enable/disable 329 #if defined(CFG_PS2) 330 #define PS2_SUPPORT 1 331 #else 332 #define PS2_SUPPORT 0 333 #endif //CFG_PS2 334 335 336 /******************************************************************************************/ 337 /* ------------------------- DEEP SLEEP SETUP -------------------------------------*/ 338 /******************************************************************************************/ 339 340 /// DEEP SLEEP enable 341 #if defined(CFG_SLEEP) && (BLE_EMB_PRESENT || BT_EMB_PRESENT) 342 #define DEEP_SLEEP 1 343 #else 344 #define DEEP_SLEEP 0 345 #endif /* CFG_SLEEP */ 346 347 /// Use 32K Hz Clock if set to 1 else 32,768k is used 348 #define HZ32000 0 349 350 /// Time to wake-up Radio Module (in us) 351 #define SLEEP_RM_WAKEUP_DELAY 625 352 /// Time for stabilization of the high frequency oscillator following a sleep-timer expiry (in us) 353 #define SLEEP_OSC_NORMAL_WAKEUP_DELAY 5000 354 /// Time for stabilization of the high frequency oscillator following an external wake-up request (in us) 355 #define SLEEP_OSC_EXT_WAKEUP_DELAY 5000 356 357 358 /******************************************************************************************/ 359 /* ------------------------- PROCESSOR SETUP -------------------------------------*/ 360 /******************************************************************************************/ 361 362 /// 8 BIT processor 363 #define PROC_8BITS 0 364 365 /******************************************************************************************/ 366 /* -------------------------- RADIO SETUP ----------------------------------------*/ 367 /******************************************************************************************/ 368 369 /// Power control features 370 #define RF_TXPWR 1 371 /// Class of device 372 #define RF_CLASS1 0 373 374 /******************************************************************************************/ 375 /* ------------------------- COEXISTENCE SETUP ------------------------------------*/ 376 /******************************************************************************************/ 377 378 /// WLAN Coexistence 379 #if 1/*defined(CFG_WLAN_COEX)*/ 380 #define RW_WLAN_COEX 1 381 #define RW_WLAN_COEX_TEST (defined(CFG_WLAN_COEX_TEST)) 382 #else 383 #define RW_WLAN_COEX 0 384 #define RW_WLAN_COEX_TEST 0 385 #endif // defined(CFG_WLAN_COEX) 386 387 /// MWS Coexistence 388 #if defined(CFG_MWS_COEX) 389 #define RW_MWS_COEX 1 390 #define RW_MWS_COEX_TEST (defined(CFG_MWS_COEX_TEST)) 391 #else 392 #define RW_MWS_COEX 0 393 #define RW_MWS_COEX_TEST 0 394 #endif // defined(CFG_MWS_COEX) 395 396 /******************************************************************************************/ 397 /* ------------------------- DM ARBITRATION SETUP ---------------------------------*/ 398 /******************************************************************************************/ 399 400 #if BT_DUAL_MODE 401 /** 402 * Dual mode arbitration margin (in us) 403 * 404 * BREDRMARGIN/BLEMARGIN corresponding to a timing value that allows the RF to power-down properly before any other 405 * activity. This is radio dependent. 406 */ 407 #define DM_ARB_MARGIN 40 408 #endif //BT_DUAL_MODE 409 410 /******************************************************************************************/ 411 /* ------------------------- CHANNEL ASSESSMENT SETUP -----------------------------*/ 412 /******************************************************************************************/ 413 414 /// Channel Assessment 415 #if defined(CFG_BLE) 416 #if (defined(CFG_CHNL_ASSESS) && BLE_CENTRAL) 417 #define BLE_CHNL_ASSESS (1) 418 #else 419 #define BLE_CHNL_ASSESS (0) 420 #endif //(defined(CFG_CHNL_ASSESS) && BLE_CENTRAL) 421 #endif //defined(CFG_BLE) 422 423 /******************************************************************************************/ 424 /* -------------------- SECURE CONNECTIONS SETUP --------------------------------------*/ 425 /******************************************************************************************/ 426 #if defined(CFG_SEC_CON) 427 #define SECURE_CONNECTIONS (1) 428 #if defined(CFG_ECC_16_BITS_ALGO) 429 #define ECC_MULT_ALGO_TYPE (16) 430 #else // !defined(CFG_ECC_16_BITS_ALGO) 431 #define ECC_MULT_ALGO_TYPE (32) 432 #endif // defined(CFG_ECC_16_BITS_ALGO) 433 #if defined(CFG_CRYPTO_UT) 434 #define CRYPTO_UT (1) 435 #else //defined(CFG_CRYPTO_UT) 436 #define CRYPTO_UT (0) 437 #endif //defined(CFG_CRYPTO_UT) 438 #else // !defined(CFG_SEC_CON) 439 #define SECURE_CONNECTIONS (0) 440 #define CRYPTO_UT (0) 441 #endif // defined(CFG_SEC_CON) 442 443 /******************************************************************************************/ 444 /* ---------------------------- AUDIO SETUP ------------------------------------*/ 445 /******************************************************************************************/ 446 447 /// Flag indicating if audio is available or not 448 #if defined(CFG_HW_AUDIO) 449 #define HW_AUDIO 1 450 #else // defined (CFG_BLE_AUDIO) 451 #define HW_AUDIO 0 452 #endif // defined (CFG_BLE_AUDIO) 453 454 /******************************************************************************************/ 455 /* -------------------------- DEBUG SETUP ----------------------------------------*/ 456 /******************************************************************************************/ 457 458 /// Flag indicating if debug mode is activated or not 459 #if defined(CFG_DBG) 460 #define RW_DEBUG ((BLE_EMB_PRESENT) || (BT_EMB_PRESENT) || (BLE_HOST_PRESENT)) 461 #if (BLE_EMB_PRESENT || BT_EMB_PRESENT) 462 #define RW_SWDIAG 1 463 #else 464 #define RW_SWDIAG 0 465 #endif 466 #define KE_PROFILING 1 467 #else 468 #define RW_DEBUG 0 469 #define RW_SWDIAG 0 470 #define KE_PROFILING 0 471 #endif /* CFG_DBG */ 472 473 /// Flag indicating if Read/Write memory commands are supported or not 474 #if defined(CFG_DBG_MEM) 475 #define RW_DEBUG_MEM 1 476 #else //CFG_DBG_MEM 477 #define RW_DEBUG_MEM 0 478 #endif //CFG_DBG_MEM 479 480 /// Flag indicating if Flash debug commands are supported or not 481 #if defined(CFG_DBG_FLASH) 482 #define RW_DEBUG_FLASH 1 483 #else //CFG_DBG_FLASH 484 #define RW_DEBUG_FLASH 0 485 #endif //CFG_DBG_FLASH 486 487 /// Flag indicating if NVDS feature is supported or not 488 #if defined(CFG_DBG_NVDS) 489 #define RW_DEBUG_NVDS 1 490 #else //CFG_DBG_NVDS 491 #define RW_DEBUG_NVDS 0 492 #endif //CFG_DBG_NVDS 493 494 /// Flag indicating if CPU stack profiling commands are supported or not 495 #if defined(CFG_DBG_STACK_PROF) 496 #define RW_DEBUG_STACK_PROF 1 497 #else 498 #define RW_DEBUG_STACK_PROF 0 499 #endif // defined (CFG_DBG_STACK_PROF) 500 501 /// Modem back to back setup 502 #define MODEM2MODEM 0 503 /// Special clock testing 504 #define CLK_WRAPPING 0 505 506 /******************************************************************************************/ 507 /* -------------------------- NVDS SETUP --------------------------------------*/ 508 /******************************************************************************************/ 509 510 /// Flag indicating if NVDS feature is supported or not 511 #if defined(CFG_NVDS) 512 #define NVDS_SUPPORT 1 513 #else //CFG_DBG_NVDS 514 #define NVDS_SUPPORT 0 515 #endif //CFG_DBG_NVDS 516 517 /******************************************************************************************/ 518 /* -------------------------- MISC SETUP --------------------------------------*/ 519 /******************************************************************************************/ 520 /// Manufacturer: RivieraWaves SAS 521 #define RW_COMP_ID 0x0060 522 523 /// Bluetooth technologies version 524 #define RW_BT40_VERSION (6) 525 #define RW_BT41_VERSION (7) 526 #define RW_BT42_VERSION (8) 527 528 /******************************************************************************************/ 529 /* ------------------------- BT / BLE / BLE HL CONFIG -------------------------------*/ 530 /******************************************************************************************/ 531 532 #if (BT_EMB_PRESENT) 533 #include "rwbt_config.h" // bt stack configuration 534 #endif //BT_EMB_PRESENT 535 536 #if (BLE_EMB_PRESENT) || (BLE_HOST_PRESENT) 537 #include "rwble_config.h" // ble stack configuration 538 #endif //BLE_EMB_PRESENT 539 540 #if (BLE_HOST_PRESENT) 541 #include "rwble_hl_config.h" // ble Host stack configuration 542 #endif //BLE_HOST_PRESENT 543 544 #if defined(CFG_AUDIO_AM0) 545 #include "rwam0_config.h" // Audio Mode 0 configuration 546 #endif // defined(CFG_AUDIO_AM0) 547 548 #if defined(CFG_APP) 549 #include "rwapp_config.h" // Audio Mode 0 configuration 550 #endif // defined(CFG_APP) 551 552 553 554 /******************************************************************************************/ 555 /* ------------------------- KERNEL SETUP -------------------------------------*/ 556 /******************************************************************************************/ 557 558 /// Flag indicating Kernel is supported 559 #define KE_SUPPORT (BLE_EMB_PRESENT || BT_EMB_PRESENT || BLE_HOST_PRESENT || BLE_APP_PRESENT) 560 561 562 /// Event types definition 563 enum KE_EVENT_TYPE 564 { 565 #if DISPLAY_SUPPORT 566 KE_EVENT_DISPLAY , 567 #endif //DISPLAY_SUPPORT 568 569 #if RTC_SUPPORT 570 KE_EVENT_RTC_1S_TICK , 571 #endif //RTC_SUPPORT 572 573 #ifdef CFG_AUDIO_RSA 574 KE_EVENT_RSA_SIGN, 575 #endif // CFG_AUDIO_RSA 576 577 #if SECURE_CONNECTIONS 578 KE_EVENT_ECC_MULTIPLICATION, 579 #endif // SECURE_CONNECTIONS 580 581 #if BLE_EMB_PRESENT 582 KE_EVENT_BLE_CRYPT , 583 #endif //BLE_EMB_PRESENT 584 585 KE_EVENT_KE_MESSAGE , // 0 586 KE_EVENT_KE_TIMER , // 1 587 588 #if (AHI_TL_SUPPORT) 589 KE_EVENT_AHI_TX_DONE , 590 #endif //(AHI_TL_SUPPORT) 591 592 593 #if H4TL_SUPPORT // 2 594 KE_EVENT_H4TL_TX , 595 #if (BLE_EMB_PRESENT || BT_EMB_PRESENT) 596 KE_EVENT_H4TL_CMD_HDR_RX , 597 KE_EVENT_H4TL_CMD_PLD_RX , 598 #endif //(BLE_EMB_PRESENT || BT_EMB_PRESENT) 599 #endif //H4TL_SUPPORT 600 601 #if (BLE_HOST_PRESENT) 602 #if (BLE_L2CC) 603 KE_EVENT_L2CAP_TX ,// 3 604 #endif //(BLE_L2CC) 605 #endif// (BLE_HOST_PRESENT) 606 607 #if BT_EMB_PRESENT 608 KE_EVENT_BT_PSCAN_PROC , 609 #endif //BT_EMB_PRESENT 610 611 #if BLE_EMB_PRESENT 612 KE_EVENT_BLE_EVT_DEFER , 613 KE_EVENT_BLE_EVT_DELETE , 614 #endif //BLE_EMB_PRESENT 615 616 #if defined(CFG_AUDIO_AOAHI) 617 KE_EVENT_BLE_AUDIO_DEFER , 618 #endif // defined(CFG_AUDIO_AOAHI) 619 620 KE_EVENT_MAX , 621 }; 622 623 /// Tasks types definition 624 enum KE_TASK_TYPE 625 { 626 #if (BT_EMB_PRESENT) //0 627 // BT Controller Tasks44 628 TASK_LM, 629 TASK_LC, 630 TASK_LB, 631 TASK_LD, 632 TASK_HCI, 633 #endif // (BT_EMB_PRESENT) 634 635 #if (BLE_EMB_PRESENT) //0 636 // Link Layer Tasks 637 TASK_LLM , 638 TASK_LLC , 639 TASK_LLD , 640 #endif // (BLE_EMB_PRESENT) 641 642 #if ((BLE_EMB_PRESENT) || (BT_EMB_PRESENT)) //0 643 TASK_DBG, 644 #endif // ((BLE_EMB_PRESENT) || (BT_EMB_PRESENT)) 645 646 #if (DISPLAY_SUPPORT) //0 647 TASK_DISPLAY, 648 #endif // (DISPLAY_SUPPORT) 649 650 #if (BLE_APP_PRESENT) 651 TASK_APP, 652 #endif // (BLE_APP_PRESENT) 653 654 #if (BLE_HOST_PRESENT) 655 TASK_L2CC, // L2CAP Controller Task 656 TASK_GATTM, // Generic Attribute Profile Manager Task 657 TASK_GATTC, // Generic Attribute Profile Controller Task 658 TASK_GAPM, // Generic Access Profile Manager 659 TASK_GAPC, // Generic Access Profile Controller 660 661 // allocate a certain number of profiles task 662 TASK_PRF_MAX = (TASK_GAPC + BLE_NB_PROFILES), 663 664 #ifdef BLE_AUDIO_AM0_TASK 665 TASK_AM0, // BLE Audio Mode 0 Task 666 #endif // BLE_AUDIO_AM0_TASK 667 #endif // (BLE_HOST_PRESENT) 668 669 #if (AHI_TL_SUPPORT) 670 TASK_AHI, 671 #endif // (AHI_TL_SUPPORT) 672 673 /// Maximum number of tasks 674 TASK_MAX, 675 676 TASK_NONE = 0xFF, 677 }; 678 679 /// Kernel memory heaps types. 680 enum 681 { 682 /// Memory allocated for environment variables 683 KE_MEM_ENV, 684 #if (BLE_HOST_PRESENT) 685 /// Memory allocated for Attribute database 686 KE_MEM_ATT_DB, 687 #endif // (BLE_HOST_PRESENT) 688 /// Memory allocated for kernel messages 689 KE_MEM_KE_MSG, 690 /// Non Retention memory block 691 KE_MEM_NON_RETENTION, 692 KE_MEM_BLOCK_MAX, 693 }; 694 695 696 697 #if (BT_EMB_PRESENT) 698 #define BT_HEAP_MSG_SIZE_ BT_HEAP_MSG_SIZE 699 #define BT_HEAP_ENV_SIZE_ BT_HEAP_ENV_SIZE 700 #else 701 #define BT_HEAP_MSG_SIZE_ 0 702 #define BT_HEAP_ENV_SIZE_ 0 703 #endif //BT_EMB_PRESENT 704 705 #if (BLE_EMB_PRESENT) 706 #define BLE_HEAP_MSG_SIZE_ BLE_HEAP_MSG_SIZE 707 #define BLE_HEAP_ENV_SIZE_ BLE_HEAP_ENV_SIZE 708 #else 709 #define BLE_HEAP_MSG_SIZE_ 0 710 #define BLE_HEAP_ENV_SIZE_ 0 711 #endif //BLE_EMB_PRESENT 712 713 #if (BLE_HOST_PRESENT) 714 715 #define BLEHL_HEAP_MSG_SIZE_ BLEHL_HEAP_MSG_SIZE 716 #define BLEHL_HEAP_ENV_SIZE_ BLEHL_HEAP_ENV_SIZE 717 #define BLEHL_HEAP_DB_SIZE_ BLEHL_HEAP_DB_SIZE 718 #else 719 #define BLEHL_HEAP_MSG_SIZE_ 0 720 #define BLEHL_HEAP_ENV_SIZE_ 0 721 #define BLEHL_HEAP_DB_SIZE_ 0 722 #endif //BLE_HOST_PRESENT 723 724 /// Kernel Message Heap 725 #define RWIP_HEAP_MSG_SIZE ( BT_HEAP_MSG_SIZE_ + \ 726 BLE_HEAP_MSG_SIZE_ + \ 727 BLEHL_HEAP_MSG_SIZE_ ) 728 729 /// Number of link in kernel environment 730 #define KE_NB_LINK_IN_HEAP_ENV 1 // 4 by bottle 731 732 /// Size of Environment heap 733 #define RWIP_HEAP_ENV_SIZE ( BT_HEAP_ENV_SIZE_ + \ 734 ( BLE_HEAP_ENV_SIZE_ + \ 735 BLEHL_HEAP_ENV_SIZE_ ) \ 736 * KE_NB_LINK_IN_HEAP_ENV ) 737 738 /// Size of Attribute database heap 739 #define RWIP_HEAP_DB_SIZE ( BLEHL_HEAP_DB_SIZE ) 740 741 /// Size of non retention heap - 512 bytes per ble link plus 4096 bytes for data throughput should be sufficient and should be tuned 742 #if (BLE_EMB_PRESENT || BLE_HOST_PRESENT) 743 #define RWIP_HEAP_NON_RET_SIZE (( 512 * BLE_CONNECTION_MAX ) + 3072) 744 #else 745 #define RWIP_HEAP_NON_RET_SIZE ( 1024 ) 746 #endif 747 748 /// Minimum sleep time to enter in deep sleep (in half slot). 749 #define RWIP_MINIMUM_SLEEP_TIME (1) 750 751 /******************************************************************************************/ 752 /* ------------------------- BT-BLE COEX -----------------------------------*/ 753 /******************************************************************************************/ 754 #if (BLE_EMB_PRESENT || BT_EMB_PRESENT) 755 /// Enable and diable definition for the PTI 756 ///Enable TX busy signal 757 #define RWIP_PTI_TXEN 1 758 ///Disable TX busy signal 759 #define RWIP_PTI_TXDIS 0 760 /// Tx busy position 761 #define RWIP_TXBSY_POS 0 762 763 ///Enable RX busy signal 764 #define RWIP_PTI_RXEN 1 765 ///Disable RX busy signal 766 #define RWIP_PTI_RXDIS 0 767 /// Rx busy position 768 #define RWIP_RXBSY_POS 1 769 770 ///Enable do not abort TX 771 #define RWIP_PTI_DNABORTEN 1 772 ///Disable do not abort TX 773 #define RWIP_PTI_DNABORTDIS 0 774 /// Do not abort busy position 775 #define RWIP_DNABORT_POS 2 776 777 ///Allows Tx operation in the current frame. 778 #define RWIP_MWS_TXEN 0 779 ///Prevent from any Tx operation in the current frame. 780 #define RWIP_MWS_TXDIS 1 781 /// MWS transmit disable position 782 #define RWIP_MWSTXDSB_POS 3 783 784 ///Allows Rx operation in the current frame. 785 #define RWIP_MWS_RXEN 0 786 ///Prevent from any Rx operation in the current frame. 787 #define RWIP_MWS_RXDIS 1 788 /// MWS transmit disable position 789 #define RWIP_MWSRXDSB_POS 4 790 791 /// Bit masking 792 #define RWIP_COEX_BIT_MASK 1 793 794 /// Coex configuration index 795 enum rwip_coex_config_idx 796 { 797 #if (BT_EMB_PRESENT) 798 RWIP_COEX_MSSWITCH_IDX , 799 RWIP_COEX_SNIFFATT_IDX , 800 RWIP_COEX_PAGE_IDX, 801 RWIP_COEX_PSCAN_IDX, 802 RWIP_COEX_INQ_IDX, 803 RWIP_COEX_INQRES_IDX, 804 RWIP_COEX_SCORSVD_IDX, 805 RWIP_COEX_BCAST_IDX, 806 RWIP_COEX_CONNECT_IDX, 807 #endif //#if (BT_EMB_PRESENT) 808 #if (BLE_EMB_PRESENT) 809 RWIP_COEX_CON_IDX, 810 RWIP_COEX_CON_DATA_IDX, 811 RWIP_COEX_ADV_IDX, 812 RWIP_COEX_SCAN_IDX, 813 RWIP_COEX_INIT_IDX, 814 #endif // #if (BLE_EMB_PRESENT) 815 /// Max configuration index 816 RWIP_COEX_CFG_MAX, 817 }; 818 /******************************************************************************************/ 819 /* ------------------------- BT-BLE PRIORITIES -----------------------------------*/ 820 /******************************************************************************************/ 821 /// Priority index definition 822 enum rwip_prio_idx 823 { 824 #if (BT_EMB_PRESENT) 825 /// ACL event default priority 826 RWIP_PRIO_ACL_DFT_IDX, 827 /// ACL event priority with activity 828 RWIP_PRIO_ACL_ACT_IDX, 829 /// ACL Role Switch event default priority 830 RWIP_PRIO_ACL_RSW_IDX, 831 /// ACL sniff event default priority 832 RWIP_PRIO_ACL_SNIFF_DFT_IDX, 833 /// ACL sniff transition event default priority 834 RWIP_PRIO_ACL_SNIFF_TRANS_IDX, 835 #if MAX_NB_SYNC 836 /// SCO event default priority 837 RWIP_PRIO_SCO_DFT_IDX, 838 #endif //MAX_NB_SYNC 839 /// Broadcast ACL event default priority 840 RWIP_PRIO_BCST_DFT_IDX, 841 /// Broadcast ACL event with LMP activity priority 842 RWIP_PRIO_BCST_ACT_IDX, 843 /// CSB RX event default priority 844 RWIP_PRIO_CSB_RX_DFT_IDX, 845 /// CSB TX event default priority 846 RWIP_PRIO_CSB_TX_DFT_IDX, 847 /// Inquiry event default priority 848 RWIP_PRIO_INQ_DFT_IDX, 849 /// Inquiry Scan event default priority 850 RWIP_PRIO_ISCAN_DFT_IDX, 851 /// Page event default priority 852 RWIP_PRIO_PAGE_DFT_IDX, 853 /// Page event default priority 854 RWIP_PRIO_PAGE_1ST_PKT_IDX, 855 /// Page first packet event default priority 856 RWIP_PRIO_PCA_DFT_IDX, 857 /// Page scan event default priority 858 RWIP_PRIO_PSCAN_DFT_IDX, 859 /// Page scan event priority increment when canceled 860 RWIP_PRIO_PSCAN_1ST_PKT_IDX, 861 /// Synchronization Scan event default priority 862 RWIP_PRIO_SSCAN_DFT_IDX, 863 /// Synchronization Train event default priority 864 RWIP_PRIO_STRAIN_DFT_IDX, 865 #endif //#if (BT_EMB_PRESENT) 866 #if (BLE_EMB_PRESENT) 867 /// Default priority for scanning events 868 RWIP_PRIO_SCAN_IDX, 869 /// Default priority for initiating events 870 RWIP_PRIO_INIT_IDX, 871 /// Default priority for Le connection establishment 872 RWIP_PRIO_LE_ESTAB_IDX, 873 /// Default priority for Idle connection 874 RWIP_PRIO_LE_CON_IDLE_IDX, 875 /// Default priority for active connect events 876 RWIP_PRIO_LE_CON_ACT_IDX, 877 /// Default priority for advertising events 878 RWIP_PRIO_ADV_IDX, 879 /// Default priority for advertising high duty cycle events 880 RWIP_PRIO_ADV_HDC_IDX, 881 #endif // #if (BLE_EMB_PRESENT) 882 RWIP_PRIO_IDX_MAX 883 }; 884 /// Default priority value definition 885 enum rwip_prio_dft 886 { 887 #if (BT_EMB_PRESENT) 888 /// ACL event default priority 889 RWIP_PRIO_ACL_DFT = 5, 890 /// ACL event priority with activity 891 RWIP_PRIO_ACL_ACT = 10, 892 /// ACL Role Switch event default priority 893 RWIP_PRIO_ACL_RSW = 20, 894 /// ACL sniff event default priority 895 RWIP_PRIO_ACL_SNIFF_DFT = 15, 896 /// ACL sniff transition event default priority 897 RWIP_PRIO_ACL_SNIFF_TRANS = 10, 898 #if MAX_NB_SYNC 899 /// SCO event default priority 900 RWIP_PRIO_SCO_DFT = 18, 901 #endif //MAX_NB_SYNC 902 /// Broadcast ACL event default priority 903 RWIP_PRIO_BCST_DFT = 5, 904 /// Broadcast ACL event with LMP activity priority 905 RWIP_PRIO_BCST_ACT = 10, 906 /// CSB RX event default priority 907 RWIP_PRIO_CSB_RX_DFT = 10, 908 /// CSB TX event default priority 909 RWIP_PRIO_CSB_TX_DFT = 10, 910 /// Inquiry event default priority 911 RWIP_PRIO_INQ_DFT = 5, 912 /// Inquiry Scan event default priority 913 RWIP_PRIO_ISCAN_DFT = 5, 914 /// Page event default priority 915 RWIP_PRIO_PAGE_DFT = 8, 916 /// Page first packet event default priority 917 RWIP_PRIO_PAGE_1ST_PKT = 20, 918 /// PCA event default priority 919 RWIP_PRIO_PCA_DFT = 20, 920 /// Page scan event default priority 921 RWIP_PRIO_PSCAN_DFT = 8, 922 /// Page scan event priority increment when canceled 923 RWIP_PRIO_PSCAN_1ST_PKT = 20, 924 /// Synchronization Scan event default priority 925 RWIP_PRIO_SSCAN_DFT = 10, 926 /// Synchronization Train event default priority 927 RWIP_PRIO_STRAIN_DFT = 10, 928 #endif //#if (BT_EMB_PRESENT) 929 #if (BLE_EMB_PRESENT) 930 /// Default priority for scanning events 931 RWIP_PRIO_SCAN_DFT = 5, 932 /// Default priority for initiating events 933 RWIP_PRIO_INIT_DFT = 10, 934 /// Default priority for LE connection establishment 935 RWIP_PRIO_LE_ESTAB_DFT = 20, 936 /// Default priority for Idle connection 937 RWIP_PRIO_LE_CON_IDLE_DFT = 10, 938 /// Default priority for active connect events 939 RWIP_PRIO_LE_CON_ACT_DFT = 15, 940 /// Default priority for advertising events 941 RWIP_PRIO_ADV_DFT = 5, 942 /// Default priority for advertising high duty cycle events 943 RWIP_PRIO_ADV_HDC_DFT = 10, 944 #endif // #if (BLE_EMB_PRESENT) 945 /// Max priority 946 RWIP_PRIO_MAX = 31, 947 }; 948 949 /// Default increment value definition 950 enum rwip_incr_dft 951 { 952 #if (BT_EMB_PRESENT) 953 /// ACL event default increment 954 RWIP_INCR_ACL_DFT = 1, 955 /// ACL event increment with activity 956 RWIP_INCR_ACL_ACT = 1, 957 /// ACL Role Switch event default increment 958 RWIP_INCR_ACL_RSW = 1, 959 /// ACL sniff event default increment 960 RWIP_INCR_ACL_SNIFF_DFT = 1, 961 /// ACL sniff transition event default increment 962 RWIP_INCR_ACL_SNIFF_TRANS = 1, 963 #if MAX_NB_SYNC 964 /// SCO event default increment 965 RWIP_INCR_SCO_DFT = 1, 966 #endif //MAX_NB_SYNC 967 /// Broadcast ACL event default increment 968 RWIP_INCR_BCST_DFT = 1, 969 /// Broadcast ACL event with LMP activity increment 970 RWIP_INCR_BCST_ACT = 1, 971 /// CSB RX event default increment 972 RWIP_INCR_CSB_RX_DFT = 1, 973 /// CSB TX event default increment 974 RWIP_INCR_CSB_TX_DFT = 1, 975 /// Inquiry event default increment 976 RWIP_INCR_INQ_DFT = 1, 977 /// Inquiry Scan event default increment 978 RWIP_INCR_ISCAN_DFT = 1, 979 /// Page event default increment 980 RWIP_INCR_PAGE_DFT = 1, 981 /// Page event default increment 982 RWIP_INCR_PAGE_1ST_PKT = 2, 983 /// Page first packet event default increment 984 RWIP_INCR_PCA_DFT = 1, 985 /// Page scan event default increment 986 RWIP_INCR_PSCAN_DFT = 1, 987 /// Page scan event increment increment when canceled 988 RWIP_INCR_PSCAN_1ST_PKT = 1, 989 /// Synchronization Scan event default increment 990 RWIP_INCR_SSCAN_DFT = 1, 991 /// Synchronization Train event default increment 992 RWIP_INCR_STRAIN_DFT = 1, 993 #endif //#if (BT_EMB_PRESENT) 994 #if (BLE_EMB_PRESENT) 995 /// Default increment for scanning events 996 RWIP_INCR_SCAN_DFT = 1, 997 /// Default increment for initiating events 998 RWIP_INCR_INIT_DFT = 1, 999 /// Default increment for LE connection establishment 1000 RWIP_INCR_LE_ESTAB_DFT = 1, 1001 /// Default increment for Idle connection 1002 RWIP_INCR_LE_CON_IDLE_DFT = 1, 1003 /// Default increment for active connect events 1004 RWIP_INCR_LE_CON_ACT_DFT = 11, 1005 /// Default increment for advertising events 1006 RWIP_INCR_ADV_DFT = 1, 1007 /// Default increment for advertising high duty cycle events 1008 RWIP_INCR_ADV_HDC_PRIO_DFT = 1, 1009 #endif // #if (BLE_EMB_PRESENT) 1010 }; 1011 #endif //#if (BLE_EMB_PRESENT || BT_EMB_PRESENT) 1012 /// @} BT Stack Configuration 1013 /// @} ROOT 1014 1015 #endif //RWIP_CONFIG_H_ 1016