1 /** 2 * \file 3 * 4 * \brief ARM functions for busy-wait delay loops 5 * 6 * Copyright (c) 2013-2015 Atmel Corporation. All rights reserved. 7 * 8 * \asf_license_start 9 * 10 * \page License 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 18 * 2. Redistributions in binary form must reproduce the above copyright notice, 19 * this list of conditions and the following disclaimer in the documentation 20 * and/or other materials provided with the distribution. 21 * 22 * 3. The name of Atmel may not be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * 4. This software may only be redistributed and used in connection with an 26 * Atmel microcontroller product. 27 * 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 * 40 * \asf_license_stop 41 * 42 */ 43 /* 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> 45 */ 46 #ifndef CYCLE_COUNTER_H_INCLUDED 47 #define CYCLE_COUNTER_H_INCLUDED 48 49 #include <compiler.h> 50 #include <clock.h> 51 52 #ifdef __cplusplus 53 extern "C" { 54 #endif 55 56 /** 57 * @def F_CPU 58 * @brief MCU Clock Frequency (Hertz) 59 */ 60 #ifndef F_CPU 61 # define F_CPU system_gclk_gen_get_hz(0) 62 #endif 63 64 /** 65 * @name Convenience functions for busy-wait delay loops 66 * 67 * @def delay_cycles 68 * @brief Delay program execution for a specified number of CPU cycles. 69 * @param n number of CPU cycles to wait 70 * 71 * @def cpu_delay_ms 72 * @brief Delay program execution for a specified number of milliseconds. 73 * @param delay number of milliseconds to wait 74 * @param f_cpu CPU frequency in Hertz 75 * 76 * @def cpu_delay_us 77 * @brief Delay program execution for a specified number of microseconds. 78 * @param delay number of microseconds to wait 79 * @param f_cpu CPU frequency in Hertz 80 * 81 * @def cpu_ms_2_cy 82 * @brief Convert milli-seconds into CPU cycles. 83 * @param ms number of milliseconds 84 * @param f_cpu CPU frequency in Hertz 85 * @return the converted number of CPU cycles 86 * 87 * @def cpu_us_2_cy 88 * @brief Convert micro-seconds into CPU cycles. 89 * @param ms number of microseconds 90 * @param f_cpu CPU frequency in Hertz 91 * @return the converted number of CPU cycles 92 * 93 * @{ 94 */ 95 96 /** 97 * \brief Delay loop to delay n number of cycles 98 * 99 * \note The function runs in internal RAM so that flash wait states 100 * will not affect the delay time. 101 * 102 * \param n Number of cycles 103 */ 104 void portable_delay_cycles(unsigned long n); 105 106 #define cpu_ms_2_cy(ms, f_cpu) \ 107 (((uint64_t)(ms) * (f_cpu) + (uint64_t)(7e3-1ul)) / (uint64_t)7e3) 108 #define cpu_us_2_cy(us, f_cpu) \ 109 (((uint64_t)(us) * (f_cpu) + (uint64_t)(7e6-1ul)) / (uint64_t)7e6) 110 111 #define delay_cycles portable_delay_cycles 112 113 #define cpu_delay_s(delay) delay_cycles(cpu_ms_2_cy(1000 * delay, F_CPU)) 114 #define cpu_delay_ms(delay) delay_cycles(cpu_ms_2_cy(delay, F_CPU)) 115 #define cpu_delay_us(delay) delay_cycles(cpu_us_2_cy(delay, F_CPU)) 116 //! @} 117 118 119 #ifdef __cplusplus 120 } 121 #endif 122 123 #endif /* CYCLE_COUNTER_H_INCLUDED */ 124