1 #ifndef __SAM7X_EMAC_H__ 2 #define __SAM7X_EMAC_H__ 3 4 //#define DM9161 5 #define RTL8201 6 7 #ifdef DM9161 8 #define AT91C_PHY_ADDR 31 9 #else 10 #define AT91C_PHY_ADDR 0x01 11 #endif 12 13 #define MII_DM9161_ID 0x0181b8a0 14 #define MII_RTL8201_ID 0x82010000 15 16 /* RTL8201 PHY registers. */ 17 #define PHY_REG_BMCR 0x00 /* Basic mode control register */ 18 #define PHY_REG_BMSR 0x01 /* Basic mode status register */ 19 #define PHY_REG_PHYID1 0x02 /* PHY ID identifier #1 */ 20 #define PHY_REG_PHYID2 0x03 /* PHY ID identifier #2 */ 21 #define PHY_REG_ANAR 0x04 /* AutoNegotiation Advertisement reg.*/ 22 #define PHY_REG_ANLPAR 0x05 /* AutoNeg.Link partner ability reg */ 23 #define PHY_REG_ANER 0x06 /* AutoNeg. Expansion register */ 24 #define PHY_REG_DSCR 0x10 /* DAVICOM Specified Config. reg */ 25 #define PHY_REG_DSCSR 0x11 /* DAVICOM Spec. Config/Status reg */ 26 #define PHY_REG_10BTCSR 0x12 /* 10BASET Configuration/Status reg */ 27 #define PHY_REG_PWDOR 0x13 /* Power Down Control Register */ 28 #define PHY_REG_SCR 0x14 /* Specified Config register */ 29 #define PHY_REG_INTR 0x15 /* Interrupt register */ 30 #define PHY_REG_RECR 0x16 /* Receive Error Counter register */ 31 #define PHY_REG_DISCR 0x17 /* Disconnect Counter register */ 32 #define PHY_REG_RLSR 0x18 /* Hardware Reset Latch State reg. */ 33 34 /* Basic mode control register. */ 35 #define BMCR_RESV 0x007f /* Unused... */ 36 #define BMCR_CTST 0x0080 /* Collision test */ 37 #define BMCR_FULLDPLX 0x0100 /* Full duplex */ 38 #define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ 39 #define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ 40 #define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ 41 #define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ 42 #define BMCR_SPEED100 0x2000 /* Select 100Mbps */ 43 #define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ 44 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ 45 46 #define PHY_FULLD_100M 0x2100 /* Full Duplex 100Mbit */ 47 #define PHY_HALFD_100M 0x2000 /* Half Duplex 100Mbit */ 48 #define PHY_FULLD_10M 0x0100 /* Full Duplex 10Mbit */ 49 #define PHY_HALFD_10M 0x0000 /* Half Duplex 10MBit */ 50 #define PHY_AUTO_NEG 0x3000 /* Select Auto Negotiation */ 51 52 /* Basic mode status register. */ 53 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */ 54 #define BMSR_JCD 0x0002 /* Jabber detected */ 55 #define BMSR_LINKST 0x0004 /* Link status */ 56 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ 57 #define BMSR_RFAULT 0x0010 /* Remote fault detected */ 58 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ 59 #define BMSR_MIIPRESUP 0x0040 /* MII Frame Preamble Suppression */ 60 #define BMSR_RESV 0x0780 /* Unused... */ 61 #define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ 62 #define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ 63 #define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ 64 #define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ 65 #define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ 66 67 #define RxDESC_FLAG_ADDR_MASK 0xfffffffc 68 #define RxDESC_FLAG_WARP 0x00000002 69 #define RxDESC_FLAG_OWNSHIP 0x00000001 70 #define RxDESC_STATUS_BUF_SIZE (0x00000FFF) 71 #define RxDESC_STATUS_FRAME_START (1U << 14) 72 #define RxDESC_STATUS_FRAME_END (1U << 15) 73 74 #define TxDESC_STATUS_BUF_SIZE (0x000007FF) 75 #define TxDESC_STATUS_LAST_BUF (1U << 15) 76 #define TxDESC_STATUS_NO_CRC (1U << 16) 77 #define TxDESC_STATUS_BUF_EXHAUSTED (1U << 27) 78 #define TxDESC_STATUS_Tx_UNDERRUN (1U << 28) 79 #define TxDESC_STATUS_Tx_ERROR (1U << 29) 80 #define TxDESC_STATUS_WRAP (1U << 30) 81 #define TxDESC_STATUS_USED (1U << 31) 82 83 //----dm9161 define---- 84 #define DM9161_RESET (1 << 15) // 1= Software Reset; 0=Normal Operation 85 #define DM9161_LOOPBACK (1 << 14) // 1=loopback Enabled; 0=Normal Operation 86 #define DM9161_SPEED_SELECT (1 << 13) // 1=100Mbps; 0=10Mbps 87 #define DM9161_AUTONEG (1 << 12) // Auto-negotiation Enable 88 #define DM9161_POWER_DOWN (1 << 11) // 1=Power down 0=Normal operation 89 #define DM9161_ISOLATE (1 << 10) // 1 = Isolates 0 = Normal operation 90 #define DM9161_RESTART_AUTONEG (1 << 9) // 1 = Restart auto-negotiation 0 = Normal operation 91 #define DM9161_DUPLEX_MODE (1 << 8) // 1 = Full duplex operation 0 = Normal operation 92 #define DM9161_COLLISION_TEST (1 << 7) // 1 = Collision test enabled 0 = Normal operation 93 94 #define DM9161_NP (1 << 15) // Next page Indication 95 #define DM9161_ACK (1 << 14) // Acknowledge 96 #define DM9161_RF (1 << 13) // Remote Fault 97 // Reserved 12 to 11 // Write as 0, ignore on read 98 #define DM9161_FCS (1 << 10) // Flow Control Support 99 #define DM9161_T4 (1 << 9) // 100BASE-T4 Support 100 #define DM9161_TX_FDX (1 << 8) // 100BASE-TX Full Duplex Support 101 #define DM9161_TX_HDX (1 << 7) // 100BASE-TX Support 102 #define DM9161_10_FDX (1 << 6) // 10BASE-T Full Duplex Support 103 #define DM9161_10_HDX (1 << 5) // 10BASE-T Support 104 // Selector 4 to 0 // Protocol Selection Bits 105 #define DM9161_AN_IEEE_802_3 0x0001 106 107 int sam7xether_register(char *name); 108 109 #endif 110