1 #include "bflb_l1c.h"
2
3 #if (defined(BL616) || defined(BL606P) || defined(BL808) || defined(BL628)) && !defined(CPU_LP)
4 #include "csi_core.h"
bflb_l1c_icache_enable(void)5 void bflb_l1c_icache_enable(void)
6 {
7 csi_icache_enable();
8 }
9
bflb_l1c_icache_disable(void)10 void bflb_l1c_icache_disable(void)
11 {
12 csi_icache_disable();
13 }
14
bflb_l1c_icache_invalid_all(void)15 ATTR_TCM_SECTION void bflb_l1c_icache_invalid_all(void)
16 {
17 csi_icache_invalid();
18 }
19
bflb_l1c_dcache_enable(void)20 void bflb_l1c_dcache_enable(void)
21 {
22 csi_dcache_enable();
23 }
24
bflb_l1c_dcache_disable(void)25 void bflb_l1c_dcache_disable(void)
26 {
27 csi_dcache_disable();
28 }
29
bflb_l1c_dcache_clean_all(void)30 ATTR_TCM_SECTION void bflb_l1c_dcache_clean_all(void)
31 {
32 csi_dcache_clean();
33 }
34
bflb_l1c_dcache_invalidate_all(void)35 ATTR_TCM_SECTION void bflb_l1c_dcache_invalidate_all(void)
36 {
37 csi_dcache_invalid();
38 }
39
bflb_l1c_dcache_clean_invalidate_all(void)40 ATTR_TCM_SECTION void bflb_l1c_dcache_clean_invalidate_all(void)
41 {
42 csi_dcache_clean_invalid();
43 }
44
bflb_l1c_dcache_clean_range(void * addr,uint32_t size)45 ATTR_TCM_SECTION void bflb_l1c_dcache_clean_range(void *addr, uint32_t size)
46 {
47 csi_dcache_clean_range(addr, size);
48 }
49
bflb_l1c_dcache_invalidate_range(void * addr,uint32_t size)50 ATTR_TCM_SECTION void bflb_l1c_dcache_invalidate_range(void *addr, uint32_t size)
51 {
52 csi_dcache_invalid_range(addr, size);
53 }
54
bflb_l1c_dcache_clean_invalidate_range(void * addr,uint32_t size)55 ATTR_TCM_SECTION void bflb_l1c_dcache_clean_invalidate_range(void *addr, uint32_t size)
56 {
57 csi_dcache_clean_invalid_range(addr, size);
58 }
59 #else
60
61 #if defined(BL702) || defined(BL702L)
62 extern void L1C_Cache_Enable_Set(uint8_t wayDisable);
63 extern void L1C_Cache_Flush(void);
64 #endif
65
bflb_l1c_icache_enable(void)66 void bflb_l1c_icache_enable(void)
67 {
68 }
69
bflb_l1c_icache_disable(void)70 void bflb_l1c_icache_disable(void)
71 {
72 #if defined(BL702) || defined(BL702L)
73 L1C_Cache_Enable_Set(0x0f);
74 #endif
75 }
76
bflb_l1c_icache_invalid_all(void)77 void bflb_l1c_icache_invalid_all(void)
78 {
79 }
80
bflb_l1c_dcache_enable(void)81 void bflb_l1c_dcache_enable(void)
82 {
83 }
84
bflb_l1c_dcache_disable(void)85 void bflb_l1c_dcache_disable(void)
86 {
87 }
88
bflb_l1c_dcache_clean_all(void)89 void bflb_l1c_dcache_clean_all(void)
90 {
91 }
92
bflb_l1c_dcache_invalidate_all(void)93 void bflb_l1c_dcache_invalidate_all(void)
94 {
95 #if defined(BL702) || defined(BL702L)
96 L1C_Cache_Flush();
97 #endif
98 }
99
bflb_l1c_dcache_clean_invalidate_all(void)100 void bflb_l1c_dcache_clean_invalidate_all(void)
101 {
102 #if defined(BL702) || defined(BL702L)
103 L1C_Cache_Flush();
104 #endif
105 }
106
bflb_l1c_dcache_clean_range(void * addr,uint32_t size)107 void bflb_l1c_dcache_clean_range(void *addr, uint32_t size)
108 {
109 }
110
bflb_l1c_dcache_invalidate_range(void * addr,uint32_t size)111 ATTR_TCM_SECTION void bflb_l1c_dcache_invalidate_range(void *addr, uint32_t size)
112 {
113 #if defined(BL702) || defined(BL702L)
114 L1C_Cache_Flush();
115 #endif
116 }
117
118 #if defined(BL702) || defined(BL702L)
119 /****************************************************************************/ /**
120 * @brief L1C cache write set
121 *
122 * @param wt_en: L1C write through enable
123 * @param wb_en: L1C write back enable
124 * @param wa_en: L1C write allocate enable
125 *
126 * @return None
127 *
128 *******************************************************************************/
129 __WEAK
bflb_l1c_cache_write_set(uint8_t wt_en,uint8_t wb_en,uint8_t wa_en)130 void ATTR_TCM_SECTION bflb_l1c_cache_write_set(uint8_t wt_en, uint8_t wb_en, uint8_t wa_en)
131 {
132 uint32_t regval = 0;
133
134 regval = getreg32(0x40009000 + 0x0);
135
136 if (wt_en) {
137 regval |= (1<<4);
138 } else {
139 regval &= ~(1<<4);
140 }
141
142 if (wb_en) {
143 regval |= (1<<5);
144 } else {
145 regval &= ~(1<<5);
146 }
147
148 if (wa_en) {
149 regval |= (1<<6);
150 } else {
151 regval &= ~(1<<6);
152 }
153
154 putreg32(regval, 0x40009000+0x0);
155 }
156 #endif
157
158 /****************************************************************************/ /**
159 * @brief Get hit count
160 *
161 * @param hit_count_low: hit count low 32 bits pointer
162 * @param hit_count_high: hit count high 32 bits pointer
163 *
164 * @return None
165 *
166 *******************************************************************************/
167 __WEAK
bflb_l1c_hit_count_get(uint32_t * hit_count_low,uint32_t * hit_count_high)168 void ATTR_TCM_SECTION bflb_l1c_hit_count_get(uint32_t *hit_count_low, uint32_t *hit_count_high)
169 {
170 *hit_count_low = getreg32(0x40009000 + 0x4);
171 *hit_count_high = getreg32(0x40009000 + 0x8);
172 }
173
174 /****************************************************************************/ /**
175 * @brief Get miss count
176 *
177 * @param None
178 *
179 * @return Miss count
180 *
181 *******************************************************************************/
182 __WEAK
bflb_l1c_miss_count_get(void)183 uint32_t ATTR_TCM_SECTION bflb_l1c_miss_count_get(void)
184 {
185 return getreg32(0x40009000 + 0xC);
186 }
187
188 #endif