1 #include "bflb_wdg.h"
2 #include "bflb_clock.h"
3 #include "hardware/timer_reg.h"
4
bflb_wdg_init(struct bflb_device_s * dev,const struct bflb_wdg_config_s * config)5 void bflb_wdg_init(struct bflb_device_s *dev, const struct bflb_wdg_config_s *config)
6 {
7 uint32_t regval;
8 uint32_t reg_base;
9
10 reg_base = dev->reg_base;
11
12 putreg16(0xBABA, reg_base + TIMER_WFAR_OFFSET);
13 putreg16(0xEB10, reg_base + TIMER_WSAR_OFFSET);
14
15 regval = getreg32(reg_base + TIMER_WMER_OFFSET);
16 regval &= ~TIMER_WE;
17 if (config->mode == WDG_MODE_INTERRUPT) {
18 regval &= ~TIMER_WRIE;
19 } else {
20 regval |= TIMER_WRIE;
21 }
22 putreg32(regval, reg_base + TIMER_WMER_OFFSET);
23
24 /* Configure clock source */
25 regval = getreg32(reg_base + TIMER_TCCR_OFFSET);
26 regval &= ~TIMER_CS_WDT_MASK;
27 regval |= (config->clock_source << TIMER_CS_WDT_SHIFT);
28 putreg32(regval, reg_base + TIMER_TCCR_OFFSET);
29
30 /* Configure clock div */
31 regval = getreg32(reg_base + TIMER_TCDR_OFFSET);
32 regval &= ~TIMER_WCDR_MASK;
33 regval |= (config->clock_div << TIMER_WCDR_SHIFT);
34 putreg32(regval, reg_base + TIMER_TCDR_OFFSET);
35
36 putreg16(0xBABA, reg_base + TIMER_WFAR_OFFSET);
37 putreg16(0xEB10, reg_base + TIMER_WSAR_OFFSET);
38 putreg16(config->comp_val, reg_base + TIMER_WMR_OFFSET);
39 }
40
bflb_wdg_start(struct bflb_device_s * dev)41 void bflb_wdg_start(struct bflb_device_s *dev)
42 {
43 uint32_t regval;
44 uint32_t reg_base;
45
46 reg_base = dev->reg_base;
47
48 putreg16(0xBABA, reg_base + TIMER_WFAR_OFFSET);
49 putreg16(0xEB10, reg_base + TIMER_WSAR_OFFSET);
50
51 regval = getreg32(reg_base + TIMER_WMER_OFFSET);
52 regval |= TIMER_WE;
53 putreg32(regval, reg_base + TIMER_WMER_OFFSET);
54 }
55
bflb_wdg_stop(struct bflb_device_s * dev)56 void bflb_wdg_stop(struct bflb_device_s *dev)
57 {
58 uint32_t regval;
59 uint32_t reg_base;
60
61 reg_base = dev->reg_base;
62
63 putreg16(0xBABA, reg_base + TIMER_WFAR_OFFSET);
64 putreg16(0xEB10, reg_base + TIMER_WSAR_OFFSET);
65
66 regval = getreg32(reg_base + TIMER_WMER_OFFSET);
67 regval &= ~TIMER_WE;
68 putreg32(regval, reg_base + TIMER_WMER_OFFSET);
69 }
70
bflb_wdg_get_countervalue(struct bflb_device_s * dev)71 uint16_t bflb_wdg_get_countervalue(struct bflb_device_s *dev)
72 {
73 uint32_t reg_base;
74
75 reg_base = dev->reg_base;
76
77 return getreg16(reg_base + TIMER_WVR_OFFSET);
78 }
79
bflb_wdg_set_countervalue(struct bflb_device_s * dev,uint16_t value)80 void bflb_wdg_set_countervalue(struct bflb_device_s *dev, uint16_t value)
81 {
82 uint32_t reg_base;
83
84 reg_base = dev->reg_base;
85
86 putreg16(0xBABA, reg_base + TIMER_WFAR_OFFSET);
87 putreg16(0xEB10, reg_base + TIMER_WSAR_OFFSET);
88 putreg16(value, reg_base + TIMER_WMR_OFFSET);
89 }
90
bflb_wdg_reset_countervalue(struct bflb_device_s * dev)91 void bflb_wdg_reset_countervalue(struct bflb_device_s *dev)
92 {
93 uint32_t regval;
94 uint32_t reg_base;
95
96 reg_base = dev->reg_base;
97
98 putreg16(0xBABA, reg_base + TIMER_WFAR_OFFSET);
99 putreg16(0xEB10, reg_base + TIMER_WSAR_OFFSET);
100
101 regval = getreg32(reg_base + TIMER_WCR_OFFSET);
102 regval |= TIMER_WCR;
103 putreg32(regval, reg_base + TIMER_WCR_OFFSET);
104 }
105
bflb_wdg_compint_clear(struct bflb_device_s * dev)106 void bflb_wdg_compint_clear(struct bflb_device_s *dev)
107 {
108 uint32_t regval;
109 uint32_t reg_base;
110
111 reg_base = dev->reg_base;
112
113 putreg16(0xBABA, reg_base + TIMER_WFAR_OFFSET);
114 putreg16(0xEB10, reg_base + TIMER_WSAR_OFFSET);
115
116 regval = getreg32(reg_base + TIMER_WICR_OFFSET);
117 regval |= TIMER_WICLR;
118 putreg32(regval, reg_base + TIMER_WICR_OFFSET);
119 }
120