1 /**
2 ******************************************************************************
3 * @file hk32f0xx_pwr.c
4 * @version V1.0.1
5 * @date 2019-08-15
6 ******************************************************************************
7 */
8
9 /* Includes ------------------------------------------------------------------*/
10 #include "hk32f0xx_pwr.h"
11 #include "hk32f0xx_rcc.h"
12
13 /** @addtogroup HK32F0xx_StdPeriph_Driver
14 * @{
15 */
16
17 /** @defgroup PWR
18 * @brief PWR driver modules
19 * @{
20 */
21
22 /* Private typedef -----------------------------------------------------------*/
23 /* Private define ------------------------------------------------------------*/
24
25 /* ------------------ PWR registers bit mask ------------------------ */
26
27 /* CR register bit mask */
28 #define CR_DS_MASK ((uint32_t)0xFFFFFFFC)
29 #define CR_PLS_MASK ((uint32_t)0xFFFFFF1F)
30
31 /* Private macro -------------------------------------------------------------*/
32 /* Private variables ---------------------------------------------------------*/
33 /* Private function prototypes -----------------------------------------------*/
34 /* Private functions ---------------------------------------------------------*/
35
36 /** @defgroup PWR_Private_Functions
37 * @{
38 */
39
40 /** @defgroup PWR_Group1 Backup Domain Access function
41 * @brief Backup Domain Access function
42 *
43 @verbatim
44 ==============================================================================
45 ##### Backup Domain Access function #####
46 ==============================================================================
47
48 [..] After reset, the Backup Domain Registers (RCC BDCR Register, RTC registers
49 and RTC backup registers) are protected against possible stray write accesses.
50 [..] To enable access to Backup domain use the PWR_BackupAccessCmd(ENABLE) function.
51
52 @endverbatim
53 * @{
54 */
55
56 /**
57 * @brief Deinitializes the PWR peripheral registers to their default reset values.
58 * @param None
59 * @retval None
60 */
PWR_DeInit(void)61 void PWR_DeInit(void)
62 {
63 RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
64 RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
65 }
66
67 /**
68 * @brief Enables or disables access to the Backup domain registers.
69 * @note If the HSE divided by 32 is used as the RTC clock, the
70 * Backup Domain Access should be kept enabled.
71 * @param NewState: new state of the access to the Backup domain registers.
72 * This parameter can be: ENABLE or DISABLE.
73 * @retval None
74 */
PWR_BackupAccessCmd(FunctionalState NewState)75 void PWR_BackupAccessCmd(FunctionalState NewState)
76 {
77 /* Check the parameters */
78 assert_param(IS_FUNCTIONAL_STATE(NewState));
79
80 if (NewState != DISABLE)
81 {
82 /* Enable the Backup Domain Access */
83 PWR->CR |= PWR_CR_DBP;
84 }
85 else
86 {
87 /* Disable the Backup Domain Access */
88 PWR->CR &= (uint32_t)~((uint32_t)PWR_CR_DBP);
89 }
90 }
91
92 /**
93 * @}
94 */
95
96 /** @defgroup PWR_Group2 PVD configuration functions
97 * @brief PVD configuration functions
98 *
99 @verbatim
100 ==============================================================================
101 ##### PVD configuration functions #####
102 ==============================================================================
103 [..]
104 (+) The PVD is used to monitor the VDD power supply by comparing it to a threshold
105 selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
106 (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower than the
107 PVD threshold. This event is internally connected to the EXTI line16
108 and can generate an interrupt if enabled through the EXTI registers.
109 (+) The PVD is stopped in Standby mode.
110
111 @endverbatim
112 * @{
113 */
114
115 /**
116 * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
117 * @param PWR_PVDLevel: specifies the PVD detection level
118 * This parameter can be one of the following values:
119 * @arg PWR_PVDLevel_0
120 * @arg PWR_PVDLevel_1
121 * @arg PWR_PVDLevel_2
122 * @arg PWR_PVDLevel_3
123 * @arg PWR_PVDLevel_4
124 * @arg PWR_PVDLevel_5
125 * @arg PWR_PVDLevel_6
126 * @arg PWR_PVDLevel_7
127 * @note Refer to the electrical characteristics of your device datasheet for
128 * more details about the voltage threshold corresponding to each
129 * detection level.
130 * @retval None
131 */
PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)132 void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
133 {
134 uint32_t tmpreg = 0;
135
136 /* Check the parameters */
137 assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel));
138
139 tmpreg = PWR->CR;
140
141 /* Clear PLS[7:5] bits */
142 tmpreg &= CR_PLS_MASK;
143
144 /* Set PLS[7:5] bits according to PWR_PVDLevel value */
145 tmpreg |= PWR_PVDLevel;
146
147 /* Store the new value */
148 PWR->CR = tmpreg;
149 }
150
151 /**
152 * @brief Enables or disables the Power Voltage Detector(PVD).
153 * @param NewState: new state of the PVD.
154 * This parameter can be: ENABLE or DISABLE.
155 * @retval None
156 */
PWR_PVDCmd(FunctionalState NewState)157 void PWR_PVDCmd(FunctionalState NewState)
158 {
159 /* Check the parameters */
160 assert_param(IS_FUNCTIONAL_STATE(NewState));
161
162 if (NewState != DISABLE)
163 {
164 /* Enable the PVD */
165 PWR->CR |= PWR_CR_PVDE;
166 }
167 else
168 {
169 /* Disable the PVD */
170 PWR->CR &= (uint32_t)~((uint32_t)PWR_CR_PVDE);
171 }
172 }
173
174 /**
175 * @}
176 */
177
178 /** @defgroup PWR_Group3 WakeUp pins configuration functions
179 * @brief WakeUp pins configuration functions
180 *
181 @verbatim
182 ==============================================================================
183 ##### WakeUp pin configuration functions #####
184 ==============================================================================
185
186 (+) WakeUp pins are used to wakeup the system from Standby mode. These pins are
187 forced in input pull down configuration and are active on rising edges.
188 (+) There are eight WakeUp pins: WakeUp Pin 1 on PA.00 and WakeUp Pin 2 on PC.13.
189
190 @endverbatim
191 * @{
192 */
193
194 /**
195 * @brief Enables or disables the WakeUp Pin functionality.
196 * @param PWR_WakeUpPin: specifies the WakeUpPin.
197 * This parameter can be one of the following values
198 * @arg PWR_WakeUpPin_1
199 * @arg PWR_WakeUpPin_2
200 * @param NewState: new state of the WakeUp Pin functionality.
201 * This parameter can be: ENABLE or DISABLE.
202 * @retval None
203 */
PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin,FunctionalState NewState)204 void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState)
205 {
206 /* Check the parameters */
207 assert_param(IS_PWR_WAKEUP_PIN(PWR_WakeUpPin));
208 assert_param(IS_FUNCTIONAL_STATE(NewState));
209
210 if (NewState != DISABLE)
211 {
212 /* Enable the EWUPx pin */
213 PWR->CSR |= PWR_WakeUpPin;
214 }
215 else
216 {
217 /* Disable the EWUPx pin */
218 PWR->CSR &= ~PWR_WakeUpPin;
219 }
220 }
221
222 /**
223 * @}
224 */
225
226
227 /** @defgroup PWR_Group4 Low Power modes configuration functions
228 * @brief Low Power modes configuration functions
229 *
230 @verbatim
231 ==============================================================================
232 ##### Low Power modes configuration functions #####
233 ==============================================================================
234
235 [..] The devices feature three low-power modes:
236 (+) Sleep mode: Cortex-M0 core stopped, peripherals kept running.
237 (+) Stop mode: all clocks are stopped, regulator running, regulator in low power mode
238 (+) Standby mode: VCORE domain powered off
239
240 *** Sleep mode ***
241 ==================
242 [..]
243 (+) Entry:
244 (++) The Sleep mode is entered by executing the WFE() or WFI() instructions.
245 (+) Exit:
246 (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
247 controller (NVIC) can wake up the device from Sleep mode.
248
249 *** Stop mode ***
250 =================
251 [..] In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the HSI,
252 the HSI14 and the HSE RC oscillators are disabled. Internal SRAM and register
253 contents are preserved.
254 The voltage regulator can be configured either in normal or low-power mode.
255
256 (+) Entry:
257 (++) The Stop mode is entered using the PWR_EnterSTOPMode(PWR_Regulator_LowPower,)
258 function with regulator in LowPower or with Regulator ON.
259 (+) Exit:
260 (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode
261 or any internal IPs (I2C, UASRT or CEC) wakeup event.
262
263 *** Standby mode ***
264 ====================
265 [..] The Standby mode allows to achieve the lowest power consumption. It is based
266 on the Cortex-M0 deepsleep mode, with the voltage regulator disabled.
267 The VCORE domain is consequently powered off. The PLL, the HSI, the HSI14
268 oscillator and the HSE oscillator are also switched off. SRAM and register
269 contents are lost except for the Backup domain (RTC registers, RTC backup
270 registers and Standby circuitry).
271
272 [..] The voltage regulator is OFF.
273
274 (+) Entry:
275 (++) The Standby mode is entered using the PWR_EnterSTANDBYMode() function.
276 (+) Exit:
277 (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
278 tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
279
280 *** Auto-wakeup (AWU) from low-power mode ***
281 =============================================
282 [..] The MCU can be woken up from low-power mode by an RTC Alarm event, a tamper
283 event, a time-stamp event, or a comparator event, without depending on an
284 external interrupt (Auto-wakeup mode).
285
286 (+) RTC auto-wakeup (AWU) from the Stop mode
287 (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
288 (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt
289 or Event modes) using the EXTI_Init() function.
290 (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function
291 (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
292 and RTC_AlarmCmd() functions.
293 (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
294 is necessary to:
295 (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt
296 or Event modes) using the EXTI_Init() function.
297 (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
298 function.
299 (+++) Configure the RTC to detect the tamper or time stamp event using the
300 RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
301 functions.
302
303 (+) RTC auto-wakeup (AWU) from the Standby mode
304 (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
305 (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function.
306 (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
307 and RTC_AlarmCmd() functions.
308 (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it
309 is necessary to:
310 (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
311 function.
312 (+++) Configure the RTC to detect the tamper or time stamp event using the
313 RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
314 functions.
315
316 (+) Comparator auto-wakeup (AWU) from the Stop mode
317 (++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup
318 event, it is necessary to:
319 (+++) Configure the EXTI Line 21 for comparator 1 or EXTI Line 22 for comparator 2
320 to be sensitive to to the selected edges (falling, rising or falling
321 and rising) (Interrupt or Event modes) using the EXTI_Init() function.
322 (+++) Configure the comparator to generate the event.
323
324 @endverbatim
325 * @{
326 */
327
328 /**
329 * @brief Enters Sleep mode.
330 * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
331 * @param PWR_SLEEPEntry: specifies if SLEEP mode in entered with WFI or WFE instruction.
332 * This parameter can be one of the following values:
333 * @arg PWR_SLEEPEntry_WFI: enter SLEEP mode with WFI instruction
334 * @arg PWR_SLEEPEntry_WFE: enter SLEEP mode with WFE instruction
335 * @retval None
336 */
PWR_EnterSleepMode(uint8_t PWR_SLEEPEntry)337 void PWR_EnterSleepMode(uint8_t PWR_SLEEPEntry)
338 {
339 /* Check the parameters */
340 assert_param(IS_PWR_SLEEP_ENTRY(PWR_SLEEPEntry));
341
342 /* Clear SLEEPDEEP bit of Cortex-M0 System Control Register */
343 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
344
345 /* Select SLEEP mode entry -------------------------------------------------*/
346 if (PWR_SLEEPEntry == PWR_SLEEPEntry_WFI)
347 {
348 /* Request Wait For Interrupt */
349 __WFI();
350 }
351 else
352 {
353 /* Request Wait For Event */
354 __SEV();
355 __WFE();
356 __WFE();
357 }
358 }
359
360 /**
361 * @brief Enters STOP mode.
362 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
363 * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
364 * the HSI RC oscillator is selected as system clock.
365 * @note When the voltage regulator operates in low power mode, an additional
366 * startup delay is incurred when waking up from Stop mode.
367 * By keeping the internal regulator ON during Stop mode, the consumption
368 * is higher although the startup time is reduced.
369 * @param PWR_Regulator: specifies the regulator state in STOP mode.
370 * This parameter can be one of the following values:
371 * @arg PWR_Regulator_ON: STOP mode with regulator ON
372 * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
373 * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
374 * This parameter can be one of the following values:
375 * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
376 * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
377 @arg PWR_STOPEntry_SLEEPONEXIT: enter STOP mode with SLEEPONEXIT instruction
378 * @retval None
379 */
380 uint32_t nvic_iser0_bakup = 0;
381 uint32_t irq_systick_bakup = 0;
382
PWR_EnterSTOPMode(uint32_t PWR_Regulator,uint8_t PWR_STOPEntry)383 void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
384 {
385 uint32_t tmpreg = 0;
386
387 /* Check the parameters */
388 assert_param(IS_PWR_REGULATOR(PWR_Regulator));
389 assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
390
391 /* Select the regulator state in STOP mode ---------------------------------*/
392 tmpreg = PWR->CR;
393 /* Clear PDDS and LPDSR bits */
394 tmpreg &= CR_DS_MASK;
395
396 /* Set LPDSR bit according to PWR_Regulator value */
397 tmpreg |= PWR_Regulator;
398
399 nvic_iser0_bakup = NVIC->ISER[0]; // backup nvic setting
400 NVIC->ICER[0] = NVIC->ISER[0] // diable all IRQ but the following
401 & ~((0x1 << 1) // PVD combined EXTI
402 | (0x1 << 2) // RTC combined EXTI
403 | (0x1 << 5) // EXTI0_1
404 | (0x1 << 6) // EXTI2_3
405 | (0x1 << 7) // EXTI4_15
406 // |(0x1<<12)
407 // ADC combined with EXTI
408 // |(0x1<<23)
409 // I2C1 combined with EXTI
410 // |(0x1<<24)
411 // I2C2 combined with EXTI
412 // |(0x1<<27) // USART1 combined with EXTI
413 // |(0x1<<28) // USART2 combined with EXTI
414 // |(0x1<<29) // USART3~8 combined with EXTI
415 );
416 // ע�⣺��ע�͵��� ADC/I2C/UART �IJ���, �����ʹ�õ���Ӧ�� EXTI, ��Ӧ��ȥ��ע��.
417 irq_systick_bakup = SysTick->CTRL; // backup systicker setting
418 SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk ; // Disable Systicker IRQ
419
420 /* Store the new value */
421 PWR->CR = tmpreg;
422
423 /* Set SLEEPDEEP bit of Cortex-M0 System Control Register */
424 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
425
426 /* Select STOP mode entry --------------------------------------------------*/
427 if (PWR_STOPEntry == PWR_STOPEntry_WFI)
428 {
429 /* Request Wait For Interrupt */
430 __WFI();
431 /* Reset SLEEPDEEP bit of Cortex System Control Register */
432 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
433 }
434 else if (PWR_STOPEntry == PWR_STOPEntry_WFE)
435 {
436 /* Request Wait For Event */
437 __WFE();
438 /* Reset SLEEPDEEP bit of Cortex System Control Register */
439 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
440 }
441 else
442 {
443 /* Set SLEEP on exit bit of Cortex-M0 System Control Register */
444 SCB->SCR |= SCB_SCR_SLEEPONEXIT_Msk;
445 }
446
447 SysTick->CTRL = irq_systick_bakup; // restore Systicker setting
448 NVIC->ISER[0] = nvic_iser0_bakup; // restore nvic setting
449 }
450
451 /**
452 * @brief Enters STANDBY mode.
453 * @note In Standby mode, all I/O pins are high impedance except for:
454 * - Reset pad (still available)
455 * - RTC_AF1 pin (PC13) if configured for Wakeup pin 2 (WKUP2), tamper,
456 * time-stamp, RTC Alarm out, or RTC clock calibration out.
457 * - WKUP pin 1 (PA0) if enabled.
458 * @note The Wakeup flag (WUF) need to be cleared at application level before to call this function
459 * @param None
460 * @retval None
461 */
PWR_EnterSTANDBYMode(void)462 void PWR_EnterSTANDBYMode(void)
463 {
464 /* Select STANDBY mode */
465 PWR->CR |= PWR_CR_PDDS;
466
467 /* Set SLEEPDEEP bit of Cortex-M0 System Control Register */
468 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
469
470 /* Request Wait For Interrupt */
471 __WFI();
472 }
473
474 /**
475 * @}
476 */
477
478 /** @defgroup PWR_Group5 Flags management functions
479 * @brief Flags management functions
480 *
481 @verbatim
482 ==============================================================================
483 ##### Flags management functions #####
484 ==============================================================================
485
486 @endverbatim
487 * @{
488 */
489
490 /**
491 * @brief Checks whether the specified PWR flag is set or not.
492 * @param PWR_FLAG: specifies the flag to check.
493 * This parameter can be one of the following values:
494 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup
495 * event was received from the WKUP pin or from the RTC alarm
496 * (Alarm A or Alarm B), RTC Tamper event or RTC TimeStamp event.
497 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the
498 * system was resumed from StandBy mode.
499 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD
500 * is enabled by the PWR_PVDCmd() function.
501 * @arg PWR_FLAG_VREFINTRDY: Internal Voltage Reference Ready flag.
502 * This flag indicates the state of the internal voltage
503 * reference, VREFINT.
504 * @retval The new state of PWR_FLAG (SET or RESET).
505 */
PWR_GetFlagStatus(uint32_t PWR_FLAG)506 FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
507 {
508 FlagStatus bitstatus = RESET;
509 /* Check the parameters */
510 assert_param(IS_PWR_GET_FLAG(PWR_FLAG));
511
512 if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET)
513 {
514 bitstatus = SET;
515 }
516 else
517 {
518 bitstatus = RESET;
519 }
520 /* Return the flag status */
521 return bitstatus;
522 }
523
524 /**
525 * @brief Clears the PWR's pending flags.
526 * @param PWR_FLAG: specifies the flag to clear.
527 * This parameter can be one of the following values:
528 * @arg PWR_FLAG_WU: Wake Up flag
529 * @arg PWR_FLAG_SB: StandBy flag
530 * @retval None
531 */
PWR_ClearFlag(uint32_t PWR_FLAG)532 void PWR_ClearFlag(uint32_t PWR_FLAG)
533 {
534 /* Check the parameters */
535 assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG));
536
537 PWR->CR |= PWR_FLAG << 2;
538 }
539