1;/***************************************************************************** 2; * @file startup_SAMD21.s 3; * @brief CMSIS Cortex-M0+ Core Device Startup File for 4; * Atmel SAMD21 Device Series 5; * @version V1.01 6; * @date 25. March 2015 7; * 8; * @note 9; * Copyright (C) 2014 - 2015 ARM Limited. All rights reserved. 10; * 11; * @par 12; * ARM Limited (ARM) is supplying this software for use with Cortex-M 13; * processor based microcontrollers. This file can be freely distributed 14; * within development tools that are supporting such ARM based processors. 15; * 16; * @par 17; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED 18; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF 19; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. 20; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR 21; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. 22; * 23; ******************************************************************************/ 24;/* 25;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ 26;*/ 27 28 29; <h> Stack Configuration 30; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 31; </h> 32 33Stack_Size EQU 0x00000400 34 35 AREA STACK, NOINIT, READWRITE, ALIGN=3 36Stack_Mem SPACE Stack_Size 37__initial_sp 38 39 40; <h> Heap Configuration 41; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 42; </h> 43 44Heap_Size EQU 0x00000000 45 46 AREA HEAP, NOINIT, READWRITE, ALIGN=3 47__heap_base 48Heap_Mem SPACE Heap_Size 49__heap_limit 50 51 52 PRESERVE8 53 THUMB 54 55 56; Vector Table Mapped to Address 0 at Reset 57 58 AREA RESET, DATA, READONLY 59 EXPORT __Vectors 60 EXPORT __Vectors_End 61 EXPORT __Vectors_Size 62 63__Vectors DCD __initial_sp ; Top of Stack 64 DCD Reset_Handler ; Reset Handler 65 DCD NMI_Handler ; NMI Handler 66 DCD HardFault_Handler ; Hard Fault Handler 67 DCD 0 ; Reserved 68 DCD 0 ; Reserved 69 DCD 0 ; Reserved 70 DCD 0 ; Reserved 71 DCD 0 ; Reserved 72 DCD 0 ; Reserved 73 DCD 0 ; Reserved 74 DCD SVC_Handler ; SVCall Handler 75 DCD 0 ; Reserved 76 DCD 0 ; Reserved 77 DCD PendSV_Handler ; PendSV Handler 78 DCD SysTick_Handler ; SysTick Handler 79 80 ; External Interrupts 81 DCD PM_Handler ; 0 Power Manager 82 DCD SYSCTRL_Handler ; 1 System Control 83 DCD WDT_Handler ; 2 Watchdog Timer 84 DCD RTC_Handler ; 3 Real-Time Counter 85 DCD EIC_Handler ; 4 External Interrupt Controller 86 DCD NVMCTRL_Handler ; 5 Non-Volatile Memory Controller 87 DCD DMAC_Handler ; 6 Direct Memory Access Controller 88 DCD USB_Handler ; 7 Universal Serial Bus 89 DCD EVSYS_Handler ; 8 Event System Interface 90 DCD SERCOM0_Handler ; 9 Serial Communication Interface 0 91 DCD SERCOM1_Handler ; 10 Serial Communication Interface 1 92 DCD SERCOM2_Handler ; 11 Serial Communication Interface 2 93 DCD SERCOM3_Handler ; 12 Serial Communication Interface 3 94 DCD SERCOM4_Handler ; 13 Serial Communication Interface 4 95 DCD SERCOM5_Handler ; 14 Serial Communication Interface 5 96 DCD TCC0_Handler ; 15 Timer Counter Control 0 97 DCD TCC1_Handler ; 16 Timer Counter Control 1 98 DCD TCC2_Handler ; 17 Timer Counter Control 2 99 DCD TC3_Handler ; 18 Basic Timer Counter 0 100 DCD TC4_Handler ; 19 Basic Timer Counter 1 101 DCD TC5_Handler ; 20 Basic Timer Counter 2 102 DCD TC6_Handler ; 21 Basic Timer Counter 3 103 DCD TC7_Handler ; 22 Basic Timer Counter 4 104 DCD ADC_Handler ; 23 Analog Digital Converter 105 DCD AC_Handler ; 24 Analog Comparators 106 DCD DAC_Handler ; 25 Digital Analog Converter 107 DCD PTC_Handler ; 26 Peripheral Touch Controller 108 DCD I2S_Handler ; 27 Inter-IC Sound Interface 109 DCD AC1_Handler ; 28 Analog Comparators 1 110__Vectors_End 111 112__Vectors_Size EQU __Vectors_End - __Vectors 113 114 AREA |.text|, CODE, READONLY 115 116 117; Reset Handler 118 119Reset_Handler PROC 120 EXPORT Reset_Handler [WEAK] 121 IMPORT SystemInit 122 IMPORT __main 123 LDR R0, =SystemInit 124 BLX R0 125 LDR R0, =__main 126 BX R0 127 ENDP 128 129 130; Dummy Exception Handlers (infinite loops which can be modified) 131 132NMI_Handler PROC 133 EXPORT NMI_Handler [WEAK] 134 B . 135 ENDP 136HardFault_Handler\ 137 PROC 138 EXPORT HardFault_Handler [WEAK] 139 B . 140 ENDP 141SVC_Handler PROC 142 EXPORT SVC_Handler [WEAK] 143 B . 144 ENDP 145PendSV_Handler PROC 146 EXPORT PendSV_Handler [WEAK] 147 B . 148 ENDP 149SysTick_Handler PROC 150 EXPORT SysTick_Handler [WEAK] 151 B . 152 ENDP 153 154Default_Handler PROC 155 EXPORT PM_Handler [WEAK] 156 EXPORT PM_Handler [WEAK] 157 EXPORT SYSCTRL_Handler [WEAK] 158 EXPORT WDT_Handler [WEAK] 159 EXPORT RTC_Handler [WEAK] 160 EXPORT EIC_Handler [WEAK] 161 EXPORT NVMCTRL_Handler [WEAK] 162 EXPORT DMAC_Handler [WEAK] 163 EXPORT USB_Handler [WEAK] 164 EXPORT EVSYS_Handler [WEAK] 165 EXPORT SERCOM0_Handler [WEAK] 166 EXPORT SERCOM1_Handler [WEAK] 167 EXPORT SERCOM2_Handler [WEAK] 168 EXPORT SERCOM3_Handler [WEAK] 169 EXPORT SERCOM4_Handler [WEAK] 170 EXPORT SERCOM5_Handler [WEAK] 171 EXPORT TCC0_Handler [WEAK] 172 EXPORT TCC1_Handler [WEAK] 173 EXPORT TCC2_Handler [WEAK] 174 EXPORT TC3_Handler [WEAK] 175 EXPORT TC4_Handler [WEAK] 176 EXPORT TC5_Handler [WEAK] 177 EXPORT TC6_Handler [WEAK] 178 EXPORT TC7_Handler [WEAK] 179 EXPORT ADC_Handler [WEAK] 180 EXPORT AC_Handler [WEAK] 181 EXPORT DAC_Handler [WEAK] 182 EXPORT PTC_Handler [WEAK] 183 EXPORT I2S_Handler [WEAK] 184 EXPORT AC1_Handler [WEAK] 185 186PM_Handler 187SYSCTRL_Handler 188WDT_Handler 189RTC_Handler 190EIC_Handler 191NVMCTRL_Handler 192DMAC_Handler 193USB_Handler 194EVSYS_Handler 195SERCOM0_Handler 196SERCOM1_Handler 197SERCOM2_Handler 198SERCOM3_Handler 199SERCOM4_Handler 200SERCOM5_Handler 201TCC0_Handler 202TCC1_Handler 203TCC2_Handler 204TC3_Handler 205TC4_Handler 206TC5_Handler 207TC6_Handler 208TC7_Handler 209ADC_Handler 210AC_Handler 211DAC_Handler 212PTC_Handler 213I2S_Handler 214AC1_Handler 215 B . 216 ENDP 217 218 219 ALIGN 220 221 222; User Initial Stack & Heap 223 224 IF :DEF:__MICROLIB 225 226 EXPORT __initial_sp 227 EXPORT __heap_base 228 EXPORT __heap_limit 229 230 ELSE 231 232 IMPORT __use_two_region_memory 233 EXPORT __user_initial_stackheap 234__user_initial_stackheap 235 236 LDR R0, = Heap_Mem 237 LDR R1, =(Stack_Mem + Stack_Size) 238 LDR R2, = (Heap_Mem + Heap_Size) 239 LDR R3, = Stack_Mem 240 BX LR 241 242 ALIGN 243 244 ENDIF 245 246 247 END 248