1 //*****************************************************************************
2 //
3 // startup_ewarm.c - Startup code for use with IAR's Embedded Workbench,
4 // version 5.
5 //
6 // Copyright (c) 2013-2017 Texas Instruments Incorporated. All rights reserved.
7 // Software License Agreement
8 //
9 // Texas Instruments (TI) is supplying this software for use solely and
10 // exclusively on TI's microcontroller products. The software is owned by
11 // TI and/or its suppliers, and is protected under applicable copyright
12 // laws. You may not combine this software with "viral" open-source
13 // software in order to form a larger program.
14 //
15 // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
16 // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
17 // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18 // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
19 // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
20 // DAMAGES, FOR ANY REASON WHATSOEVER.
21 //
22 // This is part of revision 2.1.4.178 of the DK-TM4C129X Firmware Package.
23 //
24 //*****************************************************************************
25
26 #include <stdint.h>
27 #include "inc/hw_nvic.h"
28 #include "inc/hw_types.h"
29
30 //*****************************************************************************
31 //
32 // Enable the IAR extensions for this source file.
33 //
34 //*****************************************************************************
35 #pragma language=extended
36
37 //*****************************************************************************
38 //
39 // Forward declaration of the default fault handlers.
40 //
41 //*****************************************************************************
42 void ResetISR(void);
43 static void NmiSR(void);
44 static void FaultISR(void);
45 static void IntDefaultHandler(void);
46
47 //*****************************************************************************
48 //
49 // The entry point for the application startup code.
50 //
51 //*****************************************************************************
52 extern void __iar_program_start(void);
53 extern void PendSV_Handler(void);
54 extern void SysTick_Handler(void);
55 extern void UART0_IRQHandler(void);
56 extern void HardFault_Handler(void);
57 //*****************************************************************************
58 //
59 // Reserve space for the system stack.
60 //
61 //*****************************************************************************
62 static uint32_t pui32Stack[128] @ ".noinit";
63
64 //*****************************************************************************
65 //
66 // A union that describes the entries of the vector table. The union is needed
67 // since the first entry is the stack pointer and the remainder are function
68 // pointers.
69 //
70 //*****************************************************************************
71 typedef union
72 {
73 void (*pfnHandler)(void);
74 uint32_t ui32Ptr;
75 }
76 uVectorEntry;
77
78 //*****************************************************************************
79 //
80 // The vector table. Note that the proper constructs must be placed on this to
81 // ensure that it ends up at physical address 0x0000.0000.
82 //
83 //*****************************************************************************
84 __root const uVectorEntry __vector_table[] @ ".intvec" =
85 {
86 { .ui32Ptr = (uint32_t)pui32Stack + sizeof(pui32Stack) },
87 // The initial stack pointer
88 ResetISR, // The reset handler
89 NmiSR, // The NMI handler
90 HardFault_Handler, // The hard fault handler
91 IntDefaultHandler, // The MPU fault handler
92 IntDefaultHandler, // The bus fault handler
93 IntDefaultHandler, // The usage fault handler
94 0, // Reserved
95 0, // Reserved
96 0, // Reserved
97 0, // Reserved
98 IntDefaultHandler, // SVCall handler
99 IntDefaultHandler, // Debug monitor handler
100 0, // Reserved
101 PendSV_Handler, //IntDefaultHandler, // The PendSV handler
102 SysTick_Handler,//IntDefaultHandler, // The SysTick handler
103 IntDefaultHandler, // GPIO Port A
104 IntDefaultHandler, // GPIO Port B
105 IntDefaultHandler, // GPIO Port C
106 IntDefaultHandler, // GPIO Port D
107 IntDefaultHandler, // GPIO Port E
108 UART0_IRQHandler, //IntDefaultHandler, // UART0 Rx and Tx
109 IntDefaultHandler, // UART1 Rx and Tx
110 IntDefaultHandler, // SSI0 Rx and Tx
111 IntDefaultHandler, // I2C0 Master and Slave
112 IntDefaultHandler, // PWM Fault
113 IntDefaultHandler, // PWM Generator 0
114 IntDefaultHandler, // PWM Generator 1
115 IntDefaultHandler, // PWM Generator 2
116 IntDefaultHandler, // Quadrature Encoder 0
117 IntDefaultHandler, // ADC Sequence 0
118 IntDefaultHandler, // ADC Sequence 1
119 IntDefaultHandler, // ADC Sequence 2
120 IntDefaultHandler, // ADC Sequence 3
121 IntDefaultHandler, // Watchdog timer
122 IntDefaultHandler, // Timer 0 subtimer A
123 IntDefaultHandler, // Timer 0 subtimer B
124 IntDefaultHandler, // Timer 1 subtimer A
125 IntDefaultHandler, // Timer 1 subtimer B
126 IntDefaultHandler, // Timer 2 subtimer A
127 IntDefaultHandler, // Timer 2 subtimer B
128 IntDefaultHandler, // Analog Comparator 0
129 IntDefaultHandler, // Analog Comparator 1
130 IntDefaultHandler, // Analog Comparator 2
131 IntDefaultHandler, // System Control (PLL, OSC, BO)
132 IntDefaultHandler, // FLASH Control
133 IntDefaultHandler, // GPIO Port F
134 IntDefaultHandler, // GPIO Port G
135 IntDefaultHandler, // GPIO Port H
136 IntDefaultHandler, // UART2 Rx and Tx
137 IntDefaultHandler, // SSI1 Rx and Tx
138 IntDefaultHandler, // Timer 3 subtimer A
139 IntDefaultHandler, // Timer 3 subtimer B
140 IntDefaultHandler, // I2C1 Master and Slave
141 IntDefaultHandler, // CAN0
142 IntDefaultHandler, // CAN1
143 IntDefaultHandler, // Ethernet
144 IntDefaultHandler, // Hibernate
145 IntDefaultHandler, // USB0
146 IntDefaultHandler, // PWM Generator 3
147 IntDefaultHandler, // uDMA Software Transfer
148 IntDefaultHandler, // uDMA Error
149 IntDefaultHandler, // ADC1 Sequence 0
150 IntDefaultHandler, // ADC1 Sequence 1
151 IntDefaultHandler, // ADC1 Sequence 2
152 IntDefaultHandler, // ADC1 Sequence 3
153 IntDefaultHandler, // External Bus Interface 0
154 IntDefaultHandler, // GPIO Port J
155 IntDefaultHandler, // GPIO Port K
156 IntDefaultHandler, // GPIO Port L
157 IntDefaultHandler, // SSI2 Rx and Tx
158 IntDefaultHandler, // SSI3 Rx and Tx
159 IntDefaultHandler, // UART3 Rx and Tx
160 IntDefaultHandler, // UART4 Rx and Tx
161 IntDefaultHandler, // UART5 Rx and Tx
162 IntDefaultHandler, // UART6 Rx and Tx
163 IntDefaultHandler, // UART7 Rx and Tx
164 IntDefaultHandler, // I2C2 Master and Slave
165 IntDefaultHandler, // I2C3 Master and Slave
166 IntDefaultHandler, // Timer 4 subtimer A
167 IntDefaultHandler, // Timer 4 subtimer B
168 IntDefaultHandler, // Timer 5 subtimer A
169 IntDefaultHandler, // Timer 5 subtimer B
170 IntDefaultHandler, // FPU
171 0, // Reserved
172 0, // Reserved
173 IntDefaultHandler, // I2C4 Master and Slave
174 IntDefaultHandler, // I2C5 Master and Slave
175 IntDefaultHandler, // GPIO Port M
176 IntDefaultHandler, // GPIO Port N
177 0, // Reserved
178 IntDefaultHandler, // Tamper
179 IntDefaultHandler, // GPIO Port P (Summary or P0)
180 IntDefaultHandler, // GPIO Port P1
181 IntDefaultHandler, // GPIO Port P2
182 IntDefaultHandler, // GPIO Port P3
183 IntDefaultHandler, // GPIO Port P4
184 IntDefaultHandler, // GPIO Port P5
185 IntDefaultHandler, // GPIO Port P6
186 IntDefaultHandler, // GPIO Port P7
187 IntDefaultHandler, // GPIO Port Q (Summary or Q0)
188 IntDefaultHandler, // GPIO Port Q1
189 IntDefaultHandler, // GPIO Port Q2
190 IntDefaultHandler, // GPIO Port Q3
191 IntDefaultHandler, // GPIO Port Q4
192 IntDefaultHandler, // GPIO Port Q5
193 IntDefaultHandler, // GPIO Port Q6
194 IntDefaultHandler, // GPIO Port Q7
195 IntDefaultHandler, // GPIO Port R
196 IntDefaultHandler, // GPIO Port S
197 IntDefaultHandler, // SHA/MD5 0
198 IntDefaultHandler, // AES 0
199 IntDefaultHandler, // DES3DES 0
200 IntDefaultHandler, // LCD Controller 0
201 IntDefaultHandler, // Timer 6 subtimer A
202 IntDefaultHandler, // Timer 6 subtimer B
203 IntDefaultHandler, // Timer 7 subtimer A
204 IntDefaultHandler, // Timer 7 subtimer B
205 IntDefaultHandler, // I2C6 Master and Slave
206 IntDefaultHandler, // I2C7 Master and Slave
207 IntDefaultHandler, // HIM Scan Matrix Keyboard 0
208 IntDefaultHandler, // One Wire 0
209 IntDefaultHandler, // HIM PS/2 0
210 IntDefaultHandler, // HIM LED Sequencer 0
211 IntDefaultHandler, // HIM Consumer IR 0
212 IntDefaultHandler, // I2C8 Master and Slave
213 IntDefaultHandler, // I2C9 Master and Slave
214 IntDefaultHandler // GPIO Port T
215 };
216
217 //*****************************************************************************
218 //
219 // This is the code that gets called when the processor first starts execution
220 // following a reset event. Only the absolutely necessary set is performed,
221 // after which the application supplied entry() routine is called. Any fancy
222 // actions (such as making decisions based on the reset cause register, and
223 // resetting the bits in that register) are left solely in the hands of the
224 // application.
225 //
226 //*****************************************************************************
227 void
ResetISR(void)228 ResetISR(void)
229 {
230 //
231 // Enable the floating-point unit. This must be done here to handle the
232 // case where main() uses floating-point and the function prologue saves
233 // floating-point registers (which will fault if floating-point is not
234 // enabled). Any configuration of the floating-point unit using DriverLib
235 // APIs must be done here prior to the floating-point unit being enabled.
236 //
237 // Note that this does not use DriverLib since it might not be included in
238 // this project.
239 //
240 HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) &
241 ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) |
242 NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL);
243
244 //
245 // Call the application's entry point.
246 //
247 __iar_program_start();
248 }
249
250 //*****************************************************************************
251 //
252 // This is the code that gets called when the processor receives a NMI. This
253 // simply enters an infinite loop, preserving the system state for examination
254 // by a debugger.
255 //
256 //*****************************************************************************
257 static void
NmiSR(void)258 NmiSR(void)
259 {
260 //
261 // Enter an infinite loop.
262 //
263 while(1)
264 {
265 }
266 }
267
268 //*****************************************************************************
269 //
270 // This is the code that gets called when the processor receives a fault
271 // interrupt. This simply enters an infinite loop, preserving the system state
272 // for examination by a debugger.
273 //
274 //*****************************************************************************
275 static void
FaultISR(void)276 FaultISR(void)
277 {
278 //
279 // Enter an infinite loop.
280 //
281 while(1)
282 {
283 }
284 }
285
286 //*****************************************************************************
287 //
288 // This is the code that gets called when the processor receives an unexpected
289 // interrupt. This simply enters an infinite loop, preserving the system state
290 // for examination by a debugger.
291 //
292 //*****************************************************************************
293 static void
IntDefaultHandler(void)294 IntDefaultHandler(void)
295 {
296 //
297 // Go into an infinite loop.
298 //
299 while(1)
300 {
301 }
302 }
303