1;/*---------------------------------------------------------------------------------------------------------*/ 2;/* Holtek Semiconductor Inc. */ 3;/* */ 4;/* Copyright (C) Holtek Semiconductor Inc. */ 5;/* All rights reserved. */ 6;/* */ 7;/*----------------------------------------------------------------------------------------------------------- 8; File Name : startup_ht32f5xxxx_08.s 9; Version : $Rev:: 7595 $ 10; Date : $Date:: 2024-02-23 #$ 11; Description : Startup code. 12;-----------------------------------------------------------------------------------------------------------*/ 13 14; Supported Device 15; ======================================== 16; HT32F65230, HT32F65240 17; HT32F65232 18; MXTX6306 19; HT50F3200S 20 21;/* <<< Use Configuration Wizard in Context Menu >>> */ 22 23;// <o> HT32 Device 24;// <i> Select HT32 Device for the assembly setting. 25;// <i> Notice that the project's Asm Define has the higher priority. 26;// <0=> By Project Asm Define 27;// <12=> HT32F65230_40 28;// <18=> HT32F65232 29;// <12=> MXTX6306 30;// <12=> HT50F3200S 31USE_HT32_CHIP_SET EQU 12 ; Notice that the project's Asm Define has the higher priority. 32 33_HT32FWID EQU 0xFFFFFFFF 34;_HT32FWID EQU 0x00065230 35;_HT32FWID EQU 0x00065240 36;_HT32FWID EQU 0x00065232 37;_HT32FWID EQU 0x00006306 38;_HT32FWID EQU 0x0003200F 39 40HT32F65230_40 EQU 12 41HT32F65232 EQU 18 42MXTX6306 EQU 12 43HT50F3200S EQU 12 44 45 IF USE_HT32_CHIP_SET=0 46 ; Use project's Asm Define setting (default) 47 ELSE 48 IF :DEF:USE_HT32_CHIP 49 ; Use project's Asm Define setting (higher priority than the "USE_HT32_CHIP_SET") 50 ELSE 51 ; Use "USE_HT32_CHIP_SET" in the "startup_ht32xxxxx_xx.s" file 52USE_HT32_CHIP EQU USE_HT32_CHIP_SET 53 ENDIF 54 ENDIF 55 56; Amount of memory (in bytes) allocated for Stack and Heap 57; Tailor those values to your application needs 58 59;// <o> Stack Location 60;// <0=> After the RW/ZI/Heap (Default) 61;// <1=> On the top of the SRAM (The end of the SRAM) 62USE_STACK_ON_TOP EQU 0 63 64;// <o> Stack Size (in Bytes, must 8 byte aligned) <0-8192:8> 65;// <i> Only meanful when the Stack Location = "After the RW/ZI/Heap" (USE_STACK_ON_TOP = 0). 66Stack_Size EQU 512 67 68 AREA STACK, NOINIT, READWRITE, ALIGN = 3 69__HT_check_sp 70Stack_Mem SPACE Stack_Size 71 IF (USE_STACK_ON_TOP = 1) 72__initial_sp EQU 0x20000000 + USE_LIBCFG_RAM_SIZE 73 ELSE 74__initial_sp 75 ENDIF 76 77;// <o> Heap Size (in Bytes) <0-8192:8> 78Heap_Size EQU 0 79 80 AREA HEAP, NOINIT, READWRITE, ALIGN = 3 81__HT_check_heap 82__heap_base 83Heap_Mem SPACE Heap_Size 84__heap_limit 85 86 PRESERVE8 87 THUMB 88 89;******************************************************************************* 90; Fill-up the Vector Table entries with the exceptions ISR address 91;******************************************************************************* 92 AREA RESET, CODE, READONLY 93 EXPORT __Vectors 94_RESERVED EQU 0xFFFFFFFF 95__Vectors 96 DCD __initial_sp ; ---, 00, 0x000, Top address of Stack 97 DCD Reset_Handler ; ---, 01, 0x004, Reset Handler 98 DCD NMI_Handler ; -14, 02, 0x008, NMI Handler 99 DCD HardFault_Handler ; -13, 03, 0x00C, Hard Fault Handler 100 DCD _RESERVED ; ---, 04, 0x010, Reserved 101 DCD _RESERVED ; ---, 05, 0x014, Reserved 102 DCD _RESERVED ; ---, 06, 0x018, Reserved 103 DCD _RESERVED ; ---, 07, 0x01C, Reserved 104 DCD _HT32FWID ; ---, 08, 0x020, Reserved 105 DCD _RESERVED ; ---, 09, 0x024, Reserved 106 DCD _RESERVED ; ---, 10, 0x028, Reserved 107 DCD SVC_Handler ; -05, 11, 0x02C, SVC Handler 108 DCD _RESERVED ; ---, 12, 0x030, Reserved 109 DCD _RESERVED ; ---, 13, 0x034, Reserved 110 DCD PendSV_Handler ; -02, 14, 0x038, PendSV Handler 111 DCD SysTick_Handler ; -01, 15, 0x03C, SysTick Handler 112 113 ; External Interrupt Handler 114 DCD LVD_BOD_IRQHandler ; 00, 16, 0x040, 115 DCD RTC_IRQHandler ; 01, 17, 0x044, 116 DCD FLASH_IRQHandler ; 02, 18, 0x048, 117 DCD EVWUP_IRQHandler ; 03, 19, 0x04C, 118 DCD EXTI0_1_IRQHandler ; 04, 20, 0x050, 119 DCD EXTI2_3_IRQHandler ; 05, 21, 0x054, 120 DCD EXTI4_9_IRQHandler ; 06, 22, 0x058, 121 DCD EXTI10_15_IRQHandler ; 07, 23, 0x05C, 122 DCD ADC0_IRQHandler ; 08, 24, 0x060, 123 IF (USE_HT32_CHIP=HT32F65230_40) 124 DCD ADC1_IRQHandler ; 09, 25, 0x064, 125 ELSE 126 DCD _RESERVED ; 09, 25, 0x064, 127 ENDIF 128 DCD MCTM0_BRK_IRQHandler ; 10, 26, 0x068, 129 DCD MCTM0_UP_IRQHandler ; 11, 27, 0x06C, 130 DCD MCTM0_TR_UP2_IRQHandler ; 12, 28, 0x070, 131 DCD MCTM0_CC_IRQHandler ; 13, 29, 0x074, 132 DCD GPTM0_G_IRQHandler ; 14, 30, 0x078, 133 DCD GPTM0_VCLK_IRQHandler ; 15, 31, 0x07C, 134 DCD BFTM0_IRQHandler ; 16, 32, 0x080, 135 DCD BFTM1_IRQHandler ; 17, 33, 0x084, 136 DCD CMP0_IRQHandler ; 18, 34, 0x088, 137 DCD CMP1_IRQHandler ; 19, 35, 0x08C, 138 IF (USE_HT32_CHIP=HT32F65230_40) 139 DCD CMP2_IRQHandler ; 20, 36, 0x090, 140 ELSE 141 DCD _RESERVED ; 20, 36, 0x090, 142 ENDIF 143 DCD I2C0_IRQHandler ; 21, 37, 0x094, 144 DCD SPI0_IRQHandler ; 22, 38, 0x098, 145 DCD USART0_IRQHandler ; 23, 39, 0x09C, 146 DCD UART0_IRQHandler ; 24, 40, 0x0A0, 147 DCD PDMA_CH0_1_IRQHandler ; 25, 41, 0x0A4, 148 DCD PDMA_CH2_3_IRQHandler ; 26, 42, 0x0A8, 149 DCD PDMA_CH4_5_IRQHandler ; 27, 43, 0x0AC, 150 DCD SCTM0_IRQHandler ; 28, 44, 0x0B0, 151 DCD SCTM1_IRQHandler ; 29, 45, 0x0B4, 152 DCD SCTM2_IRQHandler ; 30, 46, 0x0B8, 153 DCD SCTM3_IRQHandler ; 31, 47, 0x0BC, 154 155; Reset handler routine 156Reset_Handler PROC 157 EXPORT Reset_Handler [WEAK] 158 IMPORT SystemInit 159 IMPORT __main 160 LDR R0, =SystemInit 161 BLX R0 162 LDR R0, =__main 163 BX R0 164 ENDP 165 166; Dummy Exception Handlers 167NMI_Handler PROC 168 EXPORT NMI_Handler [WEAK] 169 B . 170 ENDP 171 172HardFault_Handler PROC 173 EXPORT HardFault_Handler [WEAK] 174 B . 175 ENDP 176 177SVC_Handler PROC 178 EXPORT SVC_Handler [WEAK] 179 B . 180 ENDP 181 182PendSV_Handler PROC 183 EXPORT PendSV_Handler [WEAK] 184 B . 185 ENDP 186 187SysTick_Handler PROC 188 EXPORT SysTick_Handler [WEAK] 189 B . 190 ENDP 191 192Default_Handler PROC 193 EXPORT LVD_BOD_IRQHandler [WEAK] 194 EXPORT RTC_IRQHandler [WEAK] 195 EXPORT FLASH_IRQHandler [WEAK] 196 EXPORT EVWUP_IRQHandler [WEAK] 197 EXPORT EXTI0_1_IRQHandler [WEAK] 198 EXPORT EXTI2_3_IRQHandler [WEAK] 199 EXPORT EXTI4_9_IRQHandler [WEAK] 200 EXPORT EXTI10_15_IRQHandler [WEAK] 201 EXPORT ADC0_IRQHandler [WEAK] 202 EXPORT ADC1_IRQHandler [WEAK] 203 EXPORT MCTM0_BRK_IRQHandler [WEAK] 204 EXPORT MCTM0_UP_IRQHandler [WEAK] 205 EXPORT MCTM0_TR_UP2_IRQHandler [WEAK] 206 EXPORT MCTM0_CC_IRQHandler [WEAK] 207 EXPORT GPTM0_G_IRQHandler [WEAK] 208 EXPORT GPTM0_VCLK_IRQHandler [WEAK] 209 EXPORT BFTM0_IRQHandler [WEAK] 210 EXPORT BFTM1_IRQHandler [WEAK] 211 EXPORT CMP0_IRQHandler [WEAK] 212 EXPORT CMP1_IRQHandler [WEAK] 213 EXPORT CMP2_IRQHandler [WEAK] 214 EXPORT I2C0_IRQHandler [WEAK] 215 EXPORT SPI0_IRQHandler [WEAK] 216 EXPORT USART0_IRQHandler [WEAK] 217 EXPORT UART0_IRQHandler [WEAK] 218 EXPORT PDMA_CH0_1_IRQHandler [WEAK] 219 EXPORT PDMA_CH2_3_IRQHandler [WEAK] 220 EXPORT PDMA_CH4_5_IRQHandler [WEAK] 221 EXPORT SCTM0_IRQHandler [WEAK] 222 EXPORT SCTM1_IRQHandler [WEAK] 223 EXPORT SCTM2_IRQHandler [WEAK] 224 EXPORT SCTM3_IRQHandler [WEAK] 225LVD_BOD_IRQHandler 226RTC_IRQHandler 227FLASH_IRQHandler 228EVWUP_IRQHandler 229EXTI0_1_IRQHandler 230EXTI2_3_IRQHandler 231EXTI4_9_IRQHandler 232EXTI10_15_IRQHandler 233ADC0_IRQHandler 234ADC1_IRQHandler 235MCTM0_BRK_IRQHandler 236MCTM0_UP_IRQHandler 237MCTM0_TR_UP2_IRQHandler 238MCTM0_CC_IRQHandler 239GPTM0_G_IRQHandler 240GPTM0_VCLK_IRQHandler 241BFTM0_IRQHandler 242BFTM1_IRQHandler 243CMP0_IRQHandler 244CMP1_IRQHandler 245CMP2_IRQHandler 246I2C0_IRQHandler 247SPI0_IRQHandler 248USART0_IRQHandler 249UART0_IRQHandler 250PDMA_CH0_1_IRQHandler 251PDMA_CH2_3_IRQHandler 252PDMA_CH4_5_IRQHandler 253SCTM0_IRQHandler 254SCTM1_IRQHandler 255SCTM2_IRQHandler 256SCTM3_IRQHandler 257 B . 258 ENDP 259 260 ALIGN 261 262;******************************************************************************* 263; User Stack and Heap initialization 264;******************************************************************************* 265 EXPORT __HT_check_heap 266 EXPORT __HT_check_sp 267 268 IF :DEF:__MICROLIB 269 270 EXPORT __initial_sp 271 EXPORT __heap_base 272 EXPORT __heap_limit 273 274 ELSE 275 276 IMPORT __use_two_region_memory 277 EXPORT __user_initial_stackheap 278__user_initial_stackheap 279 280 IF (USE_STACK_ON_TOP = 1) 281 LDR R0, = Heap_Mem 282 LDR R1, = (0x20000000 + USE_LIBCFG_RAM_SIZE) 283 LDR R2, = (Heap_Mem + Heap_Size) 284 LDR R3, = (Heap_Mem + Heap_Size) 285 BX LR 286 ELSE 287 LDR R0, = Heap_Mem 288 LDR R1, = (Stack_Mem + Stack_Size) 289 LDR R2, = (Heap_Mem + Heap_Size) 290 LDR R3, = Stack_Mem 291 BX LR 292 ENDIF 293 294 ALIGN 295 296 ENDIF 297 298 END 299