1 /**
2 ******************************************************************************
3 * @file bl602_l1c.c
4 * @version V1.0
5 * @date
6 * @brief This file is the standard driver c file
7 ******************************************************************************
8 * @attention
9 *
10 * <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
11 *
12 * Redistribution and use in source and binary forms, with or without modification,
13 * are permitted provided that the following conditions are met:
14 * 1. Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright notice,
17 * this list of conditions and the following disclaimer in the documentation
18 * and/or other materials provided with the distribution.
19 * 3. Neither the name of Bouffalo Lab nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 ******************************************************************************
35 */
36
37 #include "bl602_l1c.h"
38 #include "bl602_common.h"
39
40 /** @addtogroup BL602_Peripheral_Driver
41 * @{
42 */
43
44 /** @addtogroup L1C
45 * @{
46 */
47
48 /** @defgroup L1C_Private_Macros
49 * @{
50 */
51
52 /*@} end of group L1C_Private_Macros */
53
54 /** @defgroup L1C_Private_Types
55 * @{
56 */
57
58 /*@} end of group L1C_Private_Types */
59
60 /** @defgroup L1C_Private_Variables
61 * @{
62 */
63 static intCallback_Type *l1cBmxErrIntCbfArra[L1C_BMX_ERR_INT_ALL] = { NULL };
64 static intCallback_Type *l1cBmxToIntCbfArra[L1C_BMX_TO_INT_ALL] = { NULL };
65
66 /*@} end of group L1C_Private_Variables */
67
68 /** @defgroup L1C_Global_Variables
69 * @{
70 */
71
72 /*@} end of group L1C_Global_Variables */
73
74 /** @defgroup L1C_Private_Fun_Declaration
75 * @{
76 */
77
78 /*@} end of group L1C_Private_Fun_Declaration */
79
80 /** @defgroup L1C_Private_Functions
81 * @{
82 */
83
84 /*@} end of group L1C_Private_Functions */
85
86 /** @defgroup L1C_Public_Functions
87 * @{
88 */
89
90 /****************************************************************************/ /**
91 * @brief wrap set
92 *
93 * @param wrap: ENABLE or DISABLE
94 *
95 * @return SUCCESS or ERROR
96 *
97 *******************************************************************************/
98 #ifndef BFLB_USE_ROM_DRIVER
99 __WEAK
L1C_Set_Wrap(BL_Fun_Type wrap)100 BL_Err_Type ATTR_TCM_SECTION L1C_Set_Wrap(BL_Fun_Type wrap)
101 {
102 uint32_t tmpVal = 0;
103 uint8_t cacheEn = 0;
104
105 tmpVal = BL_RD_REG(L1C_BASE, L1C_CONFIG);
106 cacheEn = BL_IS_REG_BIT_SET(L1C_BASE, L1C_CACHEABLE);
107
108 if (cacheEn != 0) {
109 tmpVal = BL_CLR_REG_BIT(tmpVal, L1C_CACHEABLE);
110 BL_WR_REG(L1C_BASE, L1C_CONFIG, tmpVal);
111 }
112
113 tmpVal = BL_RD_REG(L1C_BASE, L1C_CONFIG);
114
115 if (wrap == ENABLE) {
116 tmpVal = BL_CLR_REG_BIT(tmpVal, L1C_WRAP_DIS);
117 } else {
118 tmpVal = BL_SET_REG_BIT(tmpVal, L1C_WRAP_DIS);
119 }
120
121 BL_WR_REG(L1C_BASE, L1C_CONFIG, tmpVal);
122
123 if (cacheEn != 0) {
124 tmpVal = BL_SET_REG_BIT(tmpVal, L1C_CACHEABLE);
125 BL_WR_REG(L1C_BASE, L1C_CONFIG, tmpVal);
126 }
127
128 return SUCCESS;
129 }
130 #endif
131
132 /****************************************************************************/ /**
133 * @brief cache way disable set
134 *
135 * @param disableVal: cache way disable value
136 *
137 * @return SUCCESS or ERROR
138 *
139 *******************************************************************************/
140 #ifndef BFLB_USE_ROM_DRIVER
141 __WEAK
L1C_Set_Way_Disable(uint8_t disableVal)142 BL_Err_Type ATTR_TCM_SECTION L1C_Set_Way_Disable(uint8_t disableVal)
143 {
144 uint32_t tmpVal = 0;
145 uint8_t cacheEn = 0;
146
147 tmpVal = BL_RD_REG(L1C_BASE, L1C_CONFIG);
148 cacheEn = BL_IS_REG_BIT_SET(L1C_BASE, L1C_CACHEABLE);
149
150 if (cacheEn != 0) {
151 tmpVal = BL_CLR_REG_BIT(tmpVal, L1C_CACHEABLE);
152 BL_WR_REG(L1C_BASE, L1C_CONFIG, tmpVal);
153 }
154
155 tmpVal = BL_RD_REG(L1C_BASE, L1C_CONFIG);
156 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, L1C_WAY_DIS, disableVal);
157 BL_WR_REG(L1C_BASE, L1C_CONFIG, tmpVal);
158
159 if (cacheEn != 0) {
160 tmpVal = BL_SET_REG_BIT(tmpVal, L1C_CACHEABLE);
161 BL_WR_REG(L1C_BASE, L1C_CONFIG, tmpVal);
162 }
163
164 return SUCCESS;
165 }
166 #endif
167
168 /****************************************************************************/ /**
169 * @brief Set for ROM 2T access if CPU freq >120MHz
170 *
171 * @param enable: ENABLE or DISABLE
172 *
173 * @return SUCCESS or ERROR
174 *
175 *******************************************************************************/
176 #ifndef BFLB_USE_ROM_DRIVER
177 __WEAK
L1C_IROM_2T_Access_Set(uint8_t enable)178 BL_Err_Type ATTR_TCM_SECTION L1C_IROM_2T_Access_Set(uint8_t enable)
179 {
180 uint32_t tmpVal = 0;
181
182 tmpVal = BL_RD_REG(L1C_BASE, L1C_CONFIG);
183
184 if (enable) {
185 tmpVal = BL_SET_REG_BIT(tmpVal, L1C_IROM_2T_ACCESS);
186 } else {
187 tmpVal = BL_CLR_REG_BIT(tmpVal, L1C_IROM_2T_ACCESS);
188 }
189
190 BL_WR_REG(L1C_BASE, L1C_CONFIG, tmpVal);
191
192 return SUCCESS;
193 }
194 #endif
195
196 /****************************************************************************/ /**
197 * @brief L1C BMX init
198 *
199 * @param l1cBmxCfg: L1C BMX config
200 *
201 * @return SUCCESS or ERROR
202 *
203 *******************************************************************************/
L1C_BMX_Init(L1C_BMX_Cfg_Type * l1cBmxCfg)204 BL_Err_Type L1C_BMX_Init(L1C_BMX_Cfg_Type *l1cBmxCfg)
205 {
206 uint32_t tmpVal = 0;
207
208 CHECK_PARAM((l1cBmxCfg->timeoutEn) <= 0xF);
209
210 tmpVal = BL_RD_REG(L1C_BASE, L1C_CONFIG);
211 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, L1C_BMX_TIMEOUT_EN, l1cBmxCfg->timeoutEn);
212 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, L1C_BMX_ERR_EN, l1cBmxCfg->errEn);
213 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, L1C_BMX_ARB_MODE, l1cBmxCfg->arbMod);
214 BL_WR_REG(L1C_BASE, L1C_CONFIG, tmpVal);
215
216 #ifndef BFLB_USE_HAL_DRIVER
217 Interrupt_Handler_Register(L1C_BMX_ERR_IRQn, L1C_BMX_ERR_IRQHandler);
218 Interrupt_Handler_Register(L1C_BMX_TO_IRQn, L1C_BMX_TO_IRQHandler);
219 #endif
220
221 return SUCCESS;
222 }
223
224 /****************************************************************************/ /**
225 * @brief L1C BMX address monitor enable
226 *
227 * @param None
228 *
229 * @return SUCCESS or ERROR
230 *
231 *******************************************************************************/
L1C_BMX_Addr_Monitor_Enable(void)232 BL_Err_Type L1C_BMX_Addr_Monitor_Enable(void)
233 {
234 uint32_t tmpVal = 0;
235
236 tmpVal = BL_RD_REG(L1C_BASE, L1C_BMX_ERR_ADDR_EN);
237 tmpVal = BL_CLR_REG_BIT(tmpVal, L1C_BMX_ERR_ADDR_DIS);
238 BL_WR_REG(L1C_BASE, L1C_BMX_ERR_ADDR_EN, tmpVal);
239
240 return SUCCESS;
241 }
242
243 /****************************************************************************/ /**
244 * @brief L1C BMX address monitor disable
245 *
246 * @param None
247 *
248 * @return SUCCESS or ERROR
249 *
250 *******************************************************************************/
L1C_BMX_Addr_Monitor_Disable(void)251 BL_Err_Type L1C_BMX_Addr_Monitor_Disable(void)
252 {
253 uint32_t tmpVal = 0;
254
255 tmpVal = BL_RD_REG(L1C_BASE, L1C_BMX_ERR_ADDR_EN);
256 tmpVal = BL_SET_REG_BIT(tmpVal, L1C_BMX_ERR_ADDR_DIS);
257 BL_WR_REG(L1C_BASE, L1C_BMX_ERR_ADDR_EN, tmpVal);
258
259 return SUCCESS;
260 }
261
262 /****************************************************************************/ /**
263 * @brief L1C BMX bus error response enable
264 *
265 * @param None
266 *
267 * @return SUCCESS or ERROR
268 *
269 *******************************************************************************/
L1C_BMX_BusErrResponse_Enable(void)270 BL_Err_Type L1C_BMX_BusErrResponse_Enable(void)
271 {
272 uint32_t tmpVal = 0;
273
274 tmpVal = BL_RD_REG(L1C_BASE, L1C_CONFIG);
275 tmpVal = BL_SET_REG_BIT(tmpVal, L1C_BMX_ERR_EN);
276 BL_WR_REG(L1C_BASE, L1C_CONFIG, tmpVal);
277
278 return SUCCESS;
279 }
280
281 /****************************************************************************/ /**
282 * @brief L1C BMX bus error response disable
283 *
284 * @param None
285 *
286 * @return SUCCESS or ERROR
287 *
288 *******************************************************************************/
L1C_BMX_BusErrResponse_Disable(void)289 BL_Err_Type L1C_BMX_BusErrResponse_Disable(void)
290 {
291 uint32_t tmpVal = 0;
292
293 tmpVal = BL_RD_REG(L1C_BASE, L1C_CONFIG);
294 tmpVal = BL_CLR_REG_BIT(tmpVal, L1C_BMX_ERR_EN);
295 BL_WR_REG(L1C_BASE, L1C_CONFIG, tmpVal);
296
297 return SUCCESS;
298 }
299
300 /****************************************************************************/ /**
301 * @brief Get L1C BMX error status
302 *
303 * @param errType: L1C BMX error status type
304 *
305 * @return SET or RESET
306 *
307 *******************************************************************************/
L1C_BMX_Get_Status(L1C_BMX_BUS_ERR_Type errType)308 BL_Sts_Type L1C_BMX_Get_Status(L1C_BMX_BUS_ERR_Type errType)
309 {
310 uint32_t tmpVal = 0;
311
312 CHECK_PARAM(IS_L1C_BMX_BUS_ERR_TYPE(errType));
313
314 tmpVal = BL_RD_REG(L1C_BASE, L1C_BMX_ERR_ADDR_EN);
315
316 if (errType == L1C_BMX_BUS_ERR_TRUSTZONE_DECODE) {
317 return BL_GET_REG_BITS_VAL(tmpVal, L1C_BMX_ERR_TZ) ? SET : RESET;
318 } else {
319 return BL_GET_REG_BITS_VAL(tmpVal, L1C_BMX_ERR_DEC) ? SET : RESET;
320 }
321 }
322
323 /****************************************************************************/ /**
324 * @brief Get L1C BMX error address
325 *
326 * @param None
327 *
328 * @return NP L1C BMX error address
329 *
330 *******************************************************************************/
L1C_BMX_Get_Err_Addr(void)331 uint32_t L1C_BMX_Get_Err_Addr(void)
332 {
333 return BL_RD_REG(L1C_BASE, L1C_BMX_ERR_ADDR);
334 }
335
336 /****************************************************************************/ /**
337 * @brief L1C BMX error interrupt callback install
338 *
339 * @param intType: L1C BMX error interrupt type
340 * @param cbFun: callback
341 *
342 * @return SUCCESS or ERROR
343 *
344 *******************************************************************************/
L1C_BMX_ERR_INT_Callback_Install(L1C_BMX_ERR_INT_Type intType,intCallback_Type * cbFun)345 BL_Err_Type L1C_BMX_ERR_INT_Callback_Install(L1C_BMX_ERR_INT_Type intType, intCallback_Type *cbFun)
346 {
347 CHECK_PARAM(IS_L1C_BMX_ERR_INT_TYPE(intType));
348
349 l1cBmxErrIntCbfArra[intType] = cbFun;
350
351 return SUCCESS;
352 }
353
354 /****************************************************************************/ /**
355 * @brief L1C BMX ERR interrupt IRQ handler
356 *
357 * @param None
358 *
359 * @return None
360 *
361 *******************************************************************************/
362 #ifndef BFLB_USE_HAL_DRIVER
L1C_BMX_ERR_IRQHandler(void)363 void L1C_BMX_ERR_IRQHandler(void)
364 {
365 L1C_BMX_ERR_INT_Type intType;
366
367 for (intType = L1C_BMX_ERR_INT_ERR; intType < L1C_BMX_ERR_INT_ALL; intType++) {
368 if (l1cBmxErrIntCbfArra[intType] != NULL) {
369 l1cBmxErrIntCbfArra[intType]();
370 }
371 }
372
373 while (1) {
374 MSG("L1C_BMX_ERR_IRQHandler\r\n");
375 BL602_Delay_MS(1000);
376 }
377 }
378 #endif
379
380 /****************************************************************************/ /**
381 * @brief L1C BMX timeout interrupt callback install
382 *
383 * @param intType: L1C BMX timeout interrupt type
384 * @param cbFun: callback
385 *
386 * @return SUCCESS or ERROR
387 *
388 *******************************************************************************/
L1C_BMX_TIMEOUT_INT_Callback_Install(L1C_BMX_TO_INT_Type intType,intCallback_Type * cbFun)389 BL_Err_Type L1C_BMX_TIMEOUT_INT_Callback_Install(L1C_BMX_TO_INT_Type intType, intCallback_Type *cbFun)
390 {
391 CHECK_PARAM(IS_L1C_BMX_TO_INT_TYPE(intType));
392
393 l1cBmxToIntCbfArra[intType] = cbFun;
394
395 return SUCCESS;
396 }
397
398 /****************************************************************************/ /**
399 * @brief L1C BMX Time Out interrupt IRQ handler
400 *
401 * @param None
402 *
403 * @return None
404 *
405 *******************************************************************************/
406 #ifndef BFLB_USE_HAL_DRIVER
L1C_BMX_TO_IRQHandler(void)407 void L1C_BMX_TO_IRQHandler(void)
408 {
409 L1C_BMX_TO_INT_Type intType;
410
411 for (intType = L1C_BMX_TO_INT_TIMEOUT; intType < L1C_BMX_TO_INT_ALL; intType++) {
412 if (l1cBmxToIntCbfArra[intType] != NULL) {
413 l1cBmxToIntCbfArra[intType]();
414 }
415 }
416
417 while (1) {
418 MSG("L1C_BMX_TO_IRQHandler\r\n");
419 BL602_Delay_MS(1000);
420 }
421 }
422 #endif
423
424 /*@} end of group L1C_Public_Functions */
425
426 /*@} end of group L1C */
427
428 /*@} end of group BL602_Peripheral_Driver */
429