1 /**
2 ******************************************************************************
3 * @file bl602_sf_cfg_ext.c
4 * @version V1.0
5 * @date
6 * @brief This file is the standard driver c file
7 ******************************************************************************
8 * @attention
9 *
10 * <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
11 *
12 * Redistribution and use in source and binary forms, with or without modification,
13 * are permitted provided that the following conditions are met:
14 * 1. Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright notice,
17 * this list of conditions and the following disclaimer in the documentation
18 * and/or other materials provided with the distribution.
19 * 3. Neither the name of Bouffalo Lab nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 ******************************************************************************
35 */
36
37 #include "bl602_glb.h"
38 #include "bl602_sf_cfg_ext.h"
39 #include "bflb_sf_cfg.h"
40 #include "bflb_xip_sflash.h"
41 #include "bl602_romdriver.h"
42
43 /** @addtogroup BL602_Peripheral_Driver
44 * @{
45 */
46
47 /** @addtogroup SF_CFG_EXT
48 * @{
49 */
50
51 /** @defgroup SF_CFG_EXT_Private_Macros
52 * @{
53 */
54 #define BFLB_FLASH_CFG_MAGIC "FCFG"
55
56 /*@} end of group SF_CFG_EXT_Private_Macros */
57
58 /** @defgroup SF_CFG_EXT_Private_Types
59 * @{
60 */
61 typedef struct {
62 uint32_t jedec_id;
63 char *name;
64 const spi_flash_cfg_type *cfg;
65 }flash_info_t;
66
67 /*@} end of group SF_CFG_EXT_Private_Types */
68
69 /** @defgroup SF_CFG_EXT_Private_Variables
70 * @{
71 */
72 static const ATTR_TCM_CONST_SECTION spi_flash_cfg_type flashcfg_fm_25q08={
73 .reset_c_read_cmd=0xff,
74 .reset_c_read_cmd_size=3,
75 .mid=0xc8,
76
77 .de_burst_wrap_cmd=0x77,
78 .de_burst_wrap_cmd_dmy_clk=0x3,
79 .de_burst_wrap_data_mode=SF_CTRL_DATA_4_LINES,
80 .de_burst_wrap_data=0xF0,
81
82 /*reg*/
83 .write_enable_cmd=0x06,
84 .wr_enable_index=0x00,
85 .wr_enable_bit=0x01,
86 .wr_enable_read_reg_len=0x01,
87
88 .qe_index=1,
89 .qe_bit=0x01,
90 .qe_write_reg_len=0x02,
91 .qe_read_reg_len=0x1,
92
93 .busy_index=0,
94 .busy_bit=0x00,
95 .busy_read_reg_len=0x1,
96 .release_powerdown=0xab,
97
98 .read_reg_cmd[0]=0x05,
99 .read_reg_cmd[1]=0x35,
100 .write_reg_cmd[0]=0x01,
101 .write_reg_cmd[1]=0x01,
102
103 .fast_read_qio_cmd=0xeb,
104 .fr_qio_dmy_clk=16/8,
105 .c_read_support=1,
106 .c_read_mode=0xa0,
107
108 .burst_wrap_cmd=0x77,
109 .burst_wrap_cmd_dmy_clk=0x3,
110 .burst_wrap_data_mode=SF_CTRL_DATA_4_LINES,
111 .burst_wrap_data=0x40,
112 /*erase*/
113 .chip_erase_cmd=0xc7,
114 .sector_erase_cmd=0x20,
115 .blk32_erase_cmd=0x52,
116 .blk64_erase_cmd=0xd8,
117 /*write*/
118 .page_program_cmd=0x02,
119 .qpage_program_cmd=0x32,
120 .qpp_addr_mode=SF_CTRL_ADDR_1_LINE,
121
122 .io_mode=SF_CTRL_QIO_MODE,
123 .clk_delay=1,
124 .clk_invert=0x01,
125
126 .reset_en_cmd=0x66,
127 .reset_cmd=0x99,
128 .c_rexit=0xff,
129 .wr_enable_write_reg_len=0x00,
130
131 /*id*/
132 .jedec_id_cmd=0x9f,
133 .jedec_id_cmd_dmy_clk=0,
134 .qpi_jedec_id_cmd=0x9f,
135 .qpi_jedec_id_cmd_dmy_clk=0x00,
136 .sector_size=4,
137 .page_size=256,
138
139 /*read*/
140 .fast_read_cmd=0x0b,
141 .fr_dmy_clk=8/8,
142 .qpi_fast_read_cmd =0x0b,
143 .qpi_fr_dmy_clk=8/8,
144 .fast_read_do_cmd=0x3b,
145 .fr_do_dmy_clk=8/8,
146 .fast_read_dio_cmd=0xbb,
147 .fr_dio_dmy_clk=0,
148 .fast_read_qo_cmd=0x6b,
149 .fr_qo_dmy_clk=8/8,
150
151 .qpi_fast_read_qio_cmd=0xeb,
152 .qpi_fr_qio_dmy_clk=16/8,
153 .qpi_page_program_cmd=0x02,
154 .write_vreg_enable_cmd=0x50,
155
156 /* qpi mode */
157 .enter_qpi=0x38,
158 .exit_qpi=0xff,
159
160 /*AC*/
161 .time_e_sector=300,
162 .time_e_32k=1200,
163 .time_e_64k=1200,
164 .time_page_pgm=5,
165 .time_ce=33000,
166 .pd_delay=20,
167 .qe_data=0,
168 };
169
170 static const ATTR_TCM_CONST_SECTION spi_flash_cfg_type flashcfg_gd_md_40d={
171 .reset_c_read_cmd=0xff,
172 .reset_c_read_cmd_size=3,
173 .mid=0x51,
174
175 .de_burst_wrap_cmd=0x77,
176 .de_burst_wrap_cmd_dmy_clk=0x3,
177 .de_burst_wrap_data_mode=SF_CTRL_DATA_4_LINES,
178 .de_burst_wrap_data=0xF0,
179
180 /*reg*/
181 .write_enable_cmd=0x06,
182 .wr_enable_index=0x00,
183 .wr_enable_bit=0x01,
184 .wr_enable_read_reg_len=0x01,
185
186 .qe_index=1,
187 .qe_bit=0x01,
188 .qe_write_reg_len=0x02,
189 .qe_read_reg_len=0x1,
190
191 .busy_index=0,
192 .busy_bit=0x00,
193 .busy_read_reg_len=0x1,
194 .release_powerdown=0xab,
195
196 .read_reg_cmd[0]=0x05,
197 .read_reg_cmd[1]=0x35,
198 .write_reg_cmd[0]=0x01,
199 .write_reg_cmd[1]=0x01,
200
201 .fast_read_qio_cmd=0xeb,
202 .fr_qio_dmy_clk=16/8,
203 .c_read_support=0,
204 .c_read_mode=0xA0,
205
206 .burst_wrap_cmd=0x77,
207 .burst_wrap_cmd_dmy_clk=0x3,
208 .burst_wrap_data_mode=SF_CTRL_DATA_4_LINES,
209 .burst_wrap_data=0x40,
210 /*erase*/
211 .chip_erase_cmd=0xc7,
212 .sector_erase_cmd=0x20,
213 .blk32_erase_cmd=0x52,
214 .blk64_erase_cmd=0xd8,
215 /*write*/
216 .page_program_cmd=0x02,
217 .qpage_program_cmd=0x32,
218 .qpp_addr_mode=SF_CTRL_ADDR_1_LINE,
219
220 .io_mode=0x11,
221 .clk_delay=1,
222 .clk_invert=0x01,
223
224 .reset_en_cmd=0x66,
225 .reset_cmd=0x99,
226 .c_rexit=0xff,
227 .wr_enable_write_reg_len=0x00,
228
229 /*id*/
230 .jedec_id_cmd=0x9f,
231 .jedec_id_cmd_dmy_clk=0,
232 .qpi_jedec_id_cmd=0x9f,
233 .qpi_jedec_id_cmd_dmy_clk=0x00,
234 .sector_size=4,
235 .page_size=256,
236
237 /*read*/
238 .fast_read_cmd=0x0b,
239 .fr_dmy_clk=8/8,
240 .qpi_fast_read_cmd =0x0b,
241 .qpi_fr_dmy_clk=8/8,
242 .fast_read_do_cmd=0x3b,
243 .fr_do_dmy_clk=8/8,
244 .fast_read_dio_cmd=0xbb,
245 .fr_dio_dmy_clk=0,
246 .fast_read_qo_cmd=0x6b,
247 .fr_qo_dmy_clk=8/8,
248
249 .qpi_fast_read_qio_cmd=0xeb,
250 .qpi_fr_qio_dmy_clk=16/8,
251 .qpi_page_program_cmd=0x02,
252 .write_vreg_enable_cmd=0x50,
253
254 /* qpi mode */
255 .enter_qpi=0x38,
256 .exit_qpi=0xff,
257
258 /*AC*/
259 .time_e_sector=300,
260 .time_e_32k=1200,
261 .time_e_64k=1200,
262 .time_page_pgm=5,
263 .time_ce=33000,
264 .pd_delay=20,
265 .qe_data=0,
266 };
267
268 static const ATTR_TCM_CONST_SECTION spi_flash_cfg_type flashcfg_xm25qh16={
269 .reset_c_read_cmd=0xff,
270 .reset_c_read_cmd_size=3,
271 .mid=0x20,
272
273 .de_burst_wrap_cmd=0x77,
274 .de_burst_wrap_cmd_dmy_clk=0x3,
275 .de_burst_wrap_data_mode=SF_CTRL_DATA_4_LINES,
276 .de_burst_wrap_data=0xF0,
277
278 /*reg*/
279 .write_enable_cmd=0x06,
280 .wr_enable_index=0x00,
281 .wr_enable_bit=0x01,
282 .wr_enable_read_reg_len=0x01,
283
284 .qe_index=1,
285 .qe_bit=0x01,
286 .qe_write_reg_len=0x01,
287 .qe_read_reg_len=0x1,
288
289 .busy_index=0,
290 .busy_bit=0x00,
291 .busy_read_reg_len=0x1,
292 .release_powerdown=0xab,
293
294 .read_reg_cmd[0]=0x05,
295 .read_reg_cmd[1]=0x35,
296 .write_reg_cmd[0]=0x01,
297 .write_reg_cmd[1]=0x31,
298
299 .fast_read_qio_cmd=0xeb,
300 .fr_qio_dmy_clk=16/8,
301 .c_read_support=1,
302 .c_read_mode=0x20,
303
304 .burst_wrap_cmd=0x77,
305 .burst_wrap_cmd_dmy_clk=0x3,
306 .burst_wrap_data_mode=SF_CTRL_DATA_4_LINES,
307 .burst_wrap_data=0x40,
308 /*erase*/
309 .chip_erase_cmd=0xc7,
310 .sector_erase_cmd=0x20,
311 .blk32_erase_cmd=0x52,
312 .blk64_erase_cmd=0xd8,
313 /*write*/
314 .page_program_cmd=0x02,
315 .qpage_program_cmd=0x32,
316 .qpp_addr_mode=SF_CTRL_ADDR_1_LINE,
317
318 .io_mode=SF_CTRL_QIO_MODE,
319 .clk_delay=1,
320 .clk_invert=0x01,
321
322 .reset_en_cmd=0x66,
323 .reset_cmd=0x99,
324 .c_rexit=0xff,
325 .wr_enable_write_reg_len=0x00,
326
327 /*id*/
328 .jedec_id_cmd=0x9f,
329 .jedec_id_cmd_dmy_clk=0,
330 .qpi_jedec_id_cmd=0x9f,
331 .qpi_jedec_id_cmd_dmy_clk=0x00,
332 .sector_size=4,
333 .page_size=256,
334
335 /*read*/
336 .fast_read_cmd=0x0b,
337 .fr_dmy_clk=8/8,
338 .qpi_fast_read_cmd =0x0b,
339 .qpi_fr_dmy_clk=8/8,
340 .fast_read_do_cmd=0x3b,
341 .fr_do_dmy_clk=8/8,
342 .fast_read_dio_cmd=0xbb,
343 .fr_dio_dmy_clk=0,
344 .fast_read_qo_cmd=0x6b,
345 .fr_qo_dmy_clk=8/8,
346
347 .qpi_fast_read_qio_cmd=0xeb,
348 .qpi_fr_qio_dmy_clk=16/8,
349 .qpi_page_program_cmd=0x02,
350 .write_vreg_enable_cmd=0x50,
351
352 /* qpi mode */
353 .enter_qpi=0x38,
354 .exit_qpi=0xff,
355
356 /*AC*/
357 .time_e_sector=400,
358 .time_e_32k=1600,
359 .time_e_64k=2000,
360 .time_page_pgm=5,
361 .time_ce=33000,
362 .pd_delay=3,
363 .qe_data=0,
364 };
365
366 static const ATTR_TCM_CONST_SECTION spi_flash_cfg_type flashcfg_mx_kh25={
367 .reset_c_read_cmd=0xff,
368 .reset_c_read_cmd_size=3,
369 .mid=0xc2,
370
371 .de_burst_wrap_cmd=0x77,
372 .de_burst_wrap_cmd_dmy_clk=0x3,
373 .de_burst_wrap_data_mode=SF_CTRL_DATA_4_LINES,
374 .de_burst_wrap_data=0xF0,
375
376 /*reg*/
377 .write_enable_cmd=0x06,
378 .wr_enable_index=0x00,
379 .wr_enable_bit=0x01,
380 .wr_enable_read_reg_len=0x01,
381
382 .qe_index=1,
383 .qe_bit=0x01,
384 .qe_write_reg_len=0x01,
385 .qe_read_reg_len=0x1,
386
387 .busy_index=0,
388 .busy_bit=0x00,
389 .busy_read_reg_len=0x1,
390 .release_powerdown=0xab,
391
392 .read_reg_cmd[0]=0x05,
393 .read_reg_cmd[1]=0x00,
394 .write_reg_cmd[0]=0x01,
395 .write_reg_cmd[1]=0x00,
396
397 .fast_read_qio_cmd=0xeb,
398 .fr_qio_dmy_clk=16/8,
399 .c_read_support=0,
400 .c_read_mode=0x20,
401
402 .burst_wrap_cmd=0x77,
403 .burst_wrap_cmd_dmy_clk=0x3,
404 .burst_wrap_data_mode=SF_CTRL_DATA_4_LINES,
405 .burst_wrap_data=0x40,
406 /*erase*/
407 .chip_erase_cmd=0xc7,
408 .sector_erase_cmd=0x20,
409 .blk32_erase_cmd=0x52,
410 .blk64_erase_cmd=0xd8,
411 /*write*/
412 .page_program_cmd=0x02,
413 .qpage_program_cmd=0x32,
414 .qpp_addr_mode=SF_CTRL_ADDR_1_LINE,
415
416 .io_mode=0x11,
417 .clk_delay=1,
418 .clk_invert=0x01,
419
420 .reset_en_cmd=0x66,
421 .reset_cmd=0x99,
422 .c_rexit=0xff,
423 .wr_enable_write_reg_len=0x00,
424
425 /*id*/
426 .jedec_id_cmd=0x9f,
427 .jedec_id_cmd_dmy_clk=0,
428 .qpi_jedec_id_cmd=0x9f,
429 .qpi_jedec_id_cmd_dmy_clk=0x00,
430 .sector_size=4,
431 .page_size=256,
432
433 /*read*/
434 .fast_read_cmd=0x0b,
435 .fr_dmy_clk=8/8,
436 .qpi_fast_read_cmd =0x0b,
437 .qpi_fr_dmy_clk=8/8,
438 .fast_read_do_cmd=0x3b,
439 .fr_do_dmy_clk=8/8,
440 .fast_read_dio_cmd=0xbb,
441 .fr_dio_dmy_clk=0,
442 .fast_read_qo_cmd=0x6b,
443 .fr_qo_dmy_clk=8/8,
444
445 .qpi_fast_read_qio_cmd=0xeb,
446 .qpi_fr_qio_dmy_clk=16/8,
447 .qpi_page_program_cmd=0x02,
448 .write_vreg_enable_cmd=0x50,
449
450 /* qpi mode */
451 .enter_qpi=0x38,
452 .exit_qpi=0xff,
453
454 /*AC*/
455 .time_e_sector=300,
456 .time_e_32k=1200,
457 .time_e_64k=1200,
458 .time_page_pgm=5,
459 .time_ce=33000,
460 .pd_delay=20,
461 .qe_data=0,
462 };
463
464 static const ATTR_TCM_CONST_SECTION spi_flash_cfg_type flashcfg_zd_25q16b={
465 .reset_c_read_cmd=0xff,
466 .reset_c_read_cmd_size=3,
467 .mid=0xba,
468
469 .de_burst_wrap_cmd=0x77,
470 .de_burst_wrap_cmd_dmy_clk=0x3,
471 .de_burst_wrap_data_mode=SF_CTRL_DATA_4_LINES,
472 .de_burst_wrap_data=0xF0,
473
474 /*reg*/
475 .write_enable_cmd=0x06,
476 .wr_enable_index=0x00,
477 .wr_enable_bit=0x01,
478 .wr_enable_read_reg_len=0x01,
479
480 .qe_index=1,
481 .qe_bit=0x01,
482 .qe_write_reg_len=0x02,
483 .qe_read_reg_len=0x1,
484
485 .busy_index=0,
486 .busy_bit=0x00,
487 .busy_read_reg_len=0x1,
488 .release_powerdown=0xab,
489
490 .read_reg_cmd[0]=0x05,
491 .read_reg_cmd[1]=0x35,
492 .write_reg_cmd[0]=0x01,
493 .write_reg_cmd[1]=0x01,
494
495 .fast_read_qio_cmd=0xeb,
496 .fr_qio_dmy_clk=16/8,
497 .c_read_support=1,
498 .c_read_mode=0xa0,
499
500 .burst_wrap_cmd=0x77,
501 .burst_wrap_cmd_dmy_clk=0x3,
502 .burst_wrap_data_mode=SF_CTRL_DATA_4_LINES,
503 .burst_wrap_data=0x40,
504 /*erase*/
505 .chip_erase_cmd=0xc7,
506 .sector_erase_cmd=0x20,
507 .blk32_erase_cmd=0x52,
508 .blk64_erase_cmd=0xd8,
509 /*write*/
510 .page_program_cmd=0x02,
511 .qpage_program_cmd=0x32,
512 .qpp_addr_mode=SF_CTRL_ADDR_1_LINE,
513
514 .io_mode=0x14,
515 .clk_delay=1,
516 .clk_invert=0x01,
517
518 .reset_en_cmd=0x66,
519 .reset_cmd=0x99,
520 .c_rexit=0xff,
521 .wr_enable_write_reg_len=0x00,
522
523 /*id*/
524 .jedec_id_cmd=0x9f,
525 .jedec_id_cmd_dmy_clk=0,
526 .qpi_jedec_id_cmd=0x9f,
527 .qpi_jedec_id_cmd_dmy_clk=0x00,
528 .sector_size=4,
529 .page_size=256,
530
531 /*read*/
532 .fast_read_cmd=0x0b,
533 .fr_dmy_clk=8/8,
534 .qpi_fast_read_cmd =0x0b,
535 .qpi_fr_dmy_clk=8/8,
536 .fast_read_do_cmd=0x3b,
537 .fr_do_dmy_clk=8/8,
538 .fast_read_dio_cmd=0xbb,
539 .fr_dio_dmy_clk=0,
540 .fast_read_qo_cmd=0x6b,
541 .fr_qo_dmy_clk=8/8,
542
543 .qpi_fast_read_qio_cmd=0xeb,
544 .qpi_fr_qio_dmy_clk=16/8,
545 .qpi_page_program_cmd=0x02,
546 .write_vreg_enable_cmd=0x50,
547
548 /* qpi mode */
549 .enter_qpi=0x38,
550 .exit_qpi=0xff,
551
552 /*AC*/
553 .time_e_sector=300,
554 .time_e_32k=1200,
555 .time_e_64k=1200,
556 .time_page_pgm=5,
557 .time_ce=33000,
558 .pd_delay=20,
559 .qe_data=0,
560 };
561
562 static const ATTR_TCM_CONST_SECTION flash_info_t flash_infos[]={
563 {
564 .jedec_id=0x1440A1,
565 //.name="FM_25Q08",
566 .cfg=&flashcfg_fm_25q08,
567 },
568 {
569 .jedec_id=0x134051,
570 //.name="GD_MD04D_04_33",
571 .cfg=&flashcfg_gd_md_40d,
572 },
573 {
574 .jedec_id=0x144020,
575 //.name="XM_25QH80_80_33",
576 .cfg=&flashcfg_xm25qh16,
577 },
578 {
579 .jedec_id=0x154020,
580 //.name="XM_25QH16_16_33",
581 .cfg=&flashcfg_xm25qh16,
582 },
583 {
584 .jedec_id=0x164020,
585 //.name="XM_25QH32_32_33",
586 .cfg=&flashcfg_xm25qh16,
587 },
588 {
589 .jedec_id=0x174020,
590 //.name="XM_25QH64_64_33",
591 .cfg=&flashcfg_xm25qh16,
592 },
593 {
594 .jedec_id=0x1320C2,
595 //.name="MX_KH40_04_33",
596 .cfg=&flashcfg_mx_kh25,
597 },
598 {
599 .jedec_id=0x1420C2,
600 //.name="MX_KH80_08_33",
601 .cfg=&flashcfg_mx_kh25,
602 },
603 {
604 .jedec_id=0x1520C2,
605 //.name="MX_KH16_16_33",
606 .cfg=&flashcfg_mx_kh25,
607 },
608 {
609 .jedec_id=0x13325E,
610 //.name="ZB_D40B_80_33",
611 .cfg=&flashcfg_mx_kh25,
612 },
613 {
614 .jedec_id=0x14325E,
615 //.name="ZB_D80B_80_33",
616 .cfg=&flashcfg_mx_kh25,
617 },
618 {
619 .jedec_id=0x15405E,
620 //.name="ZB_25Q16B_15_33",
621 .cfg=&flashcfg_xm25qh16,
622 },
623 {
624 .jedec_id=0x16405E,
625 //.name="ZB_25Q32B_16_33",
626 .cfg=&flashcfg_xm25qh16,
627 },
628 {
629 .jedec_id=0x17405E,
630 //.name="ZB_25VQ64_64_33",
631 .cfg=&flashcfg_xm25qh16,
632 },
633 {
634 .jedec_id=0x15605E,
635 //.name="ZB_25VQ16_16_33",
636 .cfg=&flashcfg_xm25qh16,
637 },
638 {
639 .jedec_id=0x15345E,
640 //.name="ZB_25WQ16_16_33",
641 .cfg=&flashcfg_xm25qh16,
642 },
643 {
644 .jedec_id=0x1560EB,
645 //.name="TH_25Q16",
646 .cfg=&flashcfg_fm_25q08,
647 },
648 {
649 .jedec_id=0x1740C8,
650 //.name="GD_25Q64E_64_33",
651 .cfg=&flashcfg_xm25qh16,
652 },
653 {
654 .jedec_id=0x1840C8,
655 //.name="GD_25Q127C_128_33",
656 .cfg=&flashcfg_xm25qh16,
657 },
658 {
659 .jedec_id=0x176085,
660 //.name="Puya_P25Q64H_64_33",
661 .cfg=&flashcfg_xm25qh16,
662 },
663 {
664 .jedec_id=0x17400B,
665 //.name="XT_25F64B",
666 .cfg=&flashcfg_fm_25q08,
667 },
668 {
669 .jedec_id=0x1560BA,
670 //.name="ZD_25Q16B",
671 .cfg=&flashcfg_zd_25q16b,
672 },
673 {
674 .jedec_id=0x1460CD,
675 //.name="TH_25Q80HB",
676 .cfg=&flashcfg_fm_25q08,
677 },
678 {
679 .jedec_id=0x1870EF,
680 //.name="W25Q128JV_128_33",
681 .cfg=&flashcfg_xm25qh16,
682 },
683 };
684
685 /*@} end of group SF_CFG_EXT_Private_Variables */
686
687 /** @defgroup SF_CFG_EXT_Global_Variables
688 * @{
689 */
690
691 /*@} end of group SF_CFG_EXT_Global_Variables */
692
693 /** @defgroup SF_CFG_EXT_Private_Fun_Declaration
694 * @{
695 */
696
697 /*@} end of group SF_CFG_EXT_Private_Fun_Declaration */
698
699 /** @defgroup SF_CFG_EXT_Public_Functions
700 * @{
701 */
702
703 /****************************************************************************//**
704 * @brief Get flash config according to flash ID
705 *
706 * @param flash_id: Flash ID
707 * @param p_flash_cfg: Flash config pointer
708 * @param group: CPU group id 0 or 1
709 * @param bank: Flash bank select
710 *
711 * @return BFLB_RET:0 means success and other value means error
712 *
713 *******************************************************************************/
bflb_sf_cfg_get_flash_cfg_need_lock_ext(uint32_t flash_id,spi_flash_cfg_type * p_flash_cfg,uint8_t group,uint8_t bank)714 int ATTR_TCM_SECTION bflb_sf_cfg_get_flash_cfg_need_lock_ext(uint32_t flash_id, spi_flash_cfg_type * p_flash_cfg,
715 uint8_t group, uint8_t bank)
716 {
717 uint32_t i;
718 uint8_t buf[sizeof(spi_flash_cfg_type)+8];
719 uint32_t crc,*p_crc;
720 char flash_cfg_magic[] = "FCFG";
721
722 if(flash_id==0){
723 bflb_xip_sflash_read_via_cache_need_lock(8+BL602_FLASH_XIP_BASE,buf,sizeof(spi_flash_cfg_type)+8,group,bank);
724 if(BL602_MemCmp(buf,flash_cfg_magic,4)==0){
725 crc=BFLB_Soft_CRC32((uint8_t *)buf+4,sizeof(spi_flash_cfg_type));
726 p_crc=(uint32_t *)(buf+4+sizeof(spi_flash_cfg_type));
727 if(*p_crc==crc){
728 BL602_MemCpy_Fast(p_flash_cfg,(uint8_t *)buf+4,sizeof(spi_flash_cfg_type));
729 return 0 ;
730 }
731 }
732 }else{
733 if(bflb_sf_cfg_get_flash_cfg_need_lock(flash_id, p_flash_cfg, group, bank) == 0){
734 return 0;
735 }
736 for(i=0;i<sizeof(flash_infos)/sizeof(flash_infos[0]);i++){
737 if(flash_infos[i].jedec_id==flash_id){
738 BL602_MemCpy_Fast(p_flash_cfg,flash_infos[i].cfg,sizeof(spi_flash_cfg_type));
739 return 0;
740 }
741 }
742 }
743
744 return -1;
745 }
746
747 /****************************************************************************//**
748 * @brief Identify one flash
749 *
750 * @param call_from_flash: code run at flash or ram
751 * @param autoScan: Auto scan all GPIO pin
752 * @param flash_in_cfg: Specify flash GPIO config, not auto scan
753 * @param restore_default: Wether restore default flash GPIO config
754 * @param p_flash_cfg: Flash config pointer
755 *
756 * @return Flash ID
757 *
758 *******************************************************************************/
bflb_sf_cfg_flash_identify_ext(uint8_t call_from_flash,uint8_t flash_in_cfg,uint8_t restore_default,spi_flash_cfg_type * p_flash_cfg,uint8_t group,uint8_t bank)759 uint32_t ATTR_TCM_SECTION bflb_sf_cfg_flash_identify_ext(uint8_t call_from_flash, uint8_t flash_in_cfg,
760 uint8_t restore_default, spi_flash_cfg_type * p_flash_cfg, uint8_t group, uint8_t bank)
761 {
762 uint32_t jedec_id=0;
763 uint32_t i=0;
764 uint32_t ret=0;
765
766 ret=bflb_sf_cfg_flash_identify(call_from_flash,flash_in_cfg,restore_default,p_flash_cfg,group,bank);
767 if(call_from_flash){
768 bflb_sflash_set_xip_cfg(p_flash_cfg,p_flash_cfg->io_mode&0xf,1,0,32,bank);
769 }
770 if((ret&BFLB_FLASH_ID_VALID_FLAG)!=0){
771 return ret;
772 }
773
774 jedec_id=(ret&0xffffff);
775 for(i=0;i<sizeof(flash_infos)/sizeof(flash_infos[0]);i++){
776 if(flash_infos[i].jedec_id==jedec_id){
777 BL602_MemCpy_Fast(p_flash_cfg,flash_infos[i].cfg,sizeof(spi_flash_cfg_type));
778 break;
779 }
780 }
781 if(i==sizeof(flash_infos)/sizeof(flash_infos[0])){
782 return jedec_id;
783 }else{
784 return (jedec_id|BFLB_FLASH_ID_VALID_FLAG);
785 }
786 }
787
788 /*@} end of group SF_CFG_EXT_Public_Functions */
789
790 /*@} end of group SF_CFG_EXT */
791
792 /*@} end of group BL602_Peripheral_Driver */
793