1 /**
2 ******************************************************************************
3 * @file bl602_tzc_sec.c
4 * @version V1.0
5 * @date
6 * @brief This file is the standard driver c file
7 ******************************************************************************
8 * @attention
9 *
10 * <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
11 *
12 * Redistribution and use in source and binary forms, with or without modification,
13 * are permitted provided that the following conditions are met:
14 * 1. Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright notice,
17 * this list of conditions and the following disclaimer in the documentation
18 * and/or other materials provided with the distribution.
19 * 3. Neither the name of Bouffalo Lab nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 ******************************************************************************
35 */
36
37 #include "string.h"
38 #include "bl602_tzc_sec.h"
39
40 /** @addtogroup BL602_Peripheral_Driver
41 * @{
42 */
43
44 /** @addtogroup TZC_SEC
45 * @{
46 */
47
48 /** @defgroup TZC_SEC_Private_Macros
49 * @{
50 */
51
52 /*@} end of group TZC_SEC_Private_Macros */
53
54 /** @defgroup TZC_SEC_Private_Types
55 * @{
56 */
57
58 /*@} end of group TZC_SEC_Private_Types */
59
60 /** @defgroup TZC_SEC_Private_Variables
61 * @{
62 */
63
64 /*@} end of group TZC_SEC_Private_Variables */
65
66 /** @defgroup TZC_SEC_Global_Variables
67 * @{
68 */
69
70 /*@} end of group TZC_SEC_Global_Variables */
71
72 /** @defgroup TZC_SEC_Private_Fun_Declaration
73 * @{
74 */
75
76 /*@} end of group TZC_SEC_Private_Fun_Declaration */
77
78 /** @defgroup TZC_SEC_Public_Functions
79 * @{
80 */
81
82 /****************************************************************************/ /**
83 * @brief TZC Security boot set
84 *
85 * @param Val: 0 for security boot start, and 0xf for security boot finished
86 *
87 * @return None
88 *
89 *******************************************************************************/
TZC_Sboot_Set(uint8_t Val)90 void TZC_Sboot_Set(uint8_t Val)
91 {
92 uint32_t tmpVal;
93
94 tmpVal = BL_RD_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM_CTRL);
95
96 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_SBOOT_DONE, Val);
97
98 BL_WR_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM_CTRL, tmpVal);
99 }
100
101 /****************************************************************************/ /**
102 * @brief TZC Set ROM0 R0 protect range
103 *
104 * @param start: Start address to protect
105 * @param length: length to protect
106 *
107 * @return None
108 *
109 *******************************************************************************/
TZC_Set_Rom0_R0_Protect(uint32_t start,uint32_t length)110 void TZC_Set_Rom0_R0_Protect(uint32_t start, uint32_t length)
111 {
112 uint32_t tmpVal;
113 uint32_t alignEnd = (start+length+1023)&~0x3FF;
114
115 /* Set Range */
116 tmpVal = BL_RD_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM0_R0);
117
118 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM0_R0_START, ((start >> 10)&0xffff));
119 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM0_R0_END, ((alignEnd >> 10)&0xffff)-1);
120
121 BL_WR_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM0_R0, tmpVal);
122
123 /* Enable */
124 tmpVal = BL_RD_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM_CTRL);
125
126 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM0_R0_ID0_EN, 0);
127 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM0_R0_ID1_EN, 0);
128 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM0_R0_EN, 1);
129 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM0_R0_LOCK, 1);
130
131 BL_WR_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM_CTRL, tmpVal);
132 }
133
134 /****************************************************************************/ /**
135 * @brief TZC Set ROM0 R1 protect range
136 *
137 * @param start: Start address to protect
138 * @param length: length to protect
139 *
140 * @return None
141 *
142 *******************************************************************************/
TZC_Set_Rom0_R1_Protect(uint32_t start,uint32_t length)143 void TZC_Set_Rom0_R1_Protect(uint32_t start, uint32_t length)
144 {
145 uint32_t tmpVal;
146 uint32_t alignEnd = (start+length+1023)&~0x3FF;
147
148 /* Set Range */
149 tmpVal = BL_RD_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM0_R1);
150
151 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM0_R1_START, ((start >> 10)&0xffff));
152 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM0_R1_END, ((alignEnd >> 10)&0xffff)-1);
153
154 BL_WR_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM0_R1, tmpVal);
155
156 /* Enable */
157 tmpVal = BL_RD_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM_CTRL);
158
159 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM0_R1_ID0_EN, 0);
160 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM0_R1_ID1_EN, 0);
161 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM0_R1_EN, 1);
162 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM0_R1_LOCK, 1);
163
164 BL_WR_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM_CTRL, tmpVal);
165 }
166
167 /****************************************************************************/ /**
168 * @brief TZC Set ROM1 R0 protect range
169 *
170 * @param start: Start address to protect
171 * @param length: length to protect
172 *
173 * @return None
174 *
175 *******************************************************************************/
TZC_Set_Rom1_R0_Protect(uint32_t start,uint32_t length)176 void TZC_Set_Rom1_R0_Protect(uint32_t start, uint32_t length)
177 {
178 uint32_t tmpVal;
179 uint32_t alignEnd = (start+length+1023)&~0x3FF;
180
181 /* Set Range */
182 tmpVal = BL_RD_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM1_R0);
183
184 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM1_R0_START, ((start >> 10)&0xffff));
185 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM1_R0_END, ((alignEnd >> 10)&0xffff)-1);
186
187 BL_WR_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM1_R0, tmpVal);
188
189 /* Enable */
190 tmpVal = BL_RD_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM_CTRL);
191
192 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM1_R0_ID0_EN, 0);
193 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM1_R0_ID1_EN, 0);
194 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM1_R0_EN, 1);
195 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM1_R0_LOCK, 1);
196
197 BL_WR_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM_CTRL, tmpVal);
198 }
199
200 /****************************************************************************/ /**
201 * @brief TZC Set ROM1 R1 protect range
202 *
203 * @param start: Start address to protect
204 * @param length: length to protect
205 *
206 * @return None
207 *
208 *******************************************************************************/
TZC_Set_Rom1_R1_Protect(uint32_t start,uint32_t length)209 void TZC_Set_Rom1_R1_Protect(uint32_t start, uint32_t length)
210 {
211 uint32_t tmpVal;
212 uint32_t alignEnd = (start+length+1023)&~0x3FF;
213
214 /* Set Range */
215 tmpVal = BL_RD_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM1_R1);
216
217 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM1_R1_START, ((start >> 10)&0xffff));
218 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM1_R1_END, ((alignEnd >> 10)&0xffff)-1);
219
220 BL_WR_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM1_R1, tmpVal);
221
222 /* Enable */
223 tmpVal = BL_RD_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM_CTRL);
224
225 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM1_R1_ID0_EN, 0);
226 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM1_R1_ID1_EN, 0);
227 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM1_R1_EN, 1);
228 tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TZC_SEC_TZC_ROM1_R1_LOCK, 1);
229
230 BL_WR_REG(TZC_SEC_BASE, TZC_SEC_TZC_ROM_CTRL, tmpVal);
231 }
232
233 /*@} end of group TZC_SEC_Public_Functions */
234
235 /*@} end of group TZC_SEC */
236
237 /*@} end of group BL602_Peripheral_Driver */
238