1 /** 2 ****************************************************************************** 3 * @file stm32l1xx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32L1xx_HAL_PWR_H 22 #define __STM32L1xx_HAL_PWR_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32l1xx_hal_def.h" 30 31 /** @addtogroup STM32L1xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup PWR 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 41 /** @defgroup PWR_Exported_Types PWR Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief PWR PVD configuration structure definition 47 */ 48 typedef struct 49 { 50 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 51 This parameter can be a value of @ref PWR_PVD_detection_level */ 52 53 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 54 This parameter can be a value of @ref PWR_PVD_Mode */ 55 }PWR_PVDTypeDef; 56 57 /** 58 * @} 59 */ 60 61 /* Internal constants --------------------------------------------------------*/ 62 63 /** @addtogroup PWR_Private_Constants 64 * @{ 65 */ 66 #define PWR_EXTI_LINE_PVD (0x00010000U) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ 67 68 /** 69 * @} 70 */ 71 72 73 74 /* Exported constants --------------------------------------------------------*/ 75 76 /** @defgroup PWR_Exported_Constants PWR Exported Constants 77 * @{ 78 */ 79 80 /** @defgroup PWR_register_alias_address PWR Register alias address 81 * @{ 82 */ 83 /* ------------- PWR registers bit address in the alias region ---------------*/ 84 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) 85 #define PWR_CR_OFFSET 0x00 86 #define PWR_CSR_OFFSET 0x04 87 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) 88 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) 89 /** 90 * @} 91 */ 92 93 /** @defgroup PWR_CR_register_alias PWR CR Register alias address 94 * @{ 95 */ 96 /* --- CR Register ---*/ 97 /* Alias word address of LPSDSR bit */ 98 #define LPSDSR_BIT_NUMBER POSITION_VAL(PWR_CR_LPSDSR) 99 #define CR_LPSDSR_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPSDSR_BIT_NUMBER * 4))) 100 101 /* Alias word address of DBP bit */ 102 #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP) 103 #define CR_DBP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (DBP_BIT_NUMBER * 4))) 104 105 /* Alias word address of LPRUN bit */ 106 #define LPRUN_BIT_NUMBER POSITION_VAL(PWR_CR_LPRUN) 107 #define CR_LPRUN_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPRUN_BIT_NUMBER * 4))) 108 109 /* Alias word address of PVDE bit */ 110 #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE) 111 #define CR_PVDE_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PVDE_BIT_NUMBER * 4))) 112 113 /* Alias word address of FWU bit */ 114 #define FWU_BIT_NUMBER POSITION_VAL(PWR_CR_FWU) 115 #define CR_FWU_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FWU_BIT_NUMBER * 4))) 116 117 /* Alias word address of ULP bit */ 118 #define ULP_BIT_NUMBER POSITION_VAL(PWR_CR_ULP) 119 #define CR_ULP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ULP_BIT_NUMBER * 4))) 120 /** 121 * @} 122 */ 123 124 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address 125 * @{ 126 */ 127 128 /* --- CSR Register ---*/ 129 /* Alias word address of EWUP1, EWUP2 and EWUP3 bits */ 130 #define CSR_EWUP_BB(VAL) ((uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (POSITION_VAL(VAL) * 4))) 131 /** 132 * @} 133 */ 134 135 /** @defgroup PWR_PVD_detection_level PWR PVD detection level 136 * @{ 137 */ 138 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 139 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 140 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 141 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 142 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 143 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 144 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 145 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 /* External input analog voltage 146 (Compare internally to VREFINT) */ 147 148 /** 149 * @} 150 */ 151 152 /** @defgroup PWR_PVD_Mode PWR PVD Mode 153 * @{ 154 */ 155 #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< basic mode is used */ 156 #define PWR_PVD_MODE_IT_RISING (0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */ 157 #define PWR_PVD_MODE_IT_FALLING (0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */ 158 #define PWR_PVD_MODE_IT_RISING_FALLING (0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 159 #define PWR_PVD_MODE_EVENT_RISING (0x00020001U) /*!< Event Mode with Rising edge trigger detection */ 160 #define PWR_PVD_MODE_EVENT_FALLING (0x00020002U) /*!< Event Mode with Falling edge trigger detection */ 161 #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */ 162 163 /** 164 * @} 165 */ 166 167 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode 168 * @{ 169 */ 170 #define PWR_MAINREGULATOR_ON (0x00000000U) 171 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPSDSR 172 173 /** 174 * @} 175 */ 176 177 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 178 * @{ 179 */ 180 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) 181 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) 182 183 /** 184 * @} 185 */ 186 187 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 188 * @{ 189 */ 190 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) 191 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) 192 193 /** 194 * @} 195 */ 196 197 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale 198 * @{ 199 */ 200 201 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS_0 202 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 203 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS 204 205 206 /** 207 * @} 208 */ 209 210 /** @defgroup PWR_Flag PWR Flag 211 * @{ 212 */ 213 #define PWR_FLAG_WU PWR_CSR_WUF 214 #define PWR_FLAG_SB PWR_CSR_SBF 215 #define PWR_FLAG_PVDO PWR_CSR_PVDO 216 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF 217 #define PWR_FLAG_VOS PWR_CSR_VOSF 218 #define PWR_FLAG_REGLP PWR_CSR_REGLPF 219 220 /** 221 * @} 222 */ 223 224 /** 225 * @} 226 */ 227 228 /* Exported macro ------------------------------------------------------------*/ 229 /** @defgroup PWR_Exported_Macros PWR Exported Macros 230 * @{ 231 */ 232 233 /** @brief macros configure the main internal regulator output voltage. 234 * @param __REGULATOR__ specifies the regulator output voltage to achieve 235 * a tradeoff between performance and power consumption when the device does 236 * not operate at the maximum frequency (refer to the datasheets for more details). 237 * This parameter can be one of the following values: 238 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode, 239 * System frequency up to 32 MHz. 240 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode, 241 * System frequency up to 16 MHz. 242 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode, 243 * System frequency up to 4.2 MHz 244 * @retval None 245 */ 246 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__))) 247 248 /** @brief Check PWR flag is set or not. 249 * @param __FLAG__ specifies the flag to check. 250 * This parameter can be one of the following values: 251 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 252 * was received from the WKUP pin or from the RTC alarm (Alarm B), 253 * RTC Tamper event, RTC TimeStamp event or RTC Wakeup. 254 * An additional wakeup event is detected if the WKUP pin is enabled 255 * (by setting the EWUP bit) when the WKUP pin level is already high. 256 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 257 * resumed from StandBy mode. 258 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 259 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 260 * For this reason, this bit is equal to 0 after Standby or reset 261 * until the PVDE bit is set. 262 * @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag. 263 * This bit indicates the state of the internal voltage reference, VREFINT. 264 * @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for 265 * the internal regulator to be ready after the voltage range is changed. 266 * The VOSF bit indicates that the regulator has reached the voltage level 267 * defined with bits VOS of PWR_CR register. 268 * @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run 269 * mode, this bit stays at 1 until the regulator is ready in main mode. 270 * A polling on this bit is recommended to wait for the regulator main mode. 271 * This bit is reset by hardware when the regulator is ready. 272 * @retval The new state of __FLAG__ (TRUE or FALSE). 273 */ 274 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) 275 276 /** @brief Clear the PWR's pending flags. 277 * @param __FLAG__ specifies the flag to clear. 278 * This parameter can be one of the following values: 279 * @arg PWR_FLAG_WU: Wake Up flag 280 * @arg PWR_FLAG_SB: StandBy flag 281 */ 282 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2)) 283 284 /** 285 * @brief Enable interrupt on PVD Exti Line 16. 286 * @retval None. 287 */ 288 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD) 289 290 /** 291 * @brief Disable interrupt on PVD Exti Line 16. 292 * @retval None. 293 */ 294 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD) 295 296 /** 297 * @brief Enable event on PVD Exti Line 16. 298 * @retval None. 299 */ 300 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD) 301 302 /** 303 * @brief Disable event on PVD Exti Line 16. 304 * @retval None. 305 */ 306 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD) 307 308 309 /** 310 * @brief PVD EXTI line configuration: set falling edge trigger. 311 * @retval None. 312 */ 313 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 314 315 316 /** 317 * @brief Disable the PVD Extended Interrupt Falling Trigger. 318 * @retval None. 319 */ 320 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 321 322 323 /** 324 * @brief PVD EXTI line configuration: set rising edge trigger. 325 * @retval None. 326 */ 327 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 328 329 /** 330 * @brief Disable the PVD Extended Interrupt Rising Trigger. 331 * @retval None. 332 */ 333 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 334 335 /** 336 * @brief PVD EXTI line configuration: set rising & falling edge trigger. 337 * @retval None. 338 */ 339 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ 340 do { \ 341 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ 342 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ 343 } while(0) 344 345 /** 346 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 347 * @retval None. 348 */ 349 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ 350 do { \ 351 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ 352 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ 353 } while(0) 354 355 356 357 /** 358 * @brief Check whether the specified PVD EXTI interrupt flag is set or not. 359 * @retval EXTI PVD Line Status. 360 */ 361 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) 362 363 /** 364 * @brief Clear the PVD EXTI flag. 365 * @retval None. 366 */ 367 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) 368 369 /** 370 * @brief Generate a Software interrupt on selected EXTI line. 371 * @retval None. 372 */ 373 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD) 374 375 /** 376 * @} 377 */ 378 379 /* Private macro -------------------------------------------------------------*/ 380 /** @defgroup PWR_Private_Macros PWR Private Macros 381 * @{ 382 */ 383 384 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 385 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 386 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 387 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 388 389 390 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ 391 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ 392 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ 393 ((MODE) == PWR_PVD_MODE_NORMAL)) 394 395 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 396 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 397 398 399 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 400 401 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) ) 402 403 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ 404 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \ 405 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) 406 407 408 /** 409 * @} 410 */ 411 412 413 414 /* Include PWR HAL Extension module */ 415 #include "stm32l1xx_hal_pwr_ex.h" 416 417 /* Exported functions --------------------------------------------------------*/ 418 419 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 420 * @{ 421 */ 422 423 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 424 * @{ 425 */ 426 427 /* Initialization and de-initialization functions *******************************/ 428 void HAL_PWR_DeInit(void); 429 void HAL_PWR_EnableBkUpAccess(void); 430 void HAL_PWR_DisableBkUpAccess(void); 431 432 /** 433 * @} 434 */ 435 436 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 437 * @{ 438 */ 439 440 /* Peripheral Control functions ************************************************/ 441 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 442 void HAL_PWR_EnablePVD(void); 443 void HAL_PWR_DisablePVD(void); 444 445 /* WakeUp pins configuration functions ****************************************/ 446 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); 447 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 448 449 /* Low Power modes configuration functions ************************************/ 450 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 451 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 452 void HAL_PWR_EnterSTANDBYMode(void); 453 454 void HAL_PWR_EnableSleepOnExit(void); 455 void HAL_PWR_DisableSleepOnExit(void); 456 void HAL_PWR_EnableSEVOnPend(void); 457 void HAL_PWR_DisableSEVOnPend(void); 458 459 460 461 void HAL_PWR_PVD_IRQHandler(void); 462 void HAL_PWR_PVDCallback(void); 463 /** 464 * @} 465 */ 466 467 /** 468 * @} 469 */ 470 471 /** 472 * @} 473 */ 474 475 /** 476 * @} 477 */ 478 479 #ifdef __cplusplus 480 } 481 #endif 482 483 484 #endif /* __STM32L1xx_HAL_PWR_H */ 485 486 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 487