1 /* 2 * Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved. 3 * 4 * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in 5 * the the People's Republic of China and other countries. 6 * All Allwinner Technology Co.,Ltd. trademarks are used with permission. 7 * 8 * DISCLAIMER 9 * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. 10 * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.) 11 * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN 12 * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. 13 * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS 14 * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE. 15 * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY. 16 * 17 * 18 * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT 19 * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND, 20 * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING 21 * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE 22 * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. 23 * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 26 * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 28 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 30 * OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef __SUNXI_HAL_MIIPHY_H__ 34 #define __SUNXI_HAL_MIIPHY_H__ 35 36 //#include <common.h> 37 #include <sunxi_hal_mii.h> 38 //#include <sunxi_drv_list.h> 39 //#include <net.h> 40 #include <sunxi_hal_phy.h> 41 42 struct legacy_mii_dev { 43 int (*read)(const char *devname, unsigned char addr, 44 unsigned char reg, unsigned short *value); 45 int (*write)(const char *devname, unsigned char addr, 46 unsigned char reg, unsigned short value); 47 }; 48 49 int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, 50 unsigned short *value); 51 int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, 52 unsigned short value); 53 int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, 54 unsigned char *model, unsigned char *rev); 55 int miiphy_reset(const char *devname, unsigned char addr); 56 int miiphy_speed(const char *devname, unsigned char addr); 57 int miiphy_duplex(const char *devname, unsigned char addr); 58 int miiphy_is_1000base_x(const char *devname, unsigned char addr); 59 #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 60 int miiphy_link(const char *devname, unsigned char addr); 61 #endif 62 63 void miiphy_init(void); 64 65 void miiphy_register(const char *devname, 66 int (*read)(const char *devname, unsigned char addr, 67 unsigned char reg, unsigned short *value), 68 int (*write)(const char *devname, unsigned char addr, 69 unsigned char reg, unsigned short value)); 70 71 int miiphy_set_current_dev(const char *devname); 72 const char *miiphy_get_current_dev(void); 73 struct mii_dev *mdio_get_current_dev(void); 74 struct mii_dev *miiphy_get_dev_by_name(const char *devname); 75 struct phy_device *mdio_phydev_for_ethname(const char *devname); 76 77 void miiphy_listdev(void); 78 79 struct mii_dev *mdio_alloc(void); 80 int mdio_register(struct mii_dev *bus); 81 void mdio_list_devices(void); 82 83 #ifdef CONFIG_BITBANGMII 84 85 #define BB_MII_DEVNAME "bb_miiphy" 86 87 struct bb_miiphy_bus { 88 char name[16]; 89 int (*init)(struct bb_miiphy_bus *bus); 90 int (*mdio_active)(struct bb_miiphy_bus *bus); 91 int (*mdio_tristate)(struct bb_miiphy_bus *bus); 92 int (*set_mdio)(struct bb_miiphy_bus *bus, int v); 93 int (*get_mdio)(struct bb_miiphy_bus *bus, int *v); 94 int (*set_mdc)(struct bb_miiphy_bus *bus, int v); 95 int (*delay)(struct bb_miiphy_bus *bus); 96 #ifdef CONFIG_BITBANGMII_MULTI 97 void *priv; 98 #endif 99 }; 100 101 extern struct bb_miiphy_bus bb_miiphy_buses[]; 102 extern int bb_miiphy_buses_num; 103 104 void bb_miiphy_init(void); 105 int bb_miiphy_read(const char *devname, unsigned char addr, 106 unsigned char reg, unsigned short *value); 107 int bb_miiphy_write(const char *devname, unsigned char addr, 108 unsigned char reg, unsigned short value); 109 #endif 110 111 /* phy seed setup */ 112 #define AUTO 99 113 #define _1000BASET 1000 114 #define _100BASET 100 115 #define _10BASET 10 116 #define HALF 22 117 #define FULL 44 118 119 /* phy register offsets */ 120 #define MII_MIPSCR 0x11 121 122 /* MII_LPA */ 123 #define PHY_ANLPAR_PSB_802_3 0x0001 124 #define PHY_ANLPAR_PSB_802_9 0x0002 125 126 /* MII_CTRL1000 masks */ 127 #define PHY_1000BTCR_1000FD 0x0200 128 #define PHY_1000BTCR_1000HD 0x0100 129 130 /* MII_STAT1000 masks */ 131 #define PHY_1000BTSR_MSCF 0x8000 132 #define PHY_1000BTSR_MSCR 0x4000 133 #define PHY_1000BTSR_LRS 0x2000 134 #define PHY_1000BTSR_RRS 0x1000 135 #define PHY_1000BTSR_1000FD 0x0800 136 #define PHY_1000BTSR_1000HD 0x0400 137 138 /* phy EXSR */ 139 #define ESTATUS_1000XF 0x8000 140 #define ESTATUS_1000XH 0x4000 141 142 #endif /* __SUNXI_HAL_MIIPHY_H__ */ 143