1 /* 2 ** ################################################################### 3 ** Processors: MK64FN1M0CAJ12 4 ** MK64FN1M0VDC12 5 ** MK64FN1M0VLL12 6 ** MK64FN1M0VLQ12 7 ** MK64FN1M0VMD12 8 ** MK64FX512VDC12 9 ** MK64FX512VLL12 10 ** MK64FX512VLQ12 11 ** MK64FX512VMD12 12 ** 13 ** Compilers: Keil ARM C/C++ Compiler 14 ** Freescale C/C++ for Embedded ARM 15 ** GNU C Compiler 16 ** IAR ANSI C/C++ Compiler for ARM 17 ** MCUXpresso Compiler 18 ** 19 ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014 20 ** Version: rev. 2.9, 2016-03-21 21 ** Build: b170112 22 ** 23 ** Abstract: 24 ** Provides a system configuration function and a global variable that 25 ** contains the system frequency. It configures the device and initializes 26 ** the oscillator (PLL) that is part of the microcontroller device. 27 ** 28 ** Copyright (c) 2016 Freescale Semiconductor, Inc. 29 ** Copyright 2016 - 2017 NXP 30 ** Redistribution and use in source and binary forms, with or without modification, 31 ** are permitted provided that the following conditions are met: 32 ** 33 ** o Redistributions of source code must retain the above copyright notice, this list 34 ** of conditions and the following disclaimer. 35 ** 36 ** o Redistributions in binary form must reproduce the above copyright notice, this 37 ** list of conditions and the following disclaimer in the documentation and/or 38 ** other materials provided with the distribution. 39 ** 40 ** o Neither the name of the copyright holder nor the names of its 41 ** contributors may be used to endorse or promote products derived from this 42 ** software without specific prior written permission. 43 ** 44 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 45 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 46 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 47 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 48 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 49 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 50 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 51 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 53 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 ** 55 ** http: www.nxp.com 56 ** mail: support@nxp.com 57 ** 58 ** Revisions: 59 ** - rev. 1.0 (2013-08-12) 60 ** Initial version. 61 ** - rev. 2.0 (2013-10-29) 62 ** Register accessor macros added to the memory map. 63 ** Symbols for Processor Expert memory map compatibility added to the memory map. 64 ** Startup file for gcc has been updated according to CMSIS 3.2. 65 ** System initialization updated. 66 ** MCG - registers updated. 67 ** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed. 68 ** - rev. 2.1 (2013-10-30) 69 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled. 70 ** - rev. 2.2 (2013-12-09) 71 ** DMA - EARS register removed. 72 ** AIPS0, AIPS1 - MPRA register updated. 73 ** - rev. 2.3 (2014-01-24) 74 ** Update according to reference manual rev. 2 75 ** ENET, MCG, MCM, SIM, USB - registers updated 76 ** - rev. 2.4 (2014-02-10) 77 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h 78 ** Update of SystemInit() and SystemCoreClockUpdate() functions. 79 ** - rev. 2.5 (2014-02-10) 80 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h 81 ** Update of SystemInit() and SystemCoreClockUpdate() functions. 82 ** Module access macro module_BASES replaced by module_BASE_PTRS. 83 ** - rev. 2.6 (2014-08-28) 84 ** Update of system files - default clock configuration changed. 85 ** Update of startup files - possibility to override DefaultISR added. 86 ** - rev. 2.7 (2014-10-14) 87 ** Interrupt INT_LPTimer renamed to INT_LPTMR0, interrupt INT_Watchdog renamed to INT_WDOG_EWM. 88 ** - rev. 2.8 (2015-02-19) 89 ** Renamed interrupt vector LLW to LLWU. 90 ** - rev. 2.9 (2016-03-21) 91 ** Added MK64FN1M0CAJ12 part. 92 ** GPIO - renamed port instances: PTx -> GPIOx. 93 ** 94 ** ################################################################### 95 */ 96 97 /*! 98 * @file MK64F12 99 * @version 2.9 100 * @date 2016-03-21 101 * @brief Device specific configuration file for MK64F12 (header file) 102 * 103 * Provides a system configuration function and a global variable that contains 104 * the system frequency. It configures the device and initializes the oscillator 105 * (PLL) that is part of the microcontroller device. 106 */ 107 108 #ifndef _SYSTEM_MK64F12_H_ 109 #define _SYSTEM_MK64F12_H_ /**< Symbol preventing repeated inclusion */ 110 111 #ifdef __cplusplus 112 extern "C" { 113 #endif 114 115 #include <stdint.h> 116 117 118 #ifndef DISABLE_WDOG 119 #define DISABLE_WDOG 1 120 #endif 121 122 /* Define clock source values */ 123 124 #define CPU_XTAL_CLK_HZ 50000000u /* Value of the external crystal or oscillator clock frequency in Hz */ 125 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */ 126 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */ 127 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */ 128 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */ 129 130 /* RTC oscillator setting */ 131 /* RTC_CR: SC2P=0,SC4P=0,SC8P=0,SC16P=0,CLKO=1,OSCE=1,WPS=0,UM=0,SUP=0,WPE=0,SWR=0 */ 132 #define SYSTEM_RTC_CR_VALUE 0x0300U /* RTC_CR */ 133 134 /* Low power mode enable */ 135 /* SMC_PMPROT: AVLP=1,ALLS=1,AVLLS=1 */ 136 #define SYSTEM_SMC_PMPROT_VALUE 0x2AU /* SMC_PMPROT */ 137 138 #define DEFAULT_SYSTEM_CLOCK 20971520u /* Default System clock value */ 139 140 141 /** 142 * @brief System clock frequency (core clock) 143 * 144 * The system clock frequency supplied to the SysTick timer and the processor 145 * core clock. This variable can be used by the user application to setup the 146 * SysTick timer or configure other parameters. It may also be used by debugger to 147 * query the frequency of the debug timer or configure the trace clock speed 148 * SystemCoreClock is initialized with a correct predefined value. 149 */ 150 extern uint32_t SystemCoreClock; 151 152 /** 153 * @brief Setup the microcontroller system. 154 * 155 * Typically this function configures the oscillator (PLL) that is part of the 156 * microcontroller device. For systems with variable clock speed it also updates 157 * the variable SystemCoreClock. SystemInit is called from startup_device file. 158 */ 159 void SystemInit (void); 160 161 /** 162 * @brief Updates the SystemCoreClock variable. 163 * 164 * It must be called whenever the core clock is changed during program 165 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates 166 * the current core clock. 167 */ 168 void SystemCoreClockUpdate (void); 169 170 #ifdef __cplusplus 171 } 172 #endif 173 174 #endif /* _SYSTEM_MK64F12_H_ */ 175