1 /** 2 ****************************************************************************** 3 * @file tae32f53xx_ll_cmp.h 4 * @author MCD Application Team 5 * @brief Header file for CMP Module 6 * 7 ****************************************************************************** 8 * @attention 9 * 10 * <h2><center>© Copyright (c) 2020 Tai-Action. 11 * All rights reserved.</center></h2> 12 * 13 * This software is licensed by Tai-Action under BSD 3-Clause license, 14 * the "License"; You may not use this file except in compliance with the 15 * License. You may obtain a copy of the License at: 16 * opensource.org/licenses/BSD-3-Clause 17 * 18 ****************************************************************************** 19 */ 20 21 /* Define to prevent recursive inclusion -------------------------------------*/ 22 #ifndef _TAE32F53XX_LL_CMP_H_ 23 #define _TAE32F53XX_LL_CMP_H_ 24 25 #ifdef __cplusplus 26 extern "C" { 27 #endif /* __cplusplus */ 28 29 /* Includes ------------------------------------------------------------------*/ 30 #include "tae32f53xx_ll_def.h" 31 32 33 /** @addtogroup TAE32F53xx_LL_Driver 34 * @{ 35 */ 36 37 /** @addtogroup CMP_LL 38 * @{ 39 */ 40 41 42 /* Exported constants --------------------------------------------------------*/ 43 /** @defgroup CMP_LL_Exported_Constants CMP LL Exported Constants 44 * @brief CMP LL Exported Constants 45 * @{ 46 */ 47 48 /** @defgroup CMP_Channel_selection CMP Channel selection 49 * @{ 50 */ 51 #define CMP_CHANNEL_0 (0x00000001U) 52 #define CMP_CHANNEL_1 (0x00000002U) 53 #define CMP_CHANNEL_2 (0x00000004U) 54 #define CMP_CHANNEL_3 (0x00000008U) 55 #define CMP_CHANNEL_ALL (CMP_CHANNEL_0 | CMP_CHANNEL_1 | CMP_CHANNEL_2 | CMP_CHANNEL_3 ) 56 /** 57 * @} 58 */ 59 60 /** @defgroup CMP_Interrupt_definition CMP Interrupt definition 61 * @{ 62 */ 63 #define CMP_IT_FALIE CMP_CR_FALIE /*!< CMP_CHx failing edge interrupt */ 64 #define CMP_IT_RISIE CMP_CR_RISIE /*!< CMP_CHx rising edge interrupt */ 65 /** 66 * @} 67 */ 68 69 /** @defgroup CMP_Flag_definition CMP Flag Definition 70 * @{ 71 */ 72 #define CMP_FLAG_FAL3IF CMP_SR_FALIF_3 73 #define CMP_FLAG_FAL2IF CMP_SR_FALIF_2 74 #define CMP_FLAG_FAL1IF CMP_SR_FALIF_1 75 #define CMP_FLAG_FAL0IF CMP_SR_FALIF_0 76 #define CMP_FLAG_RIS3IF CMP_SR_RISIF_3 77 #define CMP_FLAG_RIS2IF CMP_SR_RISIF_2 78 #define CMP_FLAG_RIS1IF CMP_SR_RISIF_1 79 #define CMP_FLAG_RIS0IF CMP_SR_RISIF_0 80 #define CMP_FLAG_ALLIF (CMP_SR_FALIF_3 | CMP_SR_FALIF_2 | \ 81 CMP_SR_FALIF_1 | CMP_SR_FALIF_0 | \ 82 CMP_SR_RISIF_3 | CMP_SR_RISIF_2 | \ 83 CMP_SR_RISIF_1 | CMP_SR_RISIF_0) 84 /** 85 * @} 86 */ 87 88 /** 89 * @} 90 */ 91 92 93 /* Exported macro ------------------------------------------------------------*/ 94 /** @defgroup CMP_LL_Exported_Macros CMP LL Exported Macros 95 * @brief CMP LL Exported Macros 96 * @{ 97 */ 98 99 /** 100 * @brief Enable CMP Channel 101 * @param __INSTANCE__ CMP peripheral 102 * @param __CHN_NB__ Specifies CMP Channel 103 * This parameter can be a value of 0 to (CMP_CHN_NB - 1) 104 * @return None 105 */ 106 #define __LL_CMP_ENABLE(__INSTANCE__, __CHN_NB__) SET_BIT((__INSTANCE__)->CR[__CHN_NB__], CMP_CR_PEN) 107 108 /** 109 * @brief Disable CMP Channel 110 * @param __INSTANCE__ CMP peripheral 111 * @param __CHN_NB__ Specifies CMP Channel 112 * This parameter can be a value of 0 to (CMP_CHN_NB - 1) 113 * @return None 114 */ 115 #define __LL_CMP_DISABLE(__INSTANCE__, __CHN_NB__) CLEAR_BIT((__INSTANCE__)->CR[__CHN_NB__], CMP_CR_PEN) 116 117 /** 118 * @brief Enable the specified CMP Channel Interrupts 119 * @param __INSTANCE__ CMP peripheral 120 * @param __CHN_NB__ Specifies CMP Channel 121 * This parameter can be a value of 0 to (CMP_CHN_NB - 1) 122 * @param __INTERRUPT__ specifies the CMP Channel interrupt source to enable. 123 * This parameter can be any combination of @ref CMP_Interrupt_definition: 124 * @arg CMP_IT_FALIE : CMP_CHx failing edge interrupt 125 * @arg CMP_IT_RISIE : CMP_CHx rising edge interrupt 126 * @return None 127 */ 128 #define __LL_CMP_IT_ENABLE(__INSTANCE__, __CHN_NB__, __INTERRUPT__) SET_BIT((__INSTANCE__)->CR[__CHN_NB__], (__INTERRUPT__)) 129 130 /** 131 * @brief Disable the specified CMP Channel Interrupts 132 * @param __INSTANCE__ CMP peripheral 133 * @param __CHN_NB__ Specifies CMP Channel 134 * This parameter can be a value of 0 to (CMP_CHN_NB - 1) 135 * @param __INTERRUPT__ specifies the CMP Channel interrupt source to disable. 136 * This parameter can be any combination of @ref CMP_Interrupt_definition: 137 * @arg CMP_IT_FALIE : CMP_CHx failing edge interrupt 138 * @arg CMP_IT_RISIE : CMP_CHx rising edge interrupt 139 * @return None 140 */ 141 #define __LL_CMP_IT_DISABLE(__INSTANCE__, __CHN_NB__, __INTERRUPT__) CLEAR_BIT((__INSTANCE__)->CR[__CHN_NB__], (__INTERRUPT__)) 142 143 144 /** 145 * @brief Check whether the specified CMP Channel interrupt source is set or not. 146 * @param __INSTANCE__ CMP peripheral 147 * @param __CHN_NB__ Specifies CMP Channel 148 * This parameter can be a value of 0 to (CMP_CHN_NB - 1) 149 * @param __INTERRUPT__ specifies the CMP Channel interrupt source to check. 150 * This parameter can be ONE of @ref CMP_Interrupt_definition: 151 * @arg CMP_IT_FALIE : CMP_CHx failing edge interrupt 152 * @arg CMP_IT_RISIE : CMP_CHx rising edge interrupt 153 * @return None 154 */ 155 #define __LL_CMP_IT_CHECK_SOURCE(__INSTANCE__, __CHN_NB__, __INTERRUPT__) \ 156 ((READ_BIT((__INSTANCE__)->CR[__CHN_NB__], (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 157 158 /** 159 * @brief Check whether the specified pending flag is SET or not. 160 * @param __INSTANCE__ CMP peripheral. 161 * @param __FLAG__ specifies the CMP pending flag to check. 162 * This parameter can be ONE of the following values where x can be a value of 163 * 0, 1 ... (CMP_CHN_NB - 1): 164 * @arg CMP_FLAG_FALxIF : CMP_CHx failing edge interrupt pending flag 165 * @arg CMP_FLAG_RISxIF : CMP_CHx rising interrupt pending flag 166 * @return The new state of __FLAG__ (SET or RESET). 167 */ 168 #define __LL_CMP_PENDING_FLAG_GET(__INSTANCE__, __FLAG__) ((READ_BIT((__INSTANCE__)->SR, (__FLAG__)) == (__FLAG__)) ? SET : RESET) 169 170 /** 171 * @brief Clear the specified pending flags 172 * @param __INSTANCE__ CMP peripheral. 173 * @param __FLAG__ specifies the CMP pending flag to clear. 174 * This parameter can be any combination of the following values where x can be a value of 175 * 0, 1 ... (CMP_CHN_NB - 1): 176 * @arg CMP_FLAG_FALxIF : CMP_CHx failing edge interrupt pending flag 177 * @arg CMP_FLAG_RISxIF : CMP_CHx rising interrupt pending flag 178 * @arg CMP_FLAG_ALLIF : CMP All interrupt pending flags 179 * @return None 180 */ 181 #define __LL_CMP_PENDING_FLAG_CLEAR(__INSTANCE__, __FLAG__) WRITE_REG((__INSTANCE__)->SR, (__FLAG__)) 182 183 184 /** 185 * @brief Set the specified CMP Channel output debounce value 186 * @param __INSTANCE__ CMP peripheral. 187 * @param __CHN_NB__ Specifies CMP Channel 188 * This parameter can be a value of 0 to (CMP_CHN_NB - 1) 189 * @param __VAL__ Specifies debounce value 190 * This value can be a range from 0 - 0xFFF (in System Clocks) 191 * @return None 192 */ 193 #define __LL_CMP_DEBOUNCE_VALUE_SET(__INSTANCE__, __CHN_NB__, __VAL__) WRITE_REG((__INSTANCE__)->DEBR[__CHN_NB__], (__VAL__)) 194 195 /** 196 * @} 197 */ 198 199 200 /* Exported types ------------------------------------------------------------*/ 201 /** @defgroup CMP_LL_Exported_Types CMP LL Exported Types 202 * @brief CMP LL Exported Types 203 * @{ 204 */ 205 206 /** 207 * @brief CMP input minus (INM) 208 */ 209 typedef enum { 210 CMP_INPUT_MINUS_GND = 0x0U, 211 /*!< Comparator input minus connected to GND */ 212 CMP_INPUT_MINUS_IO1 = CMP_CR_INM_0, 213 /*!< Comparator input minus connected to IO1, Note: For CMPx instance availability, please refer to SPEC Document */ 214 CMP_INPUT_MINUS_IO2 = CMP_CR_INM_1, 215 /*!< Comparator input minus connected to IO2, Note: For CMPx instance availability, please refer to SPEC Document */ 216 CMP_INPUT_MINUS_DAC = CMP_CR_INM_1 | CMP_CR_INM_0, 217 /*!< Comparator input minus connected to DAC Channel x for CMP Channel x. 218 Note: For CMPx & DACx instances availability, please refer to SPEC Document */ 219 } CMP_InputMinusETypeDef; 220 221 /** 222 * @brief CMP Hysteresis 223 */ 224 typedef enum { 225 CMP_HYSTERESIS_NONE = 0x0U, /*!< No hysteresis */ 226 CMP_HYSTERESIS_10MV = CMP_CR_HYST_0, /*!< Hysteresis level 10mV */ 227 CMP_HYSTERESIS_20MV = CMP_CR_HYST_1, /*!< Hysteresis level 20mV */ 228 CMP_HYSTERESIS_30MV = CMP_CR_HYST_1 | CMP_CR_HYST_0, /*!< Hysteresis level 30mV */ 229 } CMP_HysteresisETypeDef; 230 231 /** 232 * @brief CMP Blanking Source 233 * @note For CMPx & TMRx instances availability, please refer to SPEC Document 234 */ 235 typedef enum { 236 CMP_BLANKINGSRC_NONE = 0x00000000U, 237 238 CMP_BLANKINGSRC_TMR0_PWM_CMP0 = CMP_CR_BLANKING_0, 239 /*!< CMP output blanking source TMR0_PWM (specific to CMP Channel0). */ 240 CMP_BLANKINGSRC_TMR1_PWM_CMP1 = CMP_CR_BLANKING_0, 241 /*!< CMP output blanking source TMR1_PWM (specific to CMP Channel1). */ 242 CMP_BLANKINGSRC_TMR0_PWM_CMP2 = CMP_CR_BLANKING_0, 243 /*!< CMP output blanking source TMR0_PWM (specific to CMP Channel2). */ 244 CMP_BLANKINGSRC_TMR1_PWM_CMP3 = CMP_CR_BLANKING_0, 245 /*!< CMP output blanking source TMR1_PWM (specific to CMP Channel3). */ 246 247 CMP_BLANKINGSRC_TMR1_PWM_CMP0 = CMP_CR_BLANKING_1, 248 /*!< CMP output blanking source TMR1_PWM (specific to CMP Channel0). */ 249 CMP_BLANKINGSRC_TMR2_PWM_CMP1 = CMP_CR_BLANKING_1, 250 /*!< CMP output blanking source TMR2_PWM (specific to CMP Channel1). */ 251 CMP_BLANKINGSRC_TMR1_PWM_CMP2 = CMP_CR_BLANKING_1, 252 /*!< CMP output blanking source TMR1_PWM (specific to CMP Channel2). */ 253 CMP_BLANKINGSRC_TMR2_PWM_CMP3 = CMP_CR_BLANKING_1, 254 /*!< CMP output blanking source TMR2_PWM (specific to CMP Channel3). */ 255 256 CMP_BLANKINGSRC_TMR2_PWM_CMP0 = CMP_CR_BLANKING_1 | CMP_CR_BLANKING_0, 257 /*!< CMP output blanking source TMR2_PWM (specific to CMP Channel0). */ 258 CMP_BLANKINGSRC_TMR3_PWM_CMP1 = CMP_CR_BLANKING_1 | CMP_CR_BLANKING_0, 259 /*!< CMP output blanking source TMR3_PWM (specific to CMP Channel1). */ 260 CMP_BLANKINGSRC_TMR2_PWM_CMP2 = CMP_CR_BLANKING_1 | CMP_CR_BLANKING_0, 261 /*!< CMP output blanking source TMR2_PWM (specific to CMP Channel2). */ 262 CMP_BLANKINGSRC_TMR3_PWM_CMP3 = CMP_CR_BLANKING_1 | CMP_CR_BLANKING_0, 263 /*!< CMP output blanking source TMR3_PWM (specific to CMP Channel3). */ 264 265 CMP_BLANKINGSRC_TMR3_PWM_CMP0 = CMP_CR_BLANKING_2, 266 /*!< CMP output blanking source TMR3_PWM (specific to CMP Channel0). */ 267 CMP_BLANKINGSRC_TMR4_PWM_CMP1 = CMP_CR_BLANKING_2, 268 /*!< CMP output blanking source TMR4_PWM (specific to CMP Channel1). */ 269 CMP_BLANKINGSRC_TMR3_PWM_CMP2 = CMP_CR_BLANKING_2, 270 /*!< CMP output blanking source TMR3_PWM (specific to CMP Channel2). */ 271 CMP_BLANKINGSRC_TMR4_PWM_CMP3 = CMP_CR_BLANKING_2, 272 /*!< CMP output blanking source TMR4_PWM (specific to CMP Channel3). */ 273 274 CMP_BLANKINGSRC_TMR4_PWM_CMP0 = CMP_CR_BLANKING_2 | CMP_CR_BLANKING_0, 275 /*!< CMP output blanking source TMR4_PWM (specific to CMP Channel0). */ 276 CMP_BLANKINGSRC_TMR5_PWM_CMP1 = CMP_CR_BLANKING_2 | CMP_CR_BLANKING_0, 277 /*!< CMP output blanking source TMR5_PWM (specific to CMP Channel1). */ 278 CMP_BLANKINGSRC_TMR4_PWM_CMP2 = CMP_CR_BLANKING_2 | CMP_CR_BLANKING_0, 279 /*!< CMP output blanking source TMR4_PWM (specific to CMP Channel2). */ 280 CMP_BLANKINGSRC_TMR5_PWM_CMP3 = CMP_CR_BLANKING_2 | CMP_CR_BLANKING_0, 281 /*!< CMP output blanking source TMR5_PWM (specific to CMP Channel3). */ 282 283 CMP_BLANKINGSRC_TMR5_PWM_CMP0 = CMP_CR_BLANKING_2 | CMP_CR_BLANKING_1, 284 /*!< CMP output blanking source TMR5_PWM (specific to CMP Channel0). */ 285 CMP_BLANKINGSRC_TMR6_PWM_CMP1 = CMP_CR_BLANKING_2 | CMP_CR_BLANKING_1, 286 /*!< CMP output blanking source TMR6_PWM (specific to CMP Channel1). */ 287 CMP_BLANKINGSRC_TMR5_PWM_CMP2 = CMP_CR_BLANKING_2 | CMP_CR_BLANKING_1, 288 /*!< CMP output blanking source TMR5_PWM (specific to CMP Channel2). */ 289 CMP_BLANKINGSRC_TMR6_PWM_CMP3 = CMP_CR_BLANKING_2 | CMP_CR_BLANKING_1, 290 /*!< CMP output blanking source TMR6_PWM (specific to CMP Channel3). */ 291 292 CMP_BLANKINGSRC_TMR6_PWM_CMP0 = CMP_CR_BLANKING_2 | CMP_CR_BLANKING_1 | CMP_CR_BLANKING_0, 293 /*!< CMP output blanking source TMR6_PWM (specific to CMP Channel0). */ 294 CMP_BLANKINGSRC_TMR7_PWM_CMP1 = CMP_CR_BLANKING_2 | CMP_CR_BLANKING_1 | CMP_CR_BLANKING_0, 295 /*!< CMP output blanking source TMR7_PWM (specific to CMP Channel1). */ 296 CMP_BLANKINGSRC_TMR6_PWM_CMP2 = CMP_CR_BLANKING_2 | CMP_CR_BLANKING_1 | CMP_CR_BLANKING_0, 297 /*!< CMP output blanking source TMR6_PWM (specific to CMP Channel2). */ 298 CMP_BLANKINGSRC_TMR7_PWM_CMP3 = CMP_CR_BLANKING_2 | CMP_CR_BLANKING_1 | CMP_CR_BLANKING_0, 299 /*!< CMP output blanking source TMR7_PWM (specific to CMP Channel3). */ 300 } CMP_BlankingSrcETypeDef; 301 302 /** 303 * @brief CMP Output Debounce 304 */ 305 typedef enum { 306 CMP_OUTPUT_DEBOUNCE_DISABLE = 0x0U, /*!< Disable CMP output debounce */ 307 CMP_OUTPUT_DEBOUNCE_ENABLE = CMP_CR_ODEB, /*!< Enable CMP output debounce */ 308 } CMP_OutputDebounceETypeDef; 309 310 /** 311 * @brief CMP output polarity 312 */ 313 typedef enum { 314 CMP_OUPUT_POLARITY_NON_INVERTED = 0x0U, 315 /*!< CMP output level is not inverted. CMP output HIGH when the input plus(INP) is at a higher voltage than the input minus(INM) */ 316 CMP_OUPUT_POLARITY_INVERTED = CMP_CR_OPOL, 317 /*!< CMP output level is inverted. CMP output LOW when the input plus(INP) is at a higher voltage than the input minus(INM) */ 318 } CMP_OutputPolarityETypeDef; 319 320 /** 321 * @brief CMP trigger interrupt 322 */ 323 typedef enum { 324 CMP_TRIGGER_IT_DISABLE = 0x00000000U, 325 /*!< CMP output triggering event without interrupt */ 326 CMP_TRIGGER_IT_FALLING = CMP_CR_FALIE, 327 /*!< CMP output triggering event with interrupt on falling edge */ 328 CMP_TRIGGER_IT_RISING = CMP_CR_RISIE, 329 /*!< CMP output triggering event with interrupt on rising edge */ 330 CMP_TRIGGER_IT_RISING_FALLING = CMP_CR_RISIE | CMP_CR_FALIE, 331 /*!< CMP output triggering event with interrupt on both rising and falling edges */ 332 } CMP_TriggerITETypeDef; 333 334 335 /** 336 * @brief CMP Channel Configuration structure definition 337 */ 338 typedef struct __CMP_ChannelConfTypeDef { 339 CMP_InputMinusETypeDef InputMinus; /*!< Set comparator input minus (INM). */ 340 CMP_HysteresisETypeDef Hysteresis; /*!< Set comparator hysteresis mode of the input minus(INM). */ 341 CMP_BlankingSrcETypeDef BlankingSource; /*!< Set comparator blanking source. */ 342 CMP_OutputDebounceETypeDef OutputDebounce; /*!< Set comparator output debounce. */ 343 CMP_OutputPolarityETypeDef OutputPolarity; /*!< Set comparator output polarity. */ 344 CMP_TriggerITETypeDef TriggerInterrupt; /*!< Set the comparator output triggering with or without interrupt. */ 345 346 uint32_t OutputDebounceValue; /*!< Set comparator output debounce vaule. This Should be configured when 347 Output Debounce is enabled. 348 this value can be a range from 0 - 0xFFF (in System Clocks) */ 349 } CMP_ChannelConfTypeDef; 350 351 /** 352 * @} 353 */ 354 355 356 /* Exported functions --------------------------------------------------------*/ 357 /** @addtogroup CMP_LL_Exported_Functions 358 * @{ 359 */ 360 361 /** @addtogroup CMP_LL_Exported_Functions_Group1 362 * @{ 363 */ 364 LL_StatusETypeDef LL_CMP_Init(CMP_TypeDef *Instance); 365 LL_StatusETypeDef LL_CMP_DeInit(CMP_TypeDef *Instance); 366 void LL_CMP_MspInit(CMP_TypeDef *Instance); 367 void LL_CMP_MspDeInit(CMP_TypeDef *Instance); 368 /** 369 * @} 370 */ 371 372 373 /** @addtogroup CMP_LL_Exported_Functions_Group2 374 * @{ 375 */ 376 LL_StatusETypeDef LL_CMP_ChannelConfig(CMP_TypeDef *Instance, uint32_t Channel, CMP_ChannelConfTypeDef *sConfig); 377 /** 378 * @} 379 */ 380 381 382 /** @addtogroup CMP_LL_Exported_Functions_Group3 383 * @{ 384 */ 385 LL_StatusETypeDef LL_CMP_Start(CMP_TypeDef *Instance, uint32_t Channel); 386 LL_StatusETypeDef LL_CMP_Stop(CMP_TypeDef *Instance, uint32_t Channel); 387 /** 388 * @} 389 */ 390 391 392 /** @addtogroup CMP_LL_Exported_Functions_Interrupt 393 * @{ 394 */ 395 void LL_CMP_IRQHandler(CMP_TypeDef *Instance); 396 void LL_CMP_FailingEdgeTrigCallback(CMP_TypeDef *Instance, uint32_t Channel); 397 void LL_CMP_RisingEdgeTrigCallback(CMP_TypeDef *Instance, uint32_t Channel); 398 /** 399 * @} 400 */ 401 402 /** 403 * @} 404 */ 405 406 407 /* Private constants ---------------------------------------------------------*/ 408 /* Private macros ------------------------------------------------------------*/ 409 /** @defgroup CMP_LL_Private_Macros CMP LL Private Macros 410 * @brief CMP LL Private Macros 411 * @{ 412 */ 413 414 /** 415 * @brief Judge is CMP channel number or not 416 * @param CHN_NB channel number to judge 417 * @retval 0 isn't CMP channel number 418 * @retval 1 is CMP channel number 419 */ 420 #define IS_CMP_NUMBER(CHN_NB) ((CHN_NB) < CMP_CHN_NB) 421 422 /** 423 * @brief Judge is CMP Channel or not 424 * @param CHN Channel to judge 425 * @retval 0 isn't CMP Channel 426 * @retval 1 is CMP Channel 427 */ 428 #define IS_CMP_CHANNEL(CHN) (((CHN) == CMP_CHANNEL_0) || \ 429 ((CHN) == CMP_CHANNEL_1) || \ 430 ((CHN) == CMP_CHANNEL_2) || \ 431 ((CHN) == CMP_CHANNEL_3)) 432 433 /** 434 * @brief Judge is CMP input minus or not 435 * @param INM input minus to judge 436 * @retval 0 isn't CMP input minus 437 * @retval 1 is CMP input minus 438 */ 439 #define IS_CMP_INPUT_MINUS(INM) (((INM) == CMP_INPUT_MINUS_GND) || \ 440 ((INM) == CMP_INPUT_MINUS_IO1) || \ 441 ((INM) == CMP_INPUT_MINUS_IO2) || \ 442 ((INM) == CMP_INPUT_MINUS_DAC)) 443 444 /** 445 * @brief Judge is CMP hysteresis or not 446 * @param HYST hysteresis to judge 447 * @retval 0 isn't CMP hysteresis 448 * @retval 1 is CMP hysteresis 449 */ 450 #define IS_CMP_HYSTERESIS(HYST) (((HYST) == CMP_HYSTERESIS_NONE) || \ 451 ((HYST) == CMP_HYSTERESIS_10MV) || \ 452 ((HYST) == CMP_HYSTERESIS_20MV) || \ 453 ((HYST) == CMP_HYSTERESIS_30MV)) 454 455 /** 456 * @brief Judge is CMP blanking source or not 457 * @param CHN CMP channel to judge 458 * @param BLANKING blanking to judge 459 * @retval 0 isn't CMP blanking source 460 * @retval 1 is CMP blanking source 461 */ 462 #define IS_CMP_BLANKING_SOURCE(CHN, BLANKING) ( \ 463 (((CHN) == CMP_CHANNEL_0) && \ 464 (((BLANKING) == CMP_BLANKINGSRC_NONE) || \ 465 ((BLANKING) == CMP_BLANKINGSRC_TMR0_PWM_CMP0) || \ 466 ((BLANKING) == CMP_BLANKINGSRC_TMR1_PWM_CMP0) || \ 467 ((BLANKING) == CMP_BLANKINGSRC_TMR2_PWM_CMP0) || \ 468 ((BLANKING) == CMP_BLANKINGSRC_TMR3_PWM_CMP0) || \ 469 ((BLANKING) == CMP_BLANKINGSRC_TMR4_PWM_CMP0) || \ 470 ((BLANKING) == CMP_BLANKINGSRC_TMR5_PWM_CMP0) || \ 471 ((BLANKING) == CMP_BLANKINGSRC_TMR6_PWM_CMP0))) \ 472 || \ 473 (((CHN) == CMP_CHANNEL_1) && \ 474 (((BLANKING) == CMP_BLANKINGSRC_NONE) || \ 475 ((BLANKING) == CMP_BLANKINGSRC_TMR1_PWM_CMP1) || \ 476 ((BLANKING) == CMP_BLANKINGSRC_TMR2_PWM_CMP1) || \ 477 ((BLANKING) == CMP_BLANKINGSRC_TMR3_PWM_CMP1) || \ 478 ((BLANKING) == CMP_BLANKINGSRC_TMR4_PWM_CMP1) || \ 479 ((BLANKING) == CMP_BLANKINGSRC_TMR5_PWM_CMP1) || \ 480 ((BLANKING) == CMP_BLANKINGSRC_TMR6_PWM_CMP1) || \ 481 ((BLANKING) == CMP_BLANKINGSRC_TMR7_PWM_CMP1))) \ 482 || \ 483 (((CHN) == CMP_CHANNEL_2) && \ 484 (((BLANKING) == CMP_BLANKINGSRC_NONE) || \ 485 ((BLANKING) == CMP_BLANKINGSRC_TMR0_PWM_CMP2) || \ 486 ((BLANKING) == CMP_BLANKINGSRC_TMR1_PWM_CMP2) || \ 487 ((BLANKING) == CMP_BLANKINGSRC_TMR2_PWM_CMP2) || \ 488 ((BLANKING) == CMP_BLANKINGSRC_TMR3_PWM_CMP2) || \ 489 ((BLANKING) == CMP_BLANKINGSRC_TMR4_PWM_CMP2) || \ 490 ((BLANKING) == CMP_BLANKINGSRC_TMR5_PWM_CMP2) || \ 491 ((BLANKING) == CMP_BLANKINGSRC_TMR6_PWM_CMP2))) \ 492 || \ 493 (((CHN) == CMP_CHANNEL_3) && \ 494 (((BLANKING) == CMP_BLANKINGSRC_NONE) || \ 495 ((BLANKING) == CMP_BLANKINGSRC_TMR1_PWM_CMP3) || \ 496 ((BLANKING) == CMP_BLANKINGSRC_TMR2_PWM_CMP3) || \ 497 ((BLANKING) == CMP_BLANKINGSRC_TMR3_PWM_CMP3) || \ 498 ((BLANKING) == CMP_BLANKINGSRC_TMR4_PWM_CMP3) || \ 499 ((BLANKING) == CMP_BLANKINGSRC_TMR5_PWM_CMP3) || \ 500 ((BLANKING) == CMP_BLANKINGSRC_TMR6_PWM_CMP3) || \ 501 ((BLANKING) == CMP_BLANKINGSRC_TMR7_PWM_CMP3))) \ 502 ) 503 504 /** 505 * @brief Judge is CMP output debounce or not 506 * @param DEB debounce to judge 507 * @retval 0 isn't CMP output debounce 508 * @retval 1 is CMP output debounce 509 */ 510 #define IS_CMP_OUTPUT_DEBOUNCE(DEB) (((DEB) == CMP_OUTPUT_DEBOUNCE_DISABLE) || \ 511 ((DEB) == CMP_OUTPUT_DEBOUNCE_ENABLE)) 512 513 /** 514 * @brief Jugdge is CMP output debounce value or not 515 * @param VAL value to judge 516 * @retval 0 isn't CMP output debounce value 517 * @retval 1 is CMP output debounce value 518 */ 519 #define IS_CMP_OUTPUT_DEBOUNCE_VAL(VAL) ((VAL) <= 0xFFFUL) 520 521 522 /** 523 * @brief Jugdge is CMP output debounce polarity or not 524 * @param POL polarity to judge 525 * @retval 0 isn't CMP output debounce polarity 526 * @retval 1 is CMP output debounce polarity 527 */ 528 #define IS_CMP_OUTPUT_POLARITY(POL) (((POL) == CMP_OUPUT_POLARITY_NON_INVERTED) || \ 529 ((POL) == CMP_OUPUT_POLARITY_INVERTED)) 530 531 /** 532 * @brief Judge is CMP trigger interrupt or not 533 * @param INTERRUPT trigger interrupt to judge 534 * @retval 0 isn't CMP trigger interrupt 535 * @retval 1 is CMP trigger interrupt 536 */ 537 #define IS_CMP_TRIGGER_IT(INTERRUPT) (((INTERRUPT) == CMP_TRIGGER_IT_DISABLE) || \ 538 ((INTERRUPT) == CMP_TRIGGER_IT_FALLING) || \ 539 ((INTERRUPT) == CMP_TRIGGER_IT_RISING) || \ 540 ((INTERRUPT) == CMP_TRIGGER_IT_RISING_FALLING)) 541 542 /** 543 * @} 544 */ 545 546 547 /* Private types -------------------------------------------------------------*/ 548 /* Private variables ---------------------------------------------------------*/ 549 /* Private functions ---------------------------------------------------------*/ 550 551 552 /** 553 * @} 554 */ 555 556 /** 557 * @} 558 */ 559 560 561 #ifdef __cplusplus 562 } 563 #endif /* __cplusplus */ 564 565 566 #endif /* _TAE32F53XX_LL_CMP_H_ */ 567 568 569 /************************* (C) COPYRIGHT Tai-Action *****END OF FILE***********/ 570 571