1 /* 2 * Copyright (C) 2018 - 2019 Xilinx, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without modification, 6 * are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 3. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT 19 * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 20 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 21 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 25 * OF SUCH DAMAGE. 26 * 27 * This file is part of the lwIP TCP/IP stack. 28 * 29 */ 30 31 #ifndef __XEMAC_IEEE_REGS_H_ 32 #define __XEMAC_IEEE_REGS_H_ 33 34 /* Advertisement control register. */ 35 #define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ 36 #define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ 37 #define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ 38 #define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ 39 #define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ 40 #define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ 41 #define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ 42 #define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ 43 #define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ 44 45 46 #define ADVERTISE_100_AND_10 (ADVERTISE_10FULL | ADVERTISE_100FULL | \ 47 ADVERTISE_10HALF | ADVERTISE_100HALF) 48 #define ADVERTISE_100 (ADVERTISE_100FULL | ADVERTISE_100HALF) 49 #define ADVERTISE_10 (ADVERTISE_10FULL | ADVERTISE_10HALF) 50 51 #define ADVERTISE_1000 0x0300 52 53 54 #define IEEE_CONTROL_REG_OFFSET 0 55 #define IEEE_STATUS_REG_OFFSET 1 56 #define IEEE_AUTONEGO_ADVERTISE_REG 4 57 #define IEEE_PARTNER_ABILITIES_1_REG_OFFSET 5 58 #define IEEE_PARTNER_ABILITIES_2_REG_OFFSET 8 59 #define IEEE_PARTNER_ABILITIES_3_REG_OFFSET 10 60 #define IEEE_1000_ADVERTISE_REG_OFFSET 9 61 #define IEEE_MMD_ACCESS_CONTROL_REG 13 62 #define IEEE_MMD_ACCESS_ADDRESS_DATA_REG 14 63 #define IEEE_COPPER_SPECIFIC_CONTROL_REG 16 64 #define IEEE_SPECIFIC_STATUS_REG 17 65 #define IEEE_COPPER_SPECIFIC_STATUS_REG_2 19 66 #define IEEE_EXT_PHY_SPECIFIC_CONTROL_REG 20 67 #define IEEE_CONTROL_REG_MAC 21 68 #define IEEE_PAGE_ADDRESS_REGISTER 22 69 70 #define IEEE_CTRL_1GBPS_LINKSPEED_MASK 0x2040 71 #define IEEE_CTRL_LINKSPEED_MASK 0x0040 72 #define IEEE_CTRL_LINKSPEED_1000M 0x0040 73 #define IEEE_CTRL_LINKSPEED_100M 0x2000 74 #define IEEE_CTRL_LINKSPEED_10M 0x0000 75 #define IEEE_CTRL_FULL_DUPLEX 0x100 76 #define IEEE_CTRL_RESET_MASK 0x8000 77 #define IEEE_CTRL_AUTONEGOTIATE_ENABLE 0x1000 78 #define IEEE_STAT_AUTONEGOTIATE_CAPABLE 0x0008 79 #define IEEE_STAT_AUTONEGOTIATE_COMPLETE 0x0020 80 #define IEEE_STAT_AUTONEGOTIATE_RESTART 0x0200 81 #define IEEE_STAT_LINK_STATUS 0x0004 82 #define IEEE_STAT_1GBPS_EXTENSIONS 0x0100 83 #define IEEE_AN1_ABILITY_MASK 0x1FE0 84 #define IEEE_AN3_ABILITY_MASK_1GBPS 0x0C00 85 #define IEEE_AN1_ABILITY_MASK_100MBPS 0x0380 86 #define IEEE_AN1_ABILITY_MASK_10MBPS 0x0060 87 #define IEEE_RGMII_TXRX_CLOCK_DELAYED_MASK 0x0030 88 89 #define IEEE_SPEED_MASK 0xC000 90 #define IEEE_SPEED_1000 0x8000 91 #define IEEE_SPEED_100 0x4000 92 93 #define IEEE_ASYMMETRIC_PAUSE_MASK 0x0800 94 #define IEEE_PAUSE_MASK 0x0400 95 #define IEEE_AUTONEG_ERROR_MASK 0x8000 96 97 #define IEEE_MMD_ACCESS_CTRL_DEVAD_MASK 0x1F 98 #define IEEE_MMD_ACCESS_CTRL_PIDEVAD_MASK 0x801F 99 #define IEEE_MMD_ACCESS_CTRL_NOPIDEVAD_MASK 0x401F 100 101 #endif /* __XEMAC_IEEE_REGS_H_ */ 102