1 /* 2 * Copyright (C) 2014-2020 Xilinx, Inc. 3 * Copyright (c) 2020-2021, WangHuachen 4 * All rights reserved. 5 * SPDX-License-Identifier: MIT 6 * 7 * Change Logs: 8 * Date Author Notes 9 * 2020-11-30 WangHuachen the first version 10 */ 11 #ifndef XPLATFORM_INFO_H /* prevent circular inclusions */ 12 #define XPLATFORM_INFO_H /* by using protection macros */ 13 14 #include "xil_types.h" 15 #include "xparameters.h" 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 #if defined (versal) 22 #define XPAR_PMC_TAP_BASEADDR 0xF11A0000U 23 #define XPAR_PMC_TAP_VERSION_OFFSET 0x00000004U 24 #define XPLAT_PS_VERSION_ADDRESS (XPAR_PMC_TAP_BASEADDR + \ 25 XPAR_PMC_TAP_VERSION_OFFSET) 26 #else 27 #define XPAR_CSU_BASEADDR 0xFFCA0000U 28 #define XPAR_CSU_VER_OFFSET 0x00000044U 29 #define XPLAT_PS_VERSION_ADDRESS (XPAR_CSU_BASEADDR + \ 30 XPAR_CSU_VER_OFFSET) 31 #endif 32 #define XPLAT_ZYNQ_ULTRA_MP_SILICON 0x0 33 #define XPLAT_ZYNQ_ULTRA_MP 0x1 34 #define XPLAT_ZYNQ_ULTRA_MPVEL 0x2 35 #define XPLAT_ZYNQ_ULTRA_MPQEMU 0x3 36 #define XPLAT_ZYNQ 0x4 37 #define XPLAT_MICROBLAZE 0x5 38 #define XPLAT_VERSAL 0x6U 39 40 #define XPS_VERSION_1 0x0 41 #define XPS_VERSION_2 0x1 42 #define XPLAT_INFO_MASK (0xF) 43 44 #if defined (versal) 45 #define XPS_VERSION_INFO_MASK 0xFF00U 46 #define XPS_VERSION_INFO_SHIFT 0x8U 47 #define XPLAT_INFO_SHIFT 0x18U 48 #else 49 #define XPS_VERSION_INFO_MASK (0xF) 50 #define XPS_VERSION_INFO_SHIFT 0x0U 51 #define XPLAT_INFO_SHIFT 0xCU 52 #endif 53 XGetPlatform_Info()54static INLINE u32 XGetPlatform_Info() 55 { 56 #if defined (versal) 57 return XPLAT_VERSAL; 58 #elif defined (ARMR5) || (__aarch64__) || (ARMA53_32) || (PSU_PMU) 59 return XPLAT_ZYNQ_ULTRA_MP; 60 #elif (__microblaze__) 61 return XPLAT_MICROBLAZE; 62 #else 63 return XPLAT_ZYNQ; 64 #endif 65 } 66 67 #ifdef __cplusplus 68 } 69 #endif 70 71 #endif /* end of protection macro */ 72 /** 73 * @} End of "addtogroup common_platform_info". 74 */ 75