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Searched refs:AC_COMPCTRL_ENABLE (Results 1 – 14 of 14) sorted by relevance

/bsp/samd21/sam_d2x_asflib/sam0/drivers/ac/ac_sam_l_c/
A Dac.c306 if (!(win_pair_comp0_conf & AC_COMPCTRL_ENABLE) || in ac_win_enable()
307 !(win_pair_comp1_conf & AC_COMPCTRL_ENABLE)) { in ac_win_enable()
/bsp/samd21/sam_d2x_asflib/sam0/drivers/ac/ac_sam_d_r_h/
A Dac.c326 if (!(win_pair_comp0_conf & AC_COMPCTRL_ENABLE) ||
327 !(win_pair_comp1_conf & AC_COMPCTRL_ENABLE)) {
/bsp/samd21/sam_d2x_asflib/sam0/drivers/ac/
A Dac.h1063 ac_module->COMPCTRL[(uint8_t)channel].reg |= AC_COMPCTRL_ENABLE; in ac_chan_enable()
1090 ac_module->COMPCTRL[(uint8_t)channel].reg &= ~AC_COMPCTRL_ENABLE; in ac_chan_disable()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_ac_d51.h1098 ((Ac *)hw)->COMPCTRL[index].reg |= AC_COMPCTRL_ENABLE; in hri_ac_set_COMPCTRL_ENABLE_bit()
1108 tmp = (tmp & AC_COMPCTRL_ENABLE) >> AC_COMPCTRL_ENABLE_Pos; in hri_ac_get_COMPCTRL_ENABLE_bit()
1117 tmp &= ~AC_COMPCTRL_ENABLE; in hri_ac_write_COMPCTRL_ENABLE_bit()
1127 ((Ac *)hw)->COMPCTRL[index].reg &= ~AC_COMPCTRL_ENABLE; in hri_ac_clear_COMPCTRL_ENABLE_bit()
1135 ((Ac *)hw)->COMPCTRL[index].reg ^= AC_COMPCTRL_ENABLE; in hri_ac_toggle_COMPCTRL_ENABLE_bit()
/bsp/microchip/same54/bsp/hri/
A Dhri_ac_e54.h1098 ((Ac *)hw)->COMPCTRL[index].reg |= AC_COMPCTRL_ENABLE; in hri_ac_set_COMPCTRL_ENABLE_bit()
1108 tmp = (tmp & AC_COMPCTRL_ENABLE) >> AC_COMPCTRL_ENABLE_Pos; in hri_ac_get_COMPCTRL_ENABLE_bit()
1117 tmp &= ~AC_COMPCTRL_ENABLE; in hri_ac_write_COMPCTRL_ENABLE_bit()
1127 ((Ac *)hw)->COMPCTRL[index].reg &= ~AC_COMPCTRL_ENABLE; in hri_ac_clear_COMPCTRL_ENABLE_bit()
1135 ((Ac *)hw)->COMPCTRL[index].reg ^= AC_COMPCTRL_ENABLE; in hri_ac_toggle_COMPCTRL_ENABLE_bit()
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_ac_d51.h1098 ((Ac *)hw)->COMPCTRL[index].reg |= AC_COMPCTRL_ENABLE; in hri_ac_set_COMPCTRL_ENABLE_bit()
1108 tmp = (tmp & AC_COMPCTRL_ENABLE) >> AC_COMPCTRL_ENABLE_Pos; in hri_ac_get_COMPCTRL_ENABLE_bit()
1117 tmp &= ~AC_COMPCTRL_ENABLE; in hri_ac_write_COMPCTRL_ENABLE_bit()
1127 ((Ac *)hw)->COMPCTRL[index].reg &= ~AC_COMPCTRL_ENABLE; in hri_ac_clear_COMPCTRL_ENABLE_bit()
1135 ((Ac *)hw)->COMPCTRL[index].reg ^= AC_COMPCTRL_ENABLE; in hri_ac_toggle_COMPCTRL_ENABLE_bit()
/bsp/microchip/samc21/bsp/hri/
A Dhri_ac_c21.h1645 ((Ac *)hw)->COMPCTRL[index].reg |= AC_COMPCTRL_ENABLE; in hri_ac_set_COMPCTRL_ENABLE_bit()
1655 tmp = (tmp & AC_COMPCTRL_ENABLE) >> AC_COMPCTRL_ENABLE_Pos; in hri_ac_get_COMPCTRL_ENABLE_bit()
1664 tmp &= ~AC_COMPCTRL_ENABLE; in hri_ac_write_COMPCTRL_ENABLE_bit()
1674 ((Ac *)hw)->COMPCTRL[index].reg &= ~AC_COMPCTRL_ENABLE; in hri_ac_clear_COMPCTRL_ENABLE_bit()
1682 ((Ac *)hw)->COMPCTRL[index].reg ^= AC_COMPCTRL_ENABLE; in hri_ac_toggle_COMPCTRL_ENABLE_bit()
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/
A Dac.h441 #define AC_COMPCTRL_ENABLE (0x1ul << AC_COMPCTRL_ENABLE_Pos) macro
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/component/
A Dac.h444 #define AC_COMPCTRL_ENABLE (0x1ul << AC_COMPCTRL_ENABLE_Pos) macro
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dac.h430 #define AC_COMPCTRL_ENABLE (_U_(0x1) << AC_COMPCTRL_ENABLE_Pos) macro
/bsp/microchip/same54/bsp/include/component/
A Dac.h430 #define AC_COMPCTRL_ENABLE (_U_(0x1) << AC_COMPCTRL_ENABLE_Pos) macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dac.h430 #define AC_COMPCTRL_ENABLE (_U_(0x1) << AC_COMPCTRL_ENABLE_Pos) macro
/bsp/microchip/saml10/bsp/include/component/
A Dac.h489 #define AC_COMPCTRL_ENABLE AC_COMPCTRL_ENABLE_Msk /**< \de… macro
/bsp/microchip/samc21/bsp/samc21/include/component/
A Dac.h507 #define AC_COMPCTRL_ENABLE (_U_(0x1) << AC_COMPCTRL_ENABLE_Pos) macro

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