| /bsp/airm2m/air105/libraries/HAL_Driver/Src/ |
| A D | core_adc.c | 46 ADC0->ADC_CR1 = 0;
71 ADC0->ADC_FIFO = 3;
86 ADC0->ADC_FIFO = 3;
87 ADC0->ADC_CR2 &= ~(1 << 14);
88 ADC0->ADC_CR2 &= ~(1 << 13);
164 ADC0->ADC_CR1 = 0; in ADC_IrqHandle()
170 ADC0->ADC_FIFO = 3; in ADC_IrqHandle()
177 ADC0->ADC_FIFO = 3; in ADC_GlobalInit()
180 ADC0->ADC_CR1 = 0; in ADC_GlobalInit()
214 ADC0->ADC_FIFO = 3; in ADC_GetChannelValue()
[all …]
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| /bsp/nxp/lpc/lpc55sxx/Libraries/drivers/ |
| A D | drv_adc.c | 87 LPADC_Init(ADC0, &mLpadcConfigStruct); in rt_hw_adc_init()
91 LPADC_SetOffsetValue(ADC0, 10U, 10U); in rt_hw_adc_init()
93 LPADC_DoAutoCalibration(ADC0); in rt_hw_adc_init()
95 result = rt_hw_adc_register(&adc0_device, "adc0", &lpc_adc_ops, ADC0); in rt_hw_adc_init()
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| /bsp/nxp/mcx/mcxa/frdm-mcxa156/board/ |
| A D | Kconfig | 71 bool "Enable ADC0 Channel0"
75 bool "Enable ADC0 Channel1"
79 bool "Enable ADC0 Channel8"
84 bool "Enable ADC0 Channel13"
89 bool "Enable ADC0 Channel26"
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| /bsp/nxp/mcx/mcxn/frdm-mcxn947/board/ |
| A D | Kconfig | 98 bool "Enable ADC0 Channel0"
103 bool "Enable ADC0 Channel1"
108 bool "Enable ADC0 Channel8"
113 bool "Enable ADC0 Channel13"
118 bool "Enable ADC0 Channel26"
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| /bsp/nxp/mcx/mcxn/frdm-mcxn236/board/ |
| A D | Kconfig | 133 bool "Enable ADC0 Channel0"
138 bool "Enable ADC0 Channel1"
143 bool "Enable ADC0 Channel8"
148 bool "Enable ADC0 Channel13"
153 bool "Enable ADC0 Channel26"
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| /bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/ |
| A D | ald_adc.c | 141 ADC0->CCR = 0; in ald_adc_init()
142 MODIFY_REG(ADC0->CCR, ADC_CCR_GAINCALEN_MSK, DISABLE << ADC_CCR_GAINCALEN_POS); in ald_adc_init()
143 MODIFY_REG(ADC0->CCR, ADC_CCR_OFFCALEN_MSK, DISABLE << ADC_CCR_OFFCALEN_POS); in ald_adc_init()
146 MODIFY_REG(ADC0->CCR, ADC_CCR_VRBUFEN_MSK, ENABLE << ADC_CCR_VRBUFEN_POS); in ald_adc_init()
147 MODIFY_REG(ADC0->CCR, ADC_CCR_VCMBUFEN_MSK, ENABLE << ADC_CCR_VCMBUFEN_POS); in ald_adc_init()
148 MODIFY_REG(ADC0->CCR, ADC_CCR_VREFEN_MSK, ENABLE << ADC_CCR_VREFEN_POS); in ald_adc_init()
149 MODIFY_REG(ADC0->CCR, ADC_CCR_IREFEN_MSK, ENABLE << ADC_CCR_IREFEN_POS); in ald_adc_init()
154 ADC1->CCR = ADC0->CCR; in ald_adc_init()
159 SET_BIT(ADC0->CCR, ADC_CCR_TRMEN_MSK); in ald_adc_init()
482 if (config->p_adc == ADC0) in ald_adc_timer_trigger_insert()
[all …]
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| A D | ald_dac.c | 96 MODIFY_REG(ADC0->CCR, ADC_CCR_VREFEN_MSK, 1 << ADC_CCR_VREFEN_POS); in ald_dac_init()
99 SET_BIT(ADC0->CCR, (ADC_CCR_IREFEN_MSK | ADC_CCR_VRBUFEN_MSK | ADC_CCR_VCMBUFEN_MSK)); in ald_dac_init()
101 MODIFY_REG(ADC0->CCR, ADC_CCR_VRNSEL_MSK, hperh->init.n_ref << ADC_CCR_VRNSEL_POS); in ald_dac_init()
102 MODIFY_REG(ADC0->CCR, ADC_CCR_VRPSEL_MSK, hperh->init.p_ref << ADC_CCR_VRPSEL_POSS); in ald_dac_init()
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| /bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/GD32VF103_standard_peripheral/Source/ |
| A D | gd32vf103_adc.c | 69 case ADC0: in adc_deinit()
103 ADC_CTL0(ADC0) &= ~(ADC_CTL0_SYNCM); in adc_mode_config()
104 ADC_CTL0(ADC0) |= mode; in adc_mode_config()
226 ADC_CTL1(ADC0) |= ADC_CTL1_TSVREN; in adc_tempsensor_vrefint_enable()
238 ADC_CTL1(ADC0) &= ~ADC_CTL1_TSVREN; in adc_tempsensor_vrefint_disable()
645 return ADC_RDATA(ADC0); in adc_sync_mode_convert_value_read()
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| /bsp/nxp/lpc/lpc55sxx/lpc55s69_nxp_evk/applications/arduino_pinout/ |
| A D | README.md | 43 | 16 (A0) | P(0,16) | 是/否 | ADC0-CH8，默认被RT-Thread的ADC设备框架adc0接管 |
44 | 17 (A1) | P(0,23) | 是/否 | ADC0-CH0，默认被RT-Thread的ADC设备框架adc0接管 |
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| /bsp/synwit/libraries/SWM341_CSL/SWM341_StdPeriph_Driver/ |
| A D | SWM341_adc.c | 37 case ((uint32_t)ADC0): in ADC_Init()
79 case ((uint32_t)ADC0): in ADC_Init()
170 case ((uint32_t)ADC0): NVIC_EnableIRQ(ADC0_IRQn); break; in ADC_CMP_Init()
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| /bsp/nxp/lpc/lpc55sxx/lpc55s69_nxp_evk/board/ |
| A D | Kconfig | 223 bool "Enable ADC0 Channel0"
227 bool "Enable ADC0 Channel1"
231 bool "Enable ADC0 Channel8"
236 bool "Enable ADC0 Channel13"
241 bool "Enable ADC0 Channel26"
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| /bsp/microchip/samc21/bsp/samc21/include/ |
| A D | samc21e15a.h | 400 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
450 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
453 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
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| A D | samc21e16a.h | 400 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
450 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
453 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
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| A D | samc21e17a.h | 400 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
450 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
453 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
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| A D | samc21e18a.h | 400 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
450 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
453 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
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| A D | samc21g15a.h | 412 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
465 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
468 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
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| A D | samc21g16a.h | 412 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
465 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
468 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
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| A D | samc21g17a.h | 412 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
465 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
468 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
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| A D | samc21g18a.h | 412 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
465 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
468 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
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| A D | samc21j15a.h | 412 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
465 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
468 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
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| A D | samc21j16a.h | 412 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
465 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
468 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
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| A D | samc21j17a.h | 412 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
465 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
468 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
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| A D | samc21j17au.h | 412 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
465 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
468 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
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| A D | samc21j18a.h | 412 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
465 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
468 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
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| A D | samc21j18au.h | 412 #define ADC0 (0x42004400) /**< \brief (ADC0) APB Base Address */ macro
465 #define ADC0 ((Adc *)0x42004400UL) /**< \brief (ADC0) APB Base Address */ macro
468 #define ADC_INSTS { ADC0, ADC1 } /**< \brief (ADC) Instances List */
|